Implement fw_cfg_arch_key_name(), which returns the name of a
mips-specific key.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
hw/mips/fw_cfg.c| 35 +++
hw/mips/fw_cfg.h| 19 +++
hw/mips
accel=tcg -cpu Loongson-3A1000
-kernel -append ...
Use QEMU with KVM:
qemu-system-mips64el -M loongson3-virt,accel=kvm -cpu Loongson-3A4000
-kernel -append ...
The "-cpu" parameter is optional here and QEMU will use the correct type for
TCG/KVM automatically.
Signed-off-
c1: load 16 bytes to FPR
gssqc1: store 16 bytes from FPR
Details of Loongson-EXT is here:
https://github.com/FlyGoat/loongson-insn/blob/master/loongson-ext.md
Signed-off-by: Huacai Chen
Signed-off-by: Jiaxun Yang
---
target/mips/translate.c | 87 +
ub.com/FlyGoat/loongson-insn/blob/master/loongson-ext.md
Signed-off-by: Huacai Chen
Signed-off-by: Jiaxun Yang
---
target/mips/translate.c | 179
1 file changed, 179 insertions(+)
diff --git a/target/mips/translate.c b/target/mips/translate.c
From: Jiaxun Yang
Our current code assumed the target page size is always 4k
when handling PageMask and VPN2, however, variable page size
was just added to mips target and that's no longer true.
Fixes: ee3863b9d414 ("target/mips: Support variable page size")
Signed-off-by: Huac
GPR
gssdrc1: similar to sdr but RT is FPR instead of GPR
Details of Loongson-EXT is here:
https://github.com/FlyGoat/loongson-insn/blob/master/loongson-ext.md
Signed-off-by: Huacai Chen
Signed-off-by: Jiaxun Yang
---
target/mips/translate.c | 177 +
nzini
Signed-off-by: Huacai Chen
---
meson.build | 2 ++
1 file changed, 2 insertions(+)
diff --git a/meson.build b/meson.build
index 17c89c8..b407ff4 100644
--- a/meson.build
+++ b/meson.build
@@ -59,6 +59,8 @@ elif cpu == 's390x'
kvm_targets = ['s390x-softmmu']
elif cpu in
Update MIPS KVM type defintition from Linux 5.9-rc6.
Signed-off-by: Huacai Chen
---
linux-headers/linux/kvm.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index 6683e2e..c138b2f 100644
--- a/linux-headers/linux
MIPS machine documentation;
4, Many other improvements suggested by Philippe Mathieu-Daudé.
V10 -> V11:
1, Fix some typos;
2, Add Reviewed-by: Philippe Mathieu-Daudé .
V11 -> V12:
1, Split boot parameter helpers to loongson3_bootp.c;
2, Support both BE and LE host (Loongson guests are always L
Add Loongson-3A CPU models and Loongson-3 based machine description.
Signed-off-by: Huacai Chen
---
docs/system/cpu-models-mips.rst.inc | 10 --
docs/system/target-mips.rst | 10 ++
2 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/docs/system/cpu-models
accel=tcg -cpu Loongson-3A1000
-kernel -append ...
Use QEMU with KVM:
qemu-system-mips64el -M loongson3-virt,accel=kvm -cpu Loongson-3A4000
-kernel -append ...
The "-cpu" parameter is optional here and QEMU will use the correct type for
TCG/KVM automatically.
Signed-off-
Implement fw_cfg_arch_key_name(), which returns the name of a
mips-specific key.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
hw/mips/fw_cfg.c| 35 +++
hw/mips/fw_cfg.h| 19 +++
hw/mips
ub.com/FlyGoat/loongson-insn/blob/master/loongson-ext.md
Signed-off-by: Huacai Chen
Signed-off-by: Jiaxun Yang
---
target/mips/translate.c | 179
1 file changed, 179 insertions(+)
diff --git a/target/mips/translate.c b/target/mips/translate.c
GPR
gssdrc1: similar to sdr but RT is FPR instead of GPR
Details of Loongson-EXT is here:
https://github.com/FlyGoat/loongson-insn/blob/master/loongson-ext.md
Signed-off-by: Huacai Chen
Signed-off-by: Jiaxun Yang
---
target/mips/translate.c | 177 +
c1: load 16 bytes to FPR
gssqc1: store 16 bytes from FPR
Details of Loongson-EXT is here:
https://github.com/FlyGoat/loongson-insn/blob/master/loongson-ext.md
Signed-off-by: Huacai Chen
Signed-off-by: Jiaxun Yang
---
target/mips/translate.c | 87 +
From: Jiaxun Yang
Our current code assumed the target page size is always 4k
when handling PageMask and VPN2, however, variable page size
was just added to mips target and that's no longer true.
Fixes: ee3863b9d414 ("target/mips: Support variable page size")
Signed-off-by: Huac
Update MIPS KVM type defintition from Linux 5.9-rc6.
Signed-off-by: Huacai Chen
---
linux-headers/linux/kvm.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index a28c366..36a480f 100644
--- a/linux-headers/linux
MIPS machine documentation;
4, Many other improvements suggested by Philippe Mathieu-Daudé.
V10 -> V11:
1, Fix some typos;
2, Add Reviewed-by: Philippe Mathieu-Daudé .
V11 -> V12:
1, Split boot parameter helpers to loongson3_bootp.c;
2, Support both BE and LE host (Loongson guests are alwa
Hi, Philippe,
On Thu, Sep 24, 2020 at 11:40 PM Philippe Mathieu-Daudé wrote:
>
> On 9/16/20 11:49 AM, Huacai Chen wrote:
> > Hi, Philippe,
> >
> > On Wed, Sep 16, 2020 at 3:56 PM Philippe Mathieu-Daudé
> > wrote:
> >>
> >> Hi Huacai,
Add Loongson-3A CPU models and Loongson-3 based machine description.
Signed-off-by: Huacai Chen
---
docs/system/cpu-models-mips.rst.inc | 10 --
docs/system/target-mips.rst | 10 ++
2 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/docs/system/cpu-models
accel=tcg -cpu Loongson-3A1000
-kernel -append ...
Use QEMU with KVM:
qemu-system-mips64el -M loongson3-virt,accel=kvm -cpu Loongson-3A4000
-kernel -append ...
The "-cpu" parameter is optional here and QEMU will use the correct type for
TCG/KVM automatically.
Signed-off-
ub.com/FlyGoat/loongson-insn/blob/master/loongson-ext.md
Signed-off-by: Huacai Chen
Signed-off-by: Jiaxun Yang
---
target/mips/translate.c | 179
1 file changed, 179 insertions(+)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 916b57f2
Implement fw_cfg_arch_key_name(), which returns the name of a
mips-specific key.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
hw/mips/fw_cfg.c| 35 +++
hw/mips/fw_cfg.h| 19 +++
hw/mips
GPR
gssdrc1: similar to sdr but RT is FPR instead of GPR
Details of Loongson-EXT is here:
https://github.com/FlyGoat/loongson-insn/blob/master/loongson-ext.md
Signed-off-by: Huacai Chen
Signed-off-by: Jiaxun Yang
---
target/mips/translate.c | 177 +
c1: load 16 bytes to FPR
gssqc1: store 16 bytes from FPR
Details of Loongson-EXT is here:
https://github.com/FlyGoat/loongson-insn/blob/master/loongson-ext.md
Signed-off-by: Huacai Chen
Signed-off-by: Jiaxun Yang
---
target/mips/translate.c | 87 +
1 fil
From: Jiaxun Yang
Our current code assumed the target page size is always 4k
when handling PageMask and VPN2, however, variable page size
was just added to mips target and that's no longer true.
Fixes: ee3863b9d414 ("target/mips: Support variable page size")
Signed-off-by: Huac
MIPS machine documentation;
4, Many other improvements suggested by Philippe Mathieu-Daudé.
V10 -> V11:
1, Fix some typos;
2, Add Reviewed-by: Philippe Mathieu-Daudé .
Huacai Chen and Jiaxun Yang (8):
linux-headers: Update MIPS KVM type defintition
target/mips: Fix PageMask with variable page s
Update MIPS KVM type defintition from Linux 5.9-rc6.
Signed-off-by: Huacai Chen
---
linux-headers/linux/kvm.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index a28c366737..36a480fd77 100644
--- a/linux-headers
Hi Carlo,
On Tue, Sep 22, 2020 at 4:00 PM Carlo Arenas wrote:
>
> On Mon, Sep 21, 2020 at 7:53 PM Huacai Chen wrote:
> > was just added to mips target and that's nolonger true.
> s/nolonger/no longer/
>
> IMHO might be worth also mentioning that it was added with
Implement fw_cfg_arch_key_name(), which returns the name of a
mips-specific key.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
hw/mips/fw_cfg.c| 35 +++
hw/mips/fw_cfg.h| 19 +++
hw/mips/meson.build | 2 +-
3 files changed
Add Loongson-3A CPU models and Loongson-3 based machine description.
Signed-off-by: Huacai Chen
---
docs/system/cpu-models-mips.rst.inc | 10 --
docs/system/target-mips.rst | 10 ++
2 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/docs/system/cpu-models
ub.com/FlyGoat/loongson-insn/blob/master/loongson-ext.md
Signed-off-by: Huacai Chen
Signed-off-by: Jiaxun Yang
---
target/mips/translate.c | 179
1 file changed, 179 insertions(+)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 916b57f2
c1: load 16 bytes to FPR
gssqc1: store 16 bytes from FPR
Details of Loongson-EXT is here:
https://github.com/FlyGoat/loongson-insn/blob/master/loongson-ext.md
Signed-off-by: Huacai Chen
Signed-off-by: Jiaxun Yang
---
target/mips/translate.c | 87 +
1 fil
From: Jiaxun Yang
Our current code assumed the target page size is always 4k
when handling PageMask and VPN2, however, variable page size
was just added to mips target and that's nolonger true.
Signed-off-by: Huacai Chen
Signed-off-by: Jiaxun Yang
---
target/mips/cp0_helper.c
accel=tcg -cpu Loongson-3A1000
-kernel -append ...
Use QEMU with KVM:
qemu-system-mips64el -M loongson3-virt,accel=kvm -cpu Loongson-3A4000
-kernel -append ...
The "-cpu" parameter is optional here and QEMU will use the correct type for
TCG/KVM automatically.
Signed-off-
Update MIPS KVM type defintition from Linux 5.9-rc6.
Signed-off-by: Huacai Chen
---
linux-headers/linux/kvm.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index a28c366737..36a480fd77 100644
--- a/linux-headers
with some minor improvements.
V8 -> V9:
1, Update KVM type definition from kernel;
2, Fix PageMask with variable page size for TCG;
3, Add TCG support (add Loongson-EXT instructions).
V9 -> V10:
1, Split fw_cfg to a separate patch;
2, Split boot parameters definition to a local header;
3, Updat
GPR
gssdrc1: similar to sdr but RT is FPR instead of GPR
Details of Loongson-EXT is here:
https://github.com/FlyGoat/loongson-insn/blob/master/loongson-ext.md
Signed-off-by: Huacai Chen
Signed-off-by: Jiaxun Yang
---
target/mips/translate.c | 177 +
Hi, Philippe,
On Thu, Sep 17, 2020 at 3:53 PM Philippe Mathieu-Daudé wrote:
>
> On 9/16/20 12:47 PM, Philippe Mathieu-Daudé wrote:
> > On 9/16/20 11:49 AM, Huacai Chen wrote:
> >> On Wed, Sep 16, 2020 at 3:56 PM Philippe Mathieu-Daudé
> >> wrote:
> >>
Hi, Richard,
On Wed, Sep 16, 2020 at 11:15 PM Richard Henderson
wrote:
>
> On 9/15/20 7:12 PM, Huacai Chen wrote:
> > +case OPC_GSLQ:
> > +gen_base_offset_addr(ctx, t0, rs, lsq_offset);
> > +tcg_gen_qemu_ld_tl(t0,
Hi, Philippe,
On Wed, Sep 16, 2020 at 3:56 PM Philippe Mathieu-Daudé wrote:
>
> Hi Huacai,
>
> On 9/16/20 4:12 AM, Huacai Chen wrote:
> > Add Loongson-3 based machine support, it use liointc as the interrupt
> > controler and use GPEX as the pci controller. Currently i
Hi, Philippe,
On Wed, Sep 16, 2020 at 3:46 AM Philippe Mathieu-Daudé wrote:
>
> On 9/16/20 4:12 AM, Huacai Chen wrote:
> > From: Jiaxun Yang
> >
> > LWC2 & SWC2 have been rewritten by Loongson EXT vendor ASE
> > as "load/store quad word" and &qu
accel=tcg -cpu Loongson-3A1000
-kernel -append ...
Use QEMU with KVM:
qemu-system-mips64el -M loongson3-virt,accel=kvm -cpu Loongson-3A4000
-kernel -append ...
The "-cpu" parameter is optional here and QEMU will use the correct type for
TCG/KVM automatically.
Signed-off-
ub.com/FlyGoat/loongson-insn/blob/master/loongson-ext.md
Signed-off-by: Huacai Chen
Signed-off-by: Jiaxun Yang
---
target/mips/translate.c | 179
1 file changed, 179 insertions(+)
diff --git a/target/mips/translate.c b/target/mips/translate.c
GPR
gssdrc1: similar to sdr but RT is FPR instead of GPR
Details of Loongson-EXT is here:
https://github.com/FlyGoat/loongson-insn/blob/master/loongson-ext.md
Signed-off-by: Huacai Chen
Signed-off-by: Jiaxun Yang
---
target/mips/translate.c | 177 +
From: Jiaxun Yang
Our current code assumed the target page size is always 4k
when handling PageMask and VPN2, however, variable page size
was just added to mips target and that's nolonger true.
Signed-off-by: Huacai Chen
Signed-off-by: Jiaxun Yang
---
target/mips/cp0_helper.c
c1: load 16 bytes to FPR
gssqc1: store 16 bytes from FPR
Details of Loongson-EXT is here:
https://github.com/FlyGoat/loongson-insn/blob/master/loongson-ext.md
Signed-off-by: Huacai Chen
Signed-off-by: Jiaxun Yang
---
target/mips/translate.c | 81 +
Update MIPS KVM type defintition from Linux 5.9-rc6.
Signed-off-by: Huacai Chen
---
linux-headers/linux/kvm.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index a28c366..36a480f 100644
--- a/linux-headers/linux
with some minor improvements.
V8 -> V9:
1, Update KVM type definition from kernel;
2, Fix PageMask with variable page size for TCG;
3, Add TCG support (add Loongson-EXT instructions).
Huacai Chen and Jiaxun Yang (6):
linux-headers: Update MIPS KVM type defintition
target/mips: Fix PageMask w
Hi, Thomas,
On Wed, Sep 9, 2020 at 3:20 PM Thomas Huth wrote:
>
> On 09/09/2020 04.57, chen huacai wrote:
> > Hi, all,
> >
> > On Wed, Sep 9, 2020 at 1:25 AM Thomas Huth wrote:
> >>
> >> On 24/08/2020 10.11, Huacai Chen wrote:
> >>> MIPS has
Hi, Phillippe,
On Mon, Sep 7, 2020 at 11:58 AM Philippe Mathieu-Daudé wrote:
>
> Hi Huacai,
>
> On 8/24/20 10:10 AM, Huacai Chen wrote:
> > Add Loongson-3 based machine support, it use liointc as the interrupt
> > controler and use GPEX as the pci controller. Currently i
re)
Thank you very much!
Huacai
>
> On 9/3/20 2:58 AM, Huacai Chen wrote:
> > Hi, Philippe,
> >
> > On Wed, Sep 2, 2020 at 9:55 PM Philippe Mathieu-Daudé
> > wrote:
> >>
> >> Hi Huacai,
> >>
> >> On 8/24/20 10:11 AM, Huacai C
Hi, Philippe,
On Wed, Sep 2, 2020 at 9:55 PM Philippe Mathieu-Daudé wrote:
>
> Hi Huacai,
>
> On 8/24/20 10:11 AM, Huacai Chen wrote:
> > MIPS has two types of KVM: TE & VZ, and TE is the default type. Now,
> > libvirt uses a null-machine to detect the kvm capabili
good solution, but I cannot do it better now.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
hw/core/meson.build| 2 +-
hw/core/null-machine.c | 6 ++
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/hw/core/meson.build b/hw/co
r
TCG/KVM automatically.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
default-configs/mips64el-softmmu.mak | 1 +
hw/mips/Kconfig | 11 +
hw/mips/loongson3_virt.c | 963 +++
hw/mips/meson.build
Hi, Aleksandar,
On Sat, Aug 22, 2020 at 7:59 PM Aleksandar Markovic
wrote:
>
>
>
> On Friday, August 7, 2020, Huacai Chen wrote:
>>
>> Add Loongson-3 based machine support, it use liointc as the interrupt
>> controler and use GPEX as the pci controller. Currentl
good solution, but I cannot do it better now.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
hw/core/Makefile.objs | 2 +-
hw/core/null-machine.c | 6 ++
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/hw/core/Makefile.objs b/hw/core
r
TCG/KVM automatically.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
default-configs/mips64el-softmmu.mak | 1 +
hw/mips/Kconfig | 11 +
hw/mips/Makefile.objs| 1 +
hw/mips/loongson3_virt.c | 965
Hi, Aleksandar,
On Wed, Jun 24, 2020 at 7:50 PM Aleksandar Markovic
wrote:
>
> сре, 24. јун 2020. у 12:45 Huacai Chen је написао/ла:
> >
> > Add Loongson-3 based machine support, it use liointc as the interrupt
> > controler and use GPEX as the pci controller. Cu
Hi, Alexandar,
On Wed, Jun 24, 2020 at 7:27 PM Aleksandar Markovic
wrote:
>
> >
> > What exactly is missing in tcg support? Would it work if Loongson EXT is
> > supported in QEMU?
> >
>
> Huacai, hi.
>
> I couldn't find the answer to this question in v6.
>
> Could you please clarify this aspect?
quot;I/O中断" section of Loongson-3's user mannual, part 1.
Signed-off-by: Huacai Chen
Signed-off-by: Jiaxun Yang
---
hw/intc/Kconfig| 3 +
hw/intc/Makefile.objs | 1 +
hw/intc/loongson_liointc.c | 241 +
3 files changed, 245 i
Add myself as a maintainer of Loongson-3 virtual platform, and also add
Jiaxun Yang as a reviewer.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 51a4570..0226a74 100644
--- a
-cpu Loongson-3A4000
-kernel -append ...
The "-cpu" parameter is optional here and QEMU will use the correct type for
TCG/KVM automatically.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
default-configs/mips64el-softmmu.mak | 1 +
hw/mips/Kconfig
MIPS has two types of KVM: TE & VZ, and TE is the default type. Now we
can't create a VZ guest in QEMU because it lacks the kvm_type() hook in
MachineClass. This patch add the the kvm_type() hook to support both of
the two types.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Huacai
3-virt" machine to drop any ISA things;
5, Rework "hw/mips: Implement the kvm_type() hook in MachineClass";
6, Add Jiaxun Yang as a reviewer of Loongson-3.
V5 -> V6:
1, Fix license preamble;
2, Improve commit messages;
3, Add hw/intc/loongson_liointc.c to MAINTAINERS;
4, Fix all pos
Hi, Aleksandar,
On Tue, Jun 23, 2020 at 10:04 PM Aleksandar Markovic
wrote:
>
>
>
> уторак, 23. јун 2020., Huacai Chen је написао/ла:
>>
>> Add Loongson-3 based machine support, it use i8259 as the interrupt
>> controler and use GPEX as the pci controller. Currentl
Hi, Aleksandar,
On Tue, Jun 23, 2020 at 9:50 PM Aleksandar Markovic
wrote:
>
>
>
> уторак, 23. јун 2020., Huacai Chen је написао/ла:
>>
>> Add myself as a maintainer of Loongson-3 virtual platform, and also add
>> Jiaxun Yang as a reviewer.
>>
>> Sign
Hi, Aleksandar,
On Tue, Jun 23, 2020 at 9:58 PM Aleksandar Markovic
wrote:
>
>
>
> уторак, 23. јун 2020., је написао/ла:
>>
>> Patchew URL:
>> https://patchew.org/QEMU/1592914438-30317-1-git-send-email-che...@lemote.com/
>>
>>
>>
>> Hi,
>>
>> This series seems to have some coding style problems
Add myself as a maintainer of Loongson-3 virtual platform, and also add
Jiaxun Yang as a reviewer.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index f0cb1fd..293188e 100644
--- a
3-virt" machine to drop any ISA things;
5, Rework "hw/mips: Implement the kvm_type() hook in MachineClass";
6, Add Jiaxun Yang as a reviewer of Loongson-3.
Huacai Chen(4):
hw/mips: Implement the kvm_type() hook in MachineClass
hw/intc: Add Loongson liointc support
hw/mips: Add Loong
Loongson-3 has an integrated liointc (Local I/O interrupt controller).
It is similar to goldfish interrupt controller, but more powerful (e.g.,
it can route external interrupt to multi-cores).
Signed-off-by: Huacai Chen
Signed-off-by: Jiaxun Yang
---
hw/intc/Kconfig| 3 +
hw/intc
MIPS has two types of KVM: TE & VZ, and TE is the default type. Now we
can't create a VZ guest in QEMU because it lacks the kvm_type() hook in
MachineClass. This patch add the the kvm_type() hook to support both of
the two types.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Huacai
ptional here and QEMU will use the correct type for
TCG/KVM automatically.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
default-configs/mips64el-softmmu.mak | 1 +
hw/mips/Kconfig | 11 +
hw/mips/Makefile.objs| 1 +
hw/mips/loon
Hi, Thomas and Aleksandar,
On Tue, Jun 16, 2020 at 3:45 AM Aleksandar Markovic
wrote:
>
> On Mon, Jun 15, 2020 at 10:55 AM Thomas Huth wrote:
> >
> > On 15/06/2020 02.52, Huacai Chen wrote:
> > > Hi, Aleksandar,
> > >
> > > On Sun, Jun 14, 202
Hi, Aleksandar,
On Mon, Jun 15, 2020 at 2:04 PM Aleksandar Markovic
wrote:
>
> пон, 15. јун 2020. у 07:36 Huacai Chen је написао/ла:
> >
> > Hi, Aleksandar,
> >
> > On Mon, Jun 15, 2020 at 12:50 PM Aleksandar Markovic
> > wrote:
> > >
>
Hi, Aleksandar,
On Mon, Jun 15, 2020 at 12:50 PM Aleksandar Markovic
wrote:
>
> пон, 15. јун 2020. у 02:55 Huacai Chen је написао/ла:
> >
> > Hi, Aleksandar,
> >
> > On Sun, Jun 14, 2020 at 3:51 PM Aleksandar Markovic
> > wrote:
> > >
> > &g
Hi, Aleksandar,
On Sun, Jun 14, 2020 at 3:51 PM Aleksandar Markovic
wrote:
>
> Hi, Huacai, this is another round of comments, that should be addressed in v5.
>
> уто, 2. јун 2020. у 04:40 Huacai Chen је написао/ла:
> >
> > Add Loongson-3 based machine support, it us
Hi, Aleksandar,
On Sun, Jun 14, 2020 at 4:07 PM Aleksandar Markovic
wrote:
>
>
>
> уто, 2. јун 2020. у 04:38 Huacai Chen је написао/ла:
> >
> > MIPS has two types of KVM: TE & VZ, and TE is the default type. Now we
> > can't create a VZ guest in QEMU
Hi, Alexandar,
On Thu, Jun 11, 2020 at 4:51 PM Aleksandar Markovic
wrote:
>
> > >>> +int fd = 0, freq = 0;
> > >>> +char buf[1024], *buf_p;
>
> 1024 should have been defined via preprocessor constant
>
> > >>> +
> > >>> +fd = open("/proc/cpuinfo", O_RDONLY);
> > >>> +if (fd == -1)
Hi, Jiaxun,
On Thu, Jun 11, 2020 at 1:59 PM Jiaxun Yang wrote:
>
>
>
> 在 2020/6/2 10:39, Huacai Chen 写道:
> > Add Loongson-3 based machine support, it use i8259 as the interrupt
> > controler and use GPEX as the pci controller. Currently it can only
> > work with KV
2 Aleksandar Markovic
> > > је написао/ла:
> > > >
> > > > уто, 2. јун 2020. у 04:40 Huacai Chen је
> > > > написао/ла:
> > > > >
> > > > > Add Loongson-3 based machine support, it use i8259 as the interrupt
> > > > >
Hi, Jiaxun,
On Fri, Jun 5, 2020 at 5:06 PM Jiaxun Yang wrote:
>
> On Fri, 5 Jun 2020 10:38:36 +0200
> Aleksandar Markovic wrote:
>
> > уто, 2. јун 2020. у 04:38 Huacai Chen је
> > написао/ла:
> > >
> > > Loongson-3 CPU family include Loongson-
Hi, Alexandar,
On Wed, Jun 3, 2020 at 10:34 PM Aleksandar Markovic
wrote:
>
>
>
> уто, 2. јун 2020. у 04:38 Huacai Chen је написао/ла:
>>
>> MIPS has two types of KVM: TE & VZ, and TE is the default type. Now we
>> can't create a VZ guest in QEMU
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
MAINTAINERS | 5 +
1 file changed, 5 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 0944d9c..c42a218 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1092,6 +1092,11 @@ F: hw/isa/vt82c686.c
F: hw/pci-host/bonito.c
F
be omitted here and QEMU will use the correct type
for TCG/KVM automatically.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
default-configs/mips64el-softmmu.mak | 1 +
hw/mips/Kconfig | 10 +
hw/mips/Makefile.objs| 1 +
hw/mips/l
add their bit-fields as well.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
target/mips/cpu.h| 28 +
target/mips/internal.h | 2 +
target/mips/mips-defs.h | 7 +++-
target/mips/translate.c | 2 +
target/mips/trans
a VZ
platform. Thus, null-machine also need the kvm_type() hook.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
hw/core/Makefile.objs | 2 +-
hw/core/null-machine.c | 4
hw/mips/Makefile.objs | 2 +-
hw/mips/
with upstream;
2, Remove merged patches;
3, Fix build failure without CONFIG_KVM;
4, Add Reviewed-by: Aleksandar Markovic .
Huacai Chen(4):
hw/mips: Implement the kvm_type() hook in MachineClass
target/mips: Add Loongson-3 CPU definition
hw/mips: Add Loongson-3 machine support (with KVM)
MAINTAINE
Hi, Aleksandar,
On Wed, May 13, 2020 at 3:56 PM Aleksandar Markovic
wrote:
>
> сре, 8. апр 2020. у 11:08 Huacai Chen је написао/ла:
> >
> > Loongson processor prefers 16KB page size in system emulator, so let's
> > define mc->minimum_page_bits to 14.
> >
Hi, Aleksandar,
On Fri, May 8, 2020 at 7:23 PM Aleksandar Markovic
wrote:
>
> нед, 3. мај 2020. у 12:14 Huacai Chen је написао/ла:
> >
> > This patch add Loongson-3 Virtual IPI interrupt support in the kernel,
> > because emulate it in QEMU is too expensive for perform
Hi, Aleksandar,
On Fri, May 8, 2020 at 7:43 PM Aleksandar Markovic
wrote:
>
> нед, 3. мај 2020. у 12:06 Huacai Chen је написао/ла:
> >
> > We are preparing to add KVM support for Loongson-3. VZ extension is
> > fully supported in Loongson-3A R4+, and we will not car
Hi, Aleksandar,
On Thu, May 7, 2020 at 8:18 PM Aleksandar Markovic
wrote:
>
> сре, 6. мај 2020. у 03:43 Huacai Chen је написао/ла:
> >
> > Hi, Aleksandar,
> >
> > On Tue, May 5, 2020 at 6:12 PM Aleksandar Markovic
> > wrote:
> > >
> > &
Hi, Aleksandar,
On Tue, May 5, 2020 at 6:12 PM Aleksandar Markovic
wrote:
>
>
>
> уторак, 05. мај 2020., chen huacai је написао/ла:
>>
>> Hi, Aleksandar,
>>
>> On Sun, May 3, 2020 at 6:50 PM Aleksandar Markovic
>> wrote:
>> >
>> >
The description of "make check" is out-of-date, so fix it by adding
block and softfloat.
Reviewed-by: Claudio Fontana
Signed-off-by: Huacai Chen
---
tests/Makefile.include | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/Makefile.include b/tests/Makefile.inc
The description of "make check" is out-of-date, so fix it by adding
block and softfloat.
Signed-off-by: Huacai Chen
---
tests/Makefile.include | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/Makefile.include b/tests/Makefile.include
index 03a74b6..5d32239 10
Add more CP0 register for save/restore, including: EBase, XContext,
PageGrain, PWBase, PWSize, PWField, PWCtl, Config*, KScratch1~KScratch6.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
target/mips/kvm.c | 212 ++
target/mips
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
MAINTAINERS | 5 +
1 file changed, 5 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index fc3d1b0..8d5cfec 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1084,6 +1084,11 @@ F: hw/isa/vt82c686.c
F: hw/pci-host/bonito.c
F
add their bit-fields as well.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
target/mips/cpu.h| 28 +
target/mips/internal.h | 2 +
target/mips/mips-defs.h | 7 +++-
target/mips/translate.c | 2 +
target/mips/trans
be omitted here and QEMU will use the correct type
for TCG/KVM automatically.
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
default-configs/mips64el-softmmu.mak | 1 +
hw/mips/Kconfig | 10 +
hw/mips/Makefile.objs| 1 +
hw/mips/mips_l
Currently, KVM/MIPS only deliver I/O interrupt via IP2, this patch add
IP3 delivery as well, because Loongson-3 based machine use both IRQ2
(CPU's IP2) and IRQ3 (CPU's IP3).
Signed-off-by: Huacai Chen
Co-developed-by: Jiaxun Yang
---
hw/mips/mips_int.c | 4 ++--
1 file changed, 2
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