From: Igor V. Kovalenko
- fix snprintf off by one
pci domain and slot number formatting snprintf calls
require extra space for trailing null character
without this change devices are assigned the same path name
which triggers assertion in vmstate_register_with_alias_id
- while
From: Igor V. Kovalenko
- use symbolic name for MMU index
v0->v1:
- change debug traces to DPRINTF_MMU
- fix debug trace function names
Signed-off-by: Igor V. Kovalenko
---
target-sparc/op_helper.c | 28
1 files changed, 16 insertions(+), 12 deletions(-)
d
From: Igor V. Kovalenko
- address masking for ldqf and stqf insns
- address masking for lddf and stdf insns
- address masking for translating ASI (Ultrasparc IIi)
v0->v1:
- move arch-specific code to helpers and drop more ifdefs at call sites
using new helper asi_address_mask()
- change u
From: Igor V. Kovalenko
- truncate second operand to 32bit
Signed-off-by: Igor V. Kovalenko
---
target-sparc/op_helper.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c
index 83067ae..4c5155f 100644
--- a/target
From: Igor V. Kovalenko
Signed-off-by: Igor V. Kovalenko
---
target-sparc/op_helper.c | 28
1 files changed, 16 insertions(+), 12 deletions(-)
diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c
index f5e153d..b9af52b 100644
--- a/target-sparc
From: Igor V. Kovalenko
- implemented block load/store primary/secondary with user privilege
Signed-off-by: Igor V. Kovalenko
---
target-sparc/op_helper.c | 28
1 files changed, 28 insertions(+), 0 deletions(-)
diff --git a/target-sparc/op_helper.c b/target
From: Igor V. Kovalenko
- truncate and sign or zero extend operands before multiplication
- factor out common code to gen_op_multiply() with parameter to sign/zero extend
- call gen_op_multiply from gen_op_umul and gen_op_smul
Signed-off-by: Igor V. Kovalenko
---
target-sparc/translate.c
From: Igor V. Kovalenko
- change return type of ldl_* to uint32_t to prevent unwanted sign extension
visible in sparc64 load alternate address space methods
- note this change makes ldl_* softmmu implementations match ldl_phys one
Signed-off-by: Igor V. Kovalenko
---
softmmu_header.h |2
From: Igor V. Kovalenko
- address masking for ldqf and stqf insns
- address masking for lddf and stdf insns
- address masking for translating ASI (Ultrasparc IIi)
Signed-off-by: Igor V. Kovalenko
---
target-sparc/op_helper.c | 47 ++
target-sparc
From: Igor V. Kovalenko
- rearrange code to break from switch when appropriate
- allow deprecated ldfsr insn
Signed-off-by: Igor V. Kovalenko
---
target-sparc/translate.c |6 +-
1 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/target-sparc/translate.c b/target-sparc
assorted changes, linux kernel can now work with 32bit init task
---
Igor V. Kovalenko (8):
sparc64: fix tag access register on mmu traps
sparc64: fix missing address masking
sparc64: fix 32bit load sign extension
sparc64: fix ldxfsr insn
sparc64: use symbolic name
From: Igor V. Kovalenko
- set mmu tag access register on FAULT and PROT traps as well
Signed-off-by: Igor V. Kovalenko
---
target-sparc/helper.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/target-sparc/helper.c b/target-sparc/helper.c
index 96a22f3..aa1fd63
From: Igor V. Kovalenko
- change 128-bit atomic loads to reference nucleus context
v0->v1: dropped disassembler change
Signed-off-by: Igor V. Kovalenko
---
target-sparc/op_helper.c | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/target-sparc/op_helper.
From: Igor V. Kovalenko
Signed-off-by: Igor V. Kovalenko
---
sparc-dis.c |2 ++
target-sparc/op_helper.c | 10 +-
2 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/sparc-dis.c b/sparc-dis.c
index c1b682d..dbd3b4f 100644
--- a/sparc-dis.c
+++ b/sparc
From: Igor V. Kovalenko
- remove unused host state and store pci bus pointer only
- do not map host state access into unused 1fe.1000 range
- reorder pci region registration
- assign pci i/o region to isa_mem_base
Signed-off-by: Igor V. Kovalenko
---
hw/apb_pci.c | 49
From: Igor V. Kovalenko
Signed-off-by: Igor V. Kovalenko
---
hw/sun4u.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/hw/sun4u.c b/hw/sun4u.c
index e9a1e23..1e92900 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -859,7 +859,7 @@ enum {
static const struct hwdef hwdefs
- rename sun4u cpu to Ultrasparc IIi
- cleanup pci bridge map (requires openbios change)
v0->v1: split out rename of sun4u cpu to separate patch
---
Igor V. Kovalenko (2):
sparc64: rename sun4u cpu to Ultrasparc IIi
sparc64: clean up pci bridge map
hw/apb_pci.c |
From: Igor V. Kovalenko
- remove unused host state and store pci bus pointer only
- do not map host state access into unused 1fe.1000 range
- reorder pci region registration
- assign pci i/o region to isa_mem_base
- rename default machine (it's Ultrasparc IIi now)
Signed-off-by: I
From: Igor V. Kovalenko
- two pairs of softmmu indexes bind softmmu tlb to cpu tlb in fault handlers
using value of DMMU primary and secondary context registers, so we need to
flush softmmu translations when context registers are changed
Signed-off-by: Igor V. Kovalenko
---
target-sparc
From: Igor V. Kovalenko
Signed-off-by: Igor V. Kovalenko
---
target-sparc/helper.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/target-sparc/helper.c b/target-sparc/helper.c
index 538795f..1045c31 100644
--- a/target-sparc/helper.c
+++ b/target-sparc/helper.c
From: Igor V. Kovalenko
- refactor code to handle hpstate only if available for current cpu
- conditionally set hypervisor bit in hpstate register
- reorder softmmu indices so user accessable ones go first, translation context
macros supervisor() and hypervisor() adjusted as well
- disable
From: Igor V. Kovalenko
- cpu_mmu_index return MMU_NUCLEUS_IDX if trap level is not zero
- cpu_get_tb_cpu_state: store trap level and primary context in flags
this allows to restart code translation when address translation is changed
- stop translation block after writing to pstate and tl
From: Igor V. Kovalenko
- separate PRIV and PROT handling
- DPRINTF_MMU macro to clean up debug code
- dump mmu_idx, trap level and mmu context registers
along with address translation values
Signed-off-by: Igor V. Kovalenko
---
target-sparc/helper.c | 99
The following series addresses a few issues found in current sparc64 mmu
implementation.
With these changes HelenOS-0.4.2-sparc64-us2.iso can progress to executing
userspace tasks (verified by looking for 40b0 addresses in in_asm debug trace)
---
Igor V. Kovalenko (5):
sparc64: generate
From: Igor V. Kovalenko
- fix off by one error in spill trap number bit for other window (must be bit 5)
- fixes invalid instruction issue with HelenOS
---
target-sparc/cpu.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index
From: Igor V. Kovalenko
- must use store address operand to demap, not store value
Signed-off-by: Igor V. Kovalenko
---
target-sparc/op_helper.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c
index fcfd3f3
The following series fix a couple of typos in sparc target which cause
illegal instruction issue booting HelenOS on sparc64.
---
Igor V. Kovalenko (2):
sparc64: fix mmu demap operand typo
sparc64: fix TT_WOTHER value
target-sparc/cpu.h |2 +-
target-sparc/op_helper.c
From: Igor V. Kovalenko
- match global tte against any context
- show global tte in MMU dump
v0->v1: added default case to switch statement in demap_tlb
- should fix gcc warning about uninitialized context variable
Signed-off-by: Igor V. Kovalenko
---
target-sparc/cpu.h |
From: Igor V. Kovalenko
- match global tte against any context
- show global tte in MMU dump
v0->v1: added default case to switch statement in demap_tlb
- should fix gcc warning about uninitialized context variable
Signed-off-by: Igor V. Kovalenko
---
target-sparc/cpu.h |
From: Igor V. Kovalenko
- increase max supported MMU modes to 6
- handle nucleus context asi
- handle secondary context asi
- handle non-faulting loads from secondary context
Signed-off-by: Igor V. Kovalenko
---
softmmu_exec.h | 25 -
target-sparc/cpu.h | 13
From: Igor V. Kovalenko
- match global tte against any context
- show global tte in MMU dump
Signed-off-by: Igor V. Kovalenko
---
target-sparc/cpu.h | 18
target-sparc/helper.c| 33 -
target-sparc/op_helper.c | 52
From: Igor V. Kovalenko
Signed-off-by: Igor V. Kovalenko
---
sparc-dis.c | 22 ++
1 files changed, 22 insertions(+), 0 deletions(-)
diff --git a/sparc-dis.c b/sparc-dis.c
index 611e74f..cdd337a 100644
--- a/sparc-dis.c
+++ b/sparc-dis.c
@@ -2153,6 +2153,28 @@ static
The following series implements more sparc64 MMU bits.
We now support secondary and nucleus contexts referenced by
alternate space access instructions, and handle global MMU
translation entries.
---
Igor V. Kovalenko (3):
sparc64: more ultrasparc asi extensions for disassembler
From: Igor V. Kovalenko
We cannot install different opaque pointer for read and write
of the same i/o address.
- handle zero address in bmdma_writeb_common and install
the same opaque pointer for both read and write access.
Signed-off-by: Igor V. Kovalenko
---
hw/ide/cmd646.c |9
From: Igor V. Kovalenko
Instead of doing tricks to get the pci_dev, just pass it in the 1st
place. Patch is a bit longer that reverting the pci_dev field, but it
states more clearly (IMHO) what we are doing.
It also fixes the bm test, now that you told me that ->unit is not
always va
:
- http://lists.gnu.org/archive/html/qemu-devel/2009-12/msg01421.html
- http://lists.gnu.org/archive/html/qemu-devel/2009-12/msg01439.html
---
Igor V. Kovalenko (2):
cmd646: pass pci_dev as it needs it
cmd646: fix abort due to changed opaque pointer for ioport read
hw/ide/cmd646.c
From: Igor V. Kovalenko
sparc64 timer has tick counter which can be set and read,
and tick compare value used as deadline to fire timer interrupt.
The timer is not used as periodic timer, instead deadline
is set each time new timer interrupt is needed.
v3 -> v4:
- coding style
v2 -&
From: Igor V. Kovalenko
- correctly fit to cwp if provided window number is out of range
Signed-off-by: Igor V. Kovalenko
---
target-sparc/cpu.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 50859c7..842a2f4 100644
From: Igor V. Kovalenko
sparc64 timer has tick counter which can be set and read,
and tick compare value used as deadline to fire timer interrupt.
The timer is not used as periodic timer, instead deadline
is set each time new timer interrupt is needed.
v2 -> v3:
- added missing timer de
From: Igor V. Kovalenko
sparc64 timer has tick counter which can be set and read,
and tick compare value used as deadline to fire timer interrupt.
The timer is not used as periodic timer, instead deadline
is set each time new timer interrupt is needed.
v1 -> v2:
- new conversion help
From: Igor V. Kovalenko
Currently we do not implement VLAN tagging for rtl8139(C+),
still data is read from ring buffer headers.
- augment unused assignment with TODO item
- cast txdw1 to void for now
Signed-off-by: Igor V. Kovalenko
---
hw/rtl8139.c |5 +
1 files changed, 5
From: Igor V. Kovalenko
sparc64 timer has tick counter which can be set and read,
and tick compare value used as deadline to fire timer interrupt.
The timer is not used as periodic timer, instead deadline
is set each time new timer interrupt is needed.
This change implements sparc64 timers
From: Igor V. Kovalenko
cpu_check_irqs
- handle SOFTINT register TICK and STICK timer bits
- only check interrupt levels greater than PIL value
- handle preemption by higher level traps
cpu_exec
- handle CPU_INTERRUPT_HARD only if interrupts are enabled
- PIL 15 is not special level on sparcv9
From: Igor V. Kovalenko
- to be used by cpu_check_irqs
Signed-off-by: Igor V. Kovalenko
---
target-sparc/cpu.h | 13 +
target-sparc/exec.h | 13 -
2 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index
From: Igor V. Kovalenko
Signed-off-by: Igor V. Kovalenko
---
hw/sun4u.c |1 -
target-sparc/cpu.h |4
2 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/hw/sun4u.c b/hw/sun4u.c
index 9d46f08..029e3ed 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -73,7 +73,6
From: Igor V. Kovalenko
Signed-off-by: Igor V. Kovalenko
---
target-sparc/op_helper.c | 41 ++---
1 files changed, 38 insertions(+), 3 deletions(-)
diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c
index 3d7f64c..381e6c4 100644
--- a/target
From: Igor V. Kovalenko
Signed-off-by: Igor V. Kovalenko
---
target-sparc/helper.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/target-sparc/helper.c b/target-sparc/helper.c
index a06923a..e801474 100644
--- a/target-sparc/helper.c
+++ b/target-sparc/helper.c
From: Igor V. Kovalenko
Signed-off-by: Igor V. Kovalenko
---
target-sparc/helper.h|1 +
target-sparc/op_helper.c | 14 ++
target-sparc/translate.c |5 +
3 files changed, 16 insertions(+), 4 deletions(-)
diff --git a/target-sparc/helper.h b/target-sparc/helper.h
From: Igor V. Kovalenko
Signed-off-by: Igor V. Kovalenko
---
target-sparc/op_helper.c | 20
1 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c
index fd3286d..1d3adef 100644
--- a/target-sparc/op_helper.c
From: Igor V. Kovalenko
- pstate is 32bit variable, no need to pass 64bit value around
Signed-off-by: Igor V. Kovalenko
---
target-sparc/op_helper.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c
index c63de07
now, corresponding code branch is unchanged
---
Igor V. Kovalenko (9):
sparc64: change_pstate should have 32bit argument
sparc64: trace pstate and global register set changes
sparc64: add PIL to cpu state dump
sparc64: use helper_wrpil to check pending irq on write
sp
From: Igor V. Kovalenko
cpu_check_irqs
- handle SOFTINT register TICK and STICK timer bits
- only check interrupt levels greater than PIL value
- handle preemption by higher level traps
cpu_exec
- handle CPU_INTERRUPT_HARD only if interrupts are enabled
- PIL 15 is not special level on sparcv9
From: Igor V. Kovalenko
- to be used by cpu_check_irqs
Signed-off-by: Igor V. Kovalenko
---
target-sparc/cpu.h | 13 +
target-sparc/exec.h | 13 -
2 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index
From: Igor V. Kovalenko
Signed-off-by: Igor V. Kovalenko
---
target-sparc/op_helper.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c
index b1978cb..94f1c7a 100644
--- a/target-sparc/op_helper.c
+++ b/target-sparc
From: Igor V. Kovalenko
Signed-off-by: Igor V. Kovalenko
---
target-sparc/cpu.h |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 1fe4d0f..0dba241 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -394,6 +394,8
From: Igor V. Kovalenko
Signed-off-by: Igor V. Kovalenko
---
target-sparc/op_helper.c | 39 ---
1 files changed, 36 insertions(+), 3 deletions(-)
diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c
index a7da0e4..b1978cb 100644
--- a/target
From: Igor V. Kovalenko
Signed-off-by: Igor V. Kovalenko
---
target-sparc/helper.h|1 +
target-sparc/op_helper.c | 14 ++
target-sparc/translate.c |5 +
3 files changed, 16 insertions(+), 4 deletions(-)
diff --git a/target-sparc/helper.h b/target-sparc/helper.h
From: Igor V. Kovalenko
Signed-off-by: Igor V. Kovalenko
---
target-sparc/helper.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/target-sparc/helper.c b/target-sparc/helper.c
index a06923a..0f0e583 100644
--- a/target-sparc/helper.c
+++ b/target-sparc/helper.c
From: Igor V. Kovalenko
Signed-off-by: Igor V. Kovalenko
---
target-sparc/op_helper.c | 20
1 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c
index dab2c25..26092e5 100644
--- a/target-sparc/op_helper.c
counter match
only so require reloading for next time period. Still
it may be cleaner to fix sun4u use of periodic timers.
These changes allow recent linux kernel to start
scheduler works, and count about 200 bogomips
before crashing later.
---
Igor V. Kovalenko (9):
sparc64: trace pstate and
From: Igor V. Kovalenko
- this fixes stepping with gdb, where do_unassigned_access
may be called from gdb handler, outside of generated code
Signed-off-by: Igor V. Kovalenko
---
target-sparc/op_helper.c |7 +--
1 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/target
From: Igor V. Kovalenko
- extended range of MMU related traps which use MMU global registers,
as listed in Ultrasparc-IIi document
- no visible changes, since emulation do not cause added traps
Signed-off-by: Igor V. Kovalenko
---
target-sparc/op_helper.c |6 +++---
1 files changed, 3
From: Igor V. Kovalenko
This is a workaround only, and is a partial revert
of a few changes to BMDMAState which removed pci_dev
field on the way.
- cmd646 pci_from_bm() expects bm->unit value to
correspond with bm data being passed to callback
as opaque pointer. This breaks when write to
From: Igor V. Kovalenko
This is a workaround only, and is a partial revert
of a few changes to BMDMAState which removed pci_dev
field on the way.
- cmd646 pci_from_bm() expects bm->unit value to
correspond with bm data being passed to callback
as opaque pointer. This breaks when write to
From: Igor V. Kovalenko
- match global tte against any context
- show global tte in MMU dump
Signed-off-by: Igor V. Kovalenko
---
target-sparc/cpu.h | 18
target-sparc/helper.c| 18 +++-
target-sparc/op_helper.c | 53
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