On Fri, Nov 10, 2023 at 11:44:48AM -0500, Kevin O'Connor wrote:
> On Fri, Nov 10, 2023 at 12:04:24PM +0100, Gerd Hoffmann wrote:
> > -if (CPUPhysBits) {
> > -u64 top = 1LL << CPUPhysBits;
> > +if (pci_phys_bits) {
>
> FYI, this is
On Fri, Nov 10, 2023 at 12:04:24PM +0100, Gerd Hoffmann wrote:
> Hi,
>
> > This only changes the placement of the PCI bars. The pci setup code is
> > the only consumer of that variable, guess it makes sense to move the
> > quirk to the pci code (as suggested by Kevin) to clarify this.
>
>
On Tue, Nov 07, 2023 at 02:03:09PM +0100, Gerd Hoffmann wrote:
> For better compatibility with old linux kernels,
> see source code comment.
>
> Related (same problem in ovmf):
> https://github.com/tianocore/edk2/commit/c1e853769046
Thanks. I'll defer to your judgement on this. It does seem a
On Fri, May 05, 2023 at 09:11:11AM +0200, Gerd Hoffmann wrote:
> v3 changes:
> - rename variables, use u8 for CPULongMode.
> v2 changes:
> - e820 conflict fix
Thanks. Looks fine to me.
-Kevin
>
> Gerd Hoffmann (6):
> better kvm detection
> detect physical address space size
> move
On Wed, May 03, 2023 at 11:20:54AM +0200, Gerd Hoffmann wrote:
> Check for pae and long mode using cpuid. If present also read the
> physical address bits. Apply some qemu sanity checks (see below).
> Record results in PhysBits and LongMode variables. In case we are not
> sure what the address
On Fri, Jan 20, 2023 at 11:33:19AM +, David Woodhouse wrote:
> From: David Woodhouse
>
> When running under Xen, hvmloader places a table at 0x1000 with the e820
> information and BIOS tables. If this isn't present, SeaBIOS will
> currently panic.
>
> We now have support for running Xen
On Fri, Jan 20, 2023 at 11:33:19AM +, David Woodhouse wrote:
> From: David Woodhouse
>
> When running under Xen, hvmloader places a table at 0x1000 with the e820
> information and BIOS tables. If this isn't present, SeaBIOS will
> currently panic.
>
> We now have support for running Xen
On Mon, Nov 21, 2022 at 11:32:13AM +0100, Gerd Hoffmann wrote:
> Current seabios code will only enable and use the 64bit pci io window in
> case it runs out of space in the 32bit pci mmio window below 4G.
>
> This patch will also enable the 64bit pci io window when
> (a) RAM above 4G is
smbios_build_tables() arguments optional
smbios: Make smbios_build_tables() ready for 64-bit tables
smbios: copy_smbios_30() function
smbios: Support SMBIOS 3.0 entry point at copy_table()
smbios: Support SMBIOS 3.0 entry point at smbios_romfile_setup()
Kevin O'Connor (13
vme: Clean up nvme_cmd_readwrite()
Kevin O'Connor (1):
docs: Note v1.15.0 release
Matt DeVillier (1):
usb.c: Fix devices using non-primary interface descriptor
Mike Banon (1):
Support booting USB drives with a write protect switch enabled
Sergei Trofimovich (1):
vgas
On Mon, Sep 21, 2020 at 12:31:21PM +0200, Philippe Mathieu-Daudé wrote:
> Back to the SDcard, it might be less critical, so a migration
> breaking change might be acceptable. I'm only aware of Paolo
> and Kevin using this device for testing. Not sure of its
> importance in production.
FWIW, I
acpi: add xsdt support
acpi: add dsdt parser
acpi: skip kbd init if not present
acpi: find and register virtio-mmio devices
rewrap Makefile lines.
pci: fix mmconfig support
vga: fix cirrus bios
Kevin O'Connor (6):
usb-hid: Improve max packet size
On Fri, Jun 26, 2020 at 09:06:58PM +0300, Roman Bolshakov wrote:
> There's a fallback to PIT if TSC is not present but it doesn't work
> properly. It prevents boot from floppy on isapc and 486 cpu [1][2].
>
> SeaBIOS configures PIT in Mode 2. PIT counter is decremented in the mode
> but
On Fri, Jun 26, 2020 at 04:09:57PM +0300, Roman Bolshakov wrote:
> On Tue, Jun 23, 2020 at 11:00:24PM -0400, Kevin O'Connor wrote:
> > Good catch. Could we fix it using the patch below instead though?
> >
> > -Kevin
> >
> >
> > --- a/src/hw/timer.c
> &
On Sat, Jun 13, 2020 at 02:19:12PM +0300, Roman Bolshakov wrote:
> There's a fallback to PIT if TSC is not present but it doesn't work
> properly. It prevents boot from floppy on isapc and 486 cpu [1][2].
>
> SeaBIOS configures PIT in Mode 2. PIT counter is decremented in the mode
> but
// Disable sercon entry point on any vesa modeset
> -if (regs->al == 0x00)
> +if (regs->al == 0x02)
> SET_LOW(sercon_enable, 0);
> }
> }
Reviewed-by: Kevin O'Connor
-Kevin
eometry: Apply LCHS values for boot devices"
Revert "config: Add toggle for bootdevice information"
Revert "geometry: Add boot_lchs_find_*() utility functions"
Revert "geometry: Read LCHS from fw_cfg"
Kevin O'Connor (11):
output: Avoid thunk
On Wed, Nov 06, 2019 at 11:29:18AM -0500, Kevin O'Connor wrote:
> On Wed, Nov 06, 2019 at 12:12:55PM +0100, Gerd Hoffmann wrote:
> > On Wed, Oct 16, 2019 at 12:44:12PM +0200, Gerd Hoffmann wrote:
> > > Hi,
> > >
> > > Almost a year since 1.12.0 was tagge
On Wed, Nov 06, 2019 at 12:12:55PM +0100, Gerd Hoffmann wrote:
> On Wed, Oct 16, 2019 at 12:44:12PM +0200, Gerd Hoffmann wrote:
> > Hi,
> >
> > Almost a year since 1.12.0 was tagged (Nov 17th to be exact),
> > time to plan the 1.13 release I think ...
> >
> > How about freeze in a week or two,
On Wed, Oct 16, 2019 at 12:44:12PM +0200, Gerd Hoffmann wrote:
> Hi,
>
> Almost a year since 1.12.0 was tagged (Nov 17th to be exact),
> time to plan the 1.13 release I think ...
>
> How about freeze in a week or two, release by mid-november?
Works for me.
-Kevin
On Wed, Aug 21, 2019 at 08:42:08AM +0200, Gerd Hoffmann wrote:
> Hi,
>
> > Using the default QEMU config, we build SeaBIOS to use the TSC timer:
> >
> > builds/seabios-128k/.config:CONFIG_TSC_TIMER=y
> > builds/seabios-256k/.config:CONFIG_TSC_TIMER=y
>
> > Do we need a cpu with TSC support to
On Sat, Jun 22, 2019 at 11:51:48AM +0300, Sam Eiderman wrote:
> But maybe someone wants bootorder but doesn’t want to override legacy disk
> translations…
>
> I’m thinking of maybe adding
>
> if (!CONFIG_BOOTORDER || !CONFIG_BIOS_GEOMETRY)
> return NULL;
That's fine - though it's
On Fri, Jun 21, 2019 at 08:42:28PM +0300, Sam Eiderman wrote:
> Sounds reasonable, how do purpose to deal with:
>
> config BIOS_GEOMETRY
> config BOOTORDER
>
> precompiler optouts?
I think you can stick them both under BOOTORDER. That option is only
there in case someone wants to reduce the
On Wed, Jun 19, 2019 at 12:23:51PM +0300, Sam Eiderman wrote:
> Adding the following utility functions:
>
> * boot_lchs_find_pci_device
> * boot_lchs_find_scsi_device
> * boot_lchs_find_ata_device
FWIW, this leads to a bit of code duplication. I think it would be
preferable to
On Mon, Jun 17, 2019 at 10:36:54AM +0300, Sam Eiderman wrote:
> So overall, WDYT?
> Keep it extendible for a low price of ABI + “bootdevices” name.
> Or go strict and rename to “bios-geometries”?
If we add another qemu to firmware interface I think the interface
should be documented. I also
On Wed, Nov 21, 2018 at 12:43:34AM -0500, Stefan Berger wrote:
> On 11/20/18 11:51 AM, Stefano Garzarella wrote:
> > On Tue, Nov 20, 2018 at 5:13 PM Steve Douthit
> > wrote:
> > > On 11/20/18 10:55 AM, Kevin O'Connor wrote:
> > > > FYI, th
On Fri, Nov 23, 2018 at 12:18:13PM +0100, Stefano Garzarella wrote:
> On Fri, Nov 23, 2018 at 7:21 AM Gerd Hoffmann wrote:
> > On Thu, Nov 22, 2018 at 04:13:38PM +0100, Stefano Garzarella wrote:
> > > On Thu, Nov 22, 2018 at 12:51 PM Gerd Hoffmann wrote:
> > > > On Thu, Nov 22, 2018 at
On Mon, Nov 19, 2018 at 07:38:39PM +0100, Stefano Garzarella wrote:
> just an update, I enabled the debug prints and I saw two timeouts fired
> with a lot
> of time lost (~780ms between "init timer" and "Scan for VGA ..."),
> putting other prints I discovered that a lot of time is spent in the
>
to reach a stable speed, after starting
floppy: Send 4 sense interrupt commands during controller initialization
Kevin O'Connor (10):
docs: Add sercon-port to Runtime_config.md documentation
paravirt: Only enable sercon in NOGRAPHIC mode if no other console
specified
shadow: Don
On Tue, Aug 28, 2018 at 08:17:19PM +0300, Marcel Apfelbaum wrote:
> On 08/28/2018 08:02 PM, Kevin O'Connor wrote:
> > On Tue, Aug 28, 2018 at 12:14:58PM +0200, Gerd Hoffmann wrote:
> > > > > Where is the pxb-pcie device? :$somewhere? Or $domain:00:00.0?
> >
On Tue, Aug 28, 2018 at 12:14:58PM +0200, Gerd Hoffmann wrote:
> Hi,
>
> > > Where is the pxb-pcie device? :$somewhere? Or $domain:00:00.0?
> >
> > :$somewhere (On PCI domain 0)
>
> Cool, so we don't have an chicken-and-egg issue.
>
> > > If we can access pxb-pcie registers before
On Tue, Feb 13, 2018 at 03:29:20PM -0500, Stefan Berger wrote:
[...]
> In these 0x400 bytes we have 256 bytes that are used for configuration flags
> describing the supported opcode as you previously described. This array
> allows us to decouple the firmware implementation from the ACPI code and
On Tue, Feb 13, 2018 at 05:16:49PM +0100, Laszlo Ersek wrote:
> On 02/12/18 21:49, Stefan Berger wrote:
> > On 02/12/2018 03:46 PM, Kevin O'Connor wrote:
> >> I'm not sure I fully understand the goals of the PPI interface.
> >> Here's what I understand so far:
> >
On Fri, Feb 09, 2018 at 03:19:31PM -0500, Stefan Berger wrote:
> The PPI device in this patch series allocates 0x400 bytes. 0x200 bytes are
> used by the OperationRegion() in this patch series. The rest was thought of
> for future extensions.
>
> To allow both firmwares to use PPI, we would need
On Fri, Feb 09, 2018 at 03:19:31PM -0500, Stefan Berger wrote:
> I have played around with this patch and some modifications to EDK2. Though
> for EDK2 the question is whether to try to circumvent their current
> implementation that uses SMM or use SMM. With this patch so far I circumvent
> it,
On Thu, Dec 14, 2017 at 03:40:17PM -0300, Philippe Mathieu-Daudé wrote:
> >> /* Capabilities registers provide information on supported features of
> >> this
> >> * specific host controller implementation */
> >> -static Property sdhci_pci_properties[] = {
> >> +static Property
/Download
= git shortlog -n rel-1.10.0..rel-1.11.0 =
Kevin O'Connor (28):
usb: Make usb_time_sigatt variable static
tpm: Add comment banners to tcg.c separating major parts of spec
tpm: Don't call tpm_set_failure() from tpm12_get_capability()
tpm: Move code around
On Thu, Nov 02, 2017 at 05:04:20PM +0100, Gerd Hoffmann wrote:
> Hi,
>
> One problem we have with the serial console support in seabios and
> sgabios: It can happen that both are activated. We'll go fix that in
> qemu, but that'll work for new qemu versions only, not for the old
> already
On Thu, Sep 28, 2017 at 10:08:03AM +0200, Gerd Hoffmann wrote:
> On Wed, 2017-09-27 at 09:51 -0400, Kevin O'Connor wrote:
> > On Tue, Sep 26, 2017 at 09:33:09AM +0200, Gerd Hoffmann wrote:
> > > Hi,
> > >
> > > Quite a few changes accumulated in maste
On Tue, Sep 26, 2017 at 09:33:09AM +0200, Gerd Hoffmann wrote:
>Hi,
>
> Quite a few changes accumulated in master. Time to plan a new release
> I think, so we can pick up the improvements in qemu 2.11.
>
> Comments?
Makes sense. How about freezing SeaBIOS on October 13th and target a
On Thu, Sep 14, 2017 at 11:15:43AM +0300, Aleksandr Bezzubikov wrote:
> 2017-09-10 22:40 GMT+03:00 Marcel Apfelbaum :
> > On 10/09/2017 21:34, Aleksandr Bezzubikov wrote:
> >> And what about this series? The matching QEMU series has been applied,
> >> that's why there should be
On Sat, Jul 29, 2017 at 02:34:32AM +0300, Aleksandr Bezzubikov wrote:
> In case of Red Hat Generic PCIE Root Port reserve additional buses,
> which number is provided in a vendor-specific capability.
>
> Signed-off-by: Aleksandr Bezzubikov
> ---
> src/fw/pciinit.c | 37
On Fri, Jul 28, 2017 at 04:20:10PM +0200, Laszlo Ersek wrote:
> On 07/27/17 22:40, Kevin O'Connor wrote:
> > On Wed, Jul 26, 2017 at 11:31:36AM +0200, Paolo Bonzini wrote:
> >> The tables that QEMU provides are not ACPI 1.0 compatible since commit
> >> 77af8a2b95 ("
On Wed, Jul 26, 2017 at 11:31:36AM +0200, Paolo Bonzini wrote:
> The tables that QEMU provides are not ACPI 1.0 compatible since commit
> 77af8a2b95 ("hw/i386: Use Rev3 FADT (ACPI 2.0) instead of Rev1 to improve
> guest OS support.", 2017-05-03). This is visible with Windows 2000,
> which refuses
On Wed, Jul 26, 2017 at 04:21:23PM -0400, Paolo Bonzini wrote:
> > As I see it, fundamentally the proposal here is to deploy different
> > ACPI tables when using SeaBIOS then when using OVMF. I think that's
> > fine, but I think we should directly address that issue then.
>
> The different ACPI
On Wed, Jul 26, 2017 at 09:20:16AM +0200, Paolo Bonzini wrote:
> On 26/07/2017 00:01, Kevin O'Connor wrote:
> > On Tue, Jul 25, 2017 at 07:10:21PM +0200, Paolo Bonzini wrote:
> >> On 25/07/2017 18:23, Paolo Bonzini wrote:
> >>> On 25/07/2017 18:14, Laszlo Ersek w
On Tue, Jul 25, 2017 at 07:10:21PM +0200, Paolo Bonzini wrote:
> On 25/07/2017 18:23, Paolo Bonzini wrote:
> > On 25/07/2017 18:14, Laszlo Ersek wrote:
> >> "No regressions became apparent in tests with a range of Windows
> >>(XP-10)"
> >>
> >> In theory, w2k falls within that range.
> >
>
On Sun, Jul 23, 2017 at 07:28:01PM +0300, Marcel Apfelbaum wrote:
> On 22/07/2017 2:57, Kinsella, Ray wrote:
> > When scaling up to 512 Virtio-net devices SeaBIOS appears to really slow
> > down when configuring PCI Config space - haven't manage to get this to
> > work yet.
If there is a slowdown
On Sun, Jul 23, 2017 at 01:11:49AM +0300, Aleksandr Bezzubikov wrote:
> On PCI init PCI bridge devices may need some
> extra info about bus number to reserve, IO, memory and
> prefetchable memory limits. QEMU can provide this
> with special vendor-specific PCI capability.
>
> This capability is
On Sun, Jul 23, 2017 at 01:11:47AM +0300, Aleksandr Bezzubikov wrote:
> Refactor pci_find_capability function to get bdf instead of
> a whole pci_device* as the only necessary field for this function
> is still bdf.
> It greatly helps when we have bdf but not pci_device.
>
> Signed-off-by:
On Fri, Jul 21, 2017 at 03:15:46PM +0300, Marcel Apfelbaum wrote:
> On 21/07/2017 13:04, Gerd Hoffmann wrote:
> > I'd prefer to have a single vendor capability for all resource
> > allocation hints provided by qemu.
> Sure, the capability looking something like:
>
>[flags:
On Tue, May 16, 2017 at 08:00:28PM +, Xu, Anthony wrote:
> > On Sat, May 13, 2017 at 01:24:30AM +, Xu, Anthony wrote:
> > > I think it is related to accel and platform, the result I gave before is
> > > for q35
> > tcg,
> > >
> > > With the above change, I got below data
> > >
> > >
On Sat, May 13, 2017 at 01:24:30AM +, Xu, Anthony wrote:
> I think it is related to accel and platform, the result I gave before is for
> q35 tcg,
>
> With the above change, I got below data
>
> Platform accel count of restoring A20 to 0
> Q35 kvm 96
>
On Fri, May 12, 2017 at 11:19:00PM +, Xu, Anthony wrote:
> > SeaBIOS defaults to enabling A20 and it's a rare beast that disables
> > it. One could change x86.h:set_a20 and romlayout.S:transition32 to
> > only issue the outb() if the inb() indicates a change is needed. That
> > would likely
On Fri, May 12, 2017 at 09:16:31PM +0200, Paolo Bonzini wrote:
> On 12/05/2017 20:55, Xu, Anthony wrote:
> > If that's the case, QEMU/TCG should work with SeaBios even with ignoring
> > A20.
> >
> > During SeaBios boot, there are >350 port 92 access, if we don't need to
> > handle A20,
> > we
On Thu, May 11, 2017 at 05:32:47PM +0200, Paolo Bonzini wrote:
> On 11/05/2017 16:53, Kevin O'Connor wrote:
> > On Thu, May 11, 2017 at 01:35:28PM +0200, Paolo Bonzini wrote:
> >> Ignore env->a20_mask when running in system management mode.
> >
> > Thanks
On Thu, May 11, 2017 at 01:35:28PM +0200, Paolo Bonzini wrote:
> Ignore env->a20_mask when running in system management mode.
Thanks Paolo. I don't think this patch will help SeaBIOS though. The
SeaBIOS SMM handler doesn't do much - it doesn't even access ram above
1MiB. See SeaBIOS' code in
On Fri, May 05, 2017 at 10:49:05AM +, Gonglei (Arei) wrote:
> Hi guys,
>
> Currently my workmate encountered an issues in the testing environment:
>
> A letter from him:
>
> In order to boot a BIG vm (with 4T mem, 255 vCPUs, 60 virtio-scsi
> disk...), i have to increase the
On Wed, Mar 22, 2017 at 01:25:49PM +0100, Igor Mammedov wrote:
> On Wed, 22 Mar 2017 11:03:44 +0100
> Thomas Huth wrote:
> > On 22.03.2017 10:08, Markus Armbruster wrote:
> > > Are we now ready to accept a simple & stupid patch that actually helps
> > > users, say letting boards
On Mon, Feb 20, 2017 at 04:41:38PM +0100, Laszlo Ersek wrote:
> On 02/20/17 15:57, Igor Mammedov wrote:
> > On Thu, 16 Feb 2017 15:15:32 -0800
> > b...@skyportsystems.com wrote:
> >
> >> From: Ben Warren
> >>
> >> This patch set adds support for passing a GUID to Windows
On Fri, Jan 27, 2017 at 03:46:33PM +0100, Laszlo Ersek wrote:
> On 01/27/17 15:18, Kevin O'Connor wrote:
> > If an offset is going to be added, shouldn't both a source offset and
> > destination offset be used?
> >
> > /*
> > * COMMAND_WRITE_
On Thu, Jan 26, 2017 at 08:59:04PM +0200, Michael S. Tsirkin wrote:
> On Thu, Jan 26, 2017 at 07:25:22PM +0100, Laszlo Ersek wrote:
> > On 01/26/17 19:15, Michael S. Tsirkin wrote:
> > > On Thu, Jan 26, 2017 at 06:43:22PM +0100, Laszlo Ersek wrote:
> > >> On 01/26/17 16:20, Michael S. Tsirkin
On Wed, May 04, 2016 at 10:38:09AM -, felix wrote:
> I compiled the latest git snapshot (tag: v2.6.0-rc4, calling itself
> 2.5.94; with GTK frontend) and could only half-reproduce the bug; keys
> do not longer "jam", but arrow keys are still captured twice. I woudn't
> make much of that
On Thu, Nov 24, 2016 at 01:01:58AM +0100, Laszlo Ersek wrote:
> CC Jordan & Mike
>
> On 11/23/16 23:35, Paolo Bonzini wrote:
> >
> >
> > On 18/11/2016 11:36, Laszlo Ersek wrote:
> >> This is v3 of the series, with updates based on the v2 discussion:
> >>
On Fri, Nov 11, 2016 at 03:36:19PM +0100, Igor Mammedov wrote:
> On Fri, 11 Nov 2016 15:02:36 +0100
> Laszlo Ersek wrote:
>
> > adding Jeff Fan and Jordan Justen
> >
> > On 11/11/16 13:57, Igor Mammedov wrote:
> > > While looking at OVMF and how it handles CPUs (ACPI/AP
usion" scsi controllers on QEMU
* Support for virtio devices mapped above 4GB
* Several bug fixes and code cleanups
For information on obtaining SeaBIOS, please see:
http://seabios.org/Download
= git shortlog -n rel-1.9.0..rel-1.10.0 =====
Kevin O'Connor (124):
usb: Allow con
On Thu, Oct 20, 2016 at 10:27:33AM -0200, Eduardo Habkost wrote:
> (Why does SeaBIOS need to start the other CPUs, anyway, except
> for building the APIC ID list for the ACPI tables?)
SeaBIOS only starts the other CPUs when running on QEMU (it does not
on coreboot). The main reason is to
On Wed, Sep 28, 2016 at 11:07:13AM +0200, Gerd Hoffmann wrote:
> Hi,
>
> After a looong break finally the next round
> of the seabios serial console patches.
Hi Gerd,
Sorry for the delay in responding.
I ran some tests on your series and it looks like it causes issues
with some systems that
On Tue, Sep 27, 2016 at 02:00:08PM +0200, Gerd Hoffmann wrote:
> On Fr, 2016-07-15 at 10:35 -0400, Kevin O'Connor wrote:
> > On Fri, Jul 15, 2016 at 01:49:49PM +0200, Gerd Hoffmann wrote:
> > > > Finally, one high level observation is that we know there are a number
> &g
On Fri, Jul 15, 2016 at 01:49:49PM +0200, Gerd Hoffmann wrote:
> > Finally, one high level observation is that we know there are a number
> > of quirks in various vgabios emulators. For example, we know some
> > emulators don't handle certain 32bit instructions when in 16bit mode
> > (hence
On Thu, Jul 14, 2016 at 10:52:58AM +0200, Gerd Hoffmann wrote:
> Signed-off-by: Gerd Hoffmann
> ---
> Makefile| 5 +-
> src/std/cp437.c | 275
>
> src/std/cp437.h | 1 +
> 3 files changed, 279 insertions(+),
On Thu, Jul 14, 2016 at 10:53:02AM +0200, Gerd Hoffmann wrote:
> Signed-off-by: Gerd Hoffmann
> ---
> src/optionroms.c | 2 ++
> src/romlayout.S | 39 ++
> src/sercon.c | 99
> +++-
> 3 files
On Tue, Jul 05, 2016 at 05:07:08PM +0200, Gerd Hoffmann wrote:
> I also hacked up a patch to send output to both vga + serial:
>
> https://www.kraxel.org/cgit/seabios/commit/?h=serial=3afd7b8bb96126b00989f3ae09f451bbec4f00f7
>
> Not working stable though, seems to corrupt memory, not sure why.
>
On Mon, Jul 04, 2016 at 10:39:54PM +0200, Gerd Hoffmann wrote:
> Signed-off-by: Gerd Hoffmann
Not sure if this is still an RFC. I think it needs to have a Kconfig
option. It should probably also have runtime enable option.
[...]
> --- a/Makefile
> +++ b/Makefile
> @@ -29,7
On Mon, Jul 04, 2016 at 10:39:52PM +0200, Gerd Hoffmann wrote:
> Signed-off-by: Gerd Hoffmann
Nice!
[...]
> --- /dev/null
> +++ b/src/std/cp437.h
Instead of making a header file and including it in an array in the C
code I think it would be better to instead introduce
On Mon, Jul 04, 2016 at 06:03:30PM +0200, Paolo Bonzini wrote:
> On 04/07/2016 18:00, Kevin O'Connor wrote:
> > Does anyone know where one can find the original svn commit history
> > for sgabios? Seems the original google code repo is no longer
> > present.
>
> There
On Mon, Jul 04, 2016 at 11:26:48AM -0400, Kevin O'Connor wrote:
> At one point I looked through the sgabios code and was able to
> understand how it did caching. I'll take another look and see if I
> can describe it.
So, if I read the sgabios code correctly, it allocates a buffer of
On Mon, Jul 04, 2016 at 11:16:45AM +0200, Gerd Hoffmann wrote:
> Hi,
>
> > > +#define FLAG_CTRL (1<<0)
> > > +#define FLAG_SHIFT (1<<1)
> > > +
> > > +VARLOW struct {
> > > +u8 flags;
> > > +u8 scancode;
> > > +} termchr[256] = {
> > > +[ '1'] = { .scancode = 0x02,
On Mon, Jul 04, 2016 at 02:46:24PM +0200, Gerd Hoffmann wrote:
> On Mo, 2016-07-04 at 11:11 +0200, Paolo Bonzini wrote:
> > On 04/07/2016 10:16, Gerd Hoffmann wrote:
> > > +static void sercon_set_color(u8 fg, u8 bg, u8 bold)
> > > +{
> > > +sercon_putchar('\x1b');
> > > +
On Fri, Jul 01, 2016 at 01:07:39PM -0400, Kevin O'Connor wrote:
> If I understand correctly, most keys are sent on the serial port as
> single bytes, but there are a few keys that are sent as multi-byte
> sequences. There's a lot of complexity to implement buffering for
> that unus
On Fri, Jul 01, 2016 at 12:54:31PM +0200, Gerd Hoffmann wrote:
> Signed-off-by: Gerd Hoffmann
> ---
> src/clock.c | 1 +
> src/serial.c | 255
> +++
> src/util.h | 1 +
> 3 files changed, 257 insertions(+)
>
>
On Fri, Jul 01, 2016 at 12:54:30PM +0200, Gerd Hoffmann wrote:
> Signed-off-by: Gerd Hoffmann
Thanks. See my comments below.
[...]
> --- a/src/misc.c
> +++ b/src/misc.c
> @@ -11,6 +11,7 @@
> #include "output.h" // debug_enter
> #include "stacks.h" // call16_int
> #include
On Fri, Jun 17, 2016 at 03:20:10PM +0800, Haozhong Zhang wrote:
> OS usually expects BIOS to set certain bits in MSR_IA32_FEATURE_CONTROL
> for some features (e.g. VMX and LMCE). QEMU provides a fw_cfg file
> "etc/msr_feature_control" to advise bits that should be set in
>
On Tue, May 10, 2016 at 09:19:52AM -0600, Alex Williamson wrote:
> On Tue, 23 Feb 2016 10:22:33 -0500
> "Kevin O'Connor" <ke...@koconnor.net> wrote:
>
> > On Tue, Feb 16, 2016 at 02:39:27PM -0700, Alex Williamson wrote:
> > > QEMU provides two fw_cf
On Fri, Apr 01, 2016 at 09:46:05PM +0100, Richard W.M. Jones wrote:
> On Fri, Apr 01, 2016 at 04:05:46PM -0400, Kevin O'Connor wrote:
> > On Fri, Apr 01, 2016 at 07:41:31PM +0100, Richard W.M. Jones wrote:
> > > On Fri, Apr 01, 2016 at 11:35:40AM -0400, Kevin O'Connor wrote:
&g
On Fri, Apr 01, 2016 at 07:41:31PM +0100, Richard W.M. Jones wrote:
> On Fri, Apr 01, 2016 at 11:35:40AM -0400, Kevin O'Connor wrote:
> > > +# general stuff
> > > +CONFIG_QEMU=y
> > > +CONFIG_ROM_SIZE=128
> >
> > Why force a size of 128K - I would thin
On Fri, Apr 01, 2016 at 08:15:29PM +0100, Richard W.M. Jones wrote:
> On Fri, Apr 01, 2016 at 08:10:48PM +0100, Richard W.M. Jones wrote:
> > On Fri, Apr 01, 2016 at 03:04:15PM -0400, Kevin O'Connor wrote:
> > > Otherwise, it doesn't make
> > > sense that disabling CONF
On Fri, Apr 01, 2016 at 07:59:02PM +0100, Richard W.M. Jones wrote:
> On Fri, Apr 01, 2016 at 07:41:31PM +0100, Richard W.M. Jones wrote:
> > Below are some benchmarks of the other things you mentioned. These
> > are complete appliance boot-to-shutdown times [*not* just SeaBIOS].
> > All
On Fri, Apr 01, 2016 at 12:49:47PM +0100, Richard W.M. Jones wrote:
> On Fri, Apr 01, 2016 at 01:32:51PM +0200, Gerd Hoffmann wrote:
> > > I think we were working on the same thing ... Attached is my
> > > version.
> > >
> > > Note that you must enable at least CONFIG_MPTABLE else virtio-scsi
>
On Fri, Apr 01, 2016 at 04:06:23PM +0100, Richard W.M. Jones wrote:
> On Fri, Apr 01, 2016 at 10:58:19AM -0400, Kevin O'Connor wrote:
> > On Fri, Apr 01, 2016 at 09:44:56AM +0100, Richard W.M. Jones wrote:
> > > On Fri, Apr 01, 2016 at 10:24:37AM +0200, Paolo Bonzini wrote:
>
On Fri, Apr 01, 2016 at 01:07:55PM +0200, Gerd Hoffmann wrote:
> On Fr, 2016-04-01 at 11:17 +0100, Richard W.M. Jones wrote:
> > On Fri, Apr 01, 2016 at 11:18:30AM +0200, Gerd Hoffmann wrote:
> > > Hi,
> > >
> > > > I wonder how we can make use of this in qemu and downstream distros?
> > > >
On Fri, Apr 01, 2016 at 09:44:56AM +0100, Richard W.M. Jones wrote:
> On Fri, Apr 01, 2016 at 10:24:37AM +0200, Paolo Bonzini wrote:
> > On 01/04/2016 10:14, Richard W.M. Jones wrote:
> > > Found it: only CONFIG_MPTABLE=y was necessary. It boots with:
> > >
> > > # CONFIG_PIRTABLE is not set
> >
On Thu, Mar 31, 2016 at 11:17:30PM +0100, Richard W.M. Jones wrote:
> On Thu, Mar 31, 2016 at 12:22:23PM -0400, Kevin O'Connor wrote:
> > On Thu, Mar 31, 2016 at 10:21:25AM +0100, Stefan Hajnoczi wrote:
> > > On Sat, Mar 19, 2016 at 08:31:24PM +, Richar
obvious caveat that the given hardware
would no longer be initialized by seabios).
> Kevin O'Connor had some SeaBIOS optimizations that improved boot time by
> skipping unnecessary probing and timer calibration IIRC. I have CCed
> Marc and Kevin on this email.
There were a couple of optimi
On Tue, Feb 16, 2016 at 02:39:27PM -0700, Alex Williamson wrote:
> QEMU provides two fw_cfg files to support IGD. The first holds the
> OpRegion data which holds the Video BIOS Table (VBT). This needs to
> be copied into reserved memory and the address stored in the ASL
> Storage register of the
On Mon, Feb 22, 2016 at 02:41:38PM +0200, Michael S. Tsirkin wrote:
> Useful to send guest data back to QEMU.
> The write interface is restricted to DMA.
>
> Suggested-by: Kevin O'Connor <ke...@koconnor.net>
> Signed-off-by: Michael S. Tsirkin <m...@redhat.com>
> --
On Mon, Feb 15, 2016 at 09:29:26PM +0200, Michael S. Tsirkin wrote:
> I can build a generic interface to pass addresses
> allocated by bios back to QEMU. It looks like this would
> be useful for other purposes as well. Interested?
If this is undertaken, I suggest extending fw_cfg to support
On Sat, Feb 13, 2016 at 06:03:31PM -0700, Alex Williamson wrote:
> On Sat, 13 Feb 2016 19:20:32 -0500
> "Kevin O'Connor" <ke...@koconnor.net> wrote:
> > This confuses me - why didn't the host system BIOS turn on the LCD
> > panel during host bootup?
>
&g
On Tue, Feb 09, 2016 at 07:36:12PM +0100, Laszlo Ersek wrote:
> On 02/09/16 17:22, John Snow wrote:
> > On 02/09/2016 10:52 AM, Roman Kagan wrote:
> >> On Mon, Feb 08, 2016 at 03:20:47PM -0500, John Snow wrote:
> >>> On 02/08/2016 08:14 AM, Roman Kagan wrote:
> On Fri, Feb 05, 2016 at
On Sat, Feb 13, 2016 at 08:12:09AM -0700, Alex Williamson wrote:
> On Fri, 12 Feb 2016 21:49:04 -0500
> "Kevin O'Connor" <ke...@koconnor.net> wrote:
> > On Fri, Feb 12, 2016 at 05:23:18PM -0700, Alex Williamson wrote:
> > > Intel IGD makes use of
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