and colo-compare.
Signed-off-by: Tao Xu
Signed-off-by: Zhang Chen
---
Changelog:
v2:
Detect virtio-net driver and apply vnet_hdr_support
automatically. (Jason)
---
net/colo-compare.c| 57 +++
net/colo.c| 20 +++
net
On 8/17/2021 2:01 PM, Tao Xu wrote:
On 8/16/2021 10:58 AM, Jason Wang wrote:
在 2021/8/6 下午2:08, Tao Xu 写道:
When COLO use only one vnet_hdr_support parameter between
COLO network filter(filter-mirror, filter-redirector or
filter-rewriter and colo-compare, packet will not be parsed
On 8/16/2021 10:58 AM, Jason Wang wrote:
在 2021/8/6 下午2:08, Tao Xu 写道:
When COLO use only one vnet_hdr_support parameter between
COLO network filter(filter-mirror, filter-redirector or
filter-rewriter and colo-compare, packet will not be parsed
correctly. Acquire network driver related
network driver related to COLO, if it is
nirtio-net, check vnet_hdr_support flag of COLO network filter
and colo-compare.
Signed-off-by: Tao Xu
Signed-off-by: Zhang Chen
---
net/colo-compare.c| 25 +
net/colo.c| 20
net/colo.h
and colo-compare.
Signed-off-by: Tao Xu
Signed-off-by: Zhang Chen
---
net/colo-compare.c| 25 +
net/colo.c| 20
net/colo.h| 4
net/filter-mirror.c | 17 +
net/filter-rewriter.c | 9 +
5 files
There is an typo in iotest 051, correct it.
Signed-off-by: Tao Xu
---
tests/qemu-iotests/051| 2 +-
tests/qemu-iotests/051.pc.out | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/tests/qemu-iotests/051 b/tests/qemu-iotests/051
index f92161d8ef..1595babe82 100755
Public bug reported:
Hi, I boot a guest with "-netdev
tap,id=hn0,vhost=off,br=br0,helper=/usr/local/libexec/qemu-bridge-
helper" network option, and using "netperf -H IP -t UDP_STREAM" to test
guest UDP performance, I got the following output:
Socket Message Elapsed Messages
I test this patch in COLO, it resolve the issue qcow2 image become
larger after drive-mirror. Thank you!
Tested-by: Tao Xu
On 11/5/2020 2:04 AM, Alberto Garcia wrote:
The quorum driver does not implement bdrv_co_block_status() and
because of that it always reports to contain data even if all
On 6/3/20 5:16 PM, Michal Privoznik wrote:
On 6/2/20 10:00 AM, Tao Xu wrote:
On 6/1/2020 4:10 PM, Michal Privoznik wrote:
On 5/29/20 5:09 PM, Igor Mammedov wrote:
On Fri, 29 May 2020 15:33:48 +0200
Michal Privoznik wrote:
The initiator attribute of a NUMA node is documented as the 'NUMA
On 6/1/2020 4:10 PM, Michal Privoznik wrote:
On 5/29/20 5:09 PM, Igor Mammedov wrote:
On Fri, 29 May 2020 15:33:48 +0200
Michal Privoznik wrote:
The initiator attribute of a NUMA node is documented as the 'NUMA
node that has best performance to given NUMA node'. If a NUMA
node has at least
Hi Eduardo
Could you review this patch?
Tao Xu
On 3/24/2020 1:10 PM, Xu, Tao3 wrote:
Add which features are added or removed in this version.
Signed-off-by: Tao Xu
---
The output is as follows:
qemu-system-x86_64 -cpu help | grep "\["
x86 Cascadelake-Server-v2 Intel Xeon
On 5/19/2020 10:49 PM, Alberto Garcia wrote:
On Tue 19 May 2020 11:15:44 AM CEST, Kevin Wolf wrote:
But maybe it could return a limited set of flags at least so that the
mirror job can get the BDRV_BLOCK_ZERO information if the quorum
children agree on it.
Yeah, maybe it is possible to
Hi,
I am using ``drive-mirror`` + NBD for live storage migration. But I find
that if I use a qcow2 image(virtual size: 10 GiB, disk size: 1.8 GiB) as
a child of quorum, then the destination image become larger(virtual
size: 10 GiB, disk size: 10 GiB). However if I use a qcow2 image
directly,
Ping for comments
On 3/24/2020 1:10 PM, Xu, Tao3 wrote:
Add which features are added or removed in this version.
Signed-off-by: Tao Xu
---
The output is as follows:
qemu-system-x86_64 -cpu help | grep "\["
x86 Cascadelake-Server-v2 Intel Xeon Processor (Cascadelake)
[ARCH_CAPABIL
Add which features are added or removed in this version.
Signed-off-by: Tao Xu
---
The output is as follows:
qemu-system-x86_64 -cpu help | grep "\["
x86 Cascadelake-Server-v2 Intel Xeon Processor (Cascadelake)
[ARCH_CAPABILITIES]
x86 Cascadelake-Server-v3 Intel Xeon Processor (C
On 3/24/2020 2:39 AM, Eduardo Habkost wrote:
On Mon, Mar 23, 2020 at 10:58:16AM +0800, Xiaoyao Li wrote:
On 3/23/2020 10:32 AM, Tao Xu wrote:
Hi Xiaoyao,
May be you can add .note for this new version.
for example:
+ .version = 3,
+ .note = "ARCH_CAPABIL
Hi Xiaoyao,
May be you can add .note for this new version.
for example:
+.version = 3,
+.note = "ARCH_CAPABILITIES",
+.props = (PropValue[]) {
On 3/16/2020 5:56 PM, Xiaoyao Li wrote:
Current Icelake-Server CPU model lacks all the features
On 3/3/2020 1:19 AM, Eduardo Habkost wrote:
On Mon, Mar 02, 2020 at 07:47:28PM +0800, Tao Xu wrote:
On 2/29/2020 5:39 AM, Eduardo Habkost wrote:
On Wed, Feb 12, 2020 at 04:13:26PM +0800, Tao Xu wrote:
Add new version of Snowridge, Denverton, Opteron_G3, EPYC, and Dhyana
CPU model to uremove
On 2/29/2020 5:52 AM, Eduardo Habkost wrote:
On Wed, Feb 12, 2020 at 04:13:28PM +0800, Tao Xu wrote:
Add which features are added or removed in this version. Remove the
changed model-id in versioned CPU models, to keep the model name
unchanged at /proc/cpuinfo inside the VM.
Signed-off-by: Tao
On 2/29/2020 5:39 AM, Eduardo Habkost wrote:
On Wed, Feb 12, 2020 at 04:13:26PM +0800, Tao Xu wrote:
Add new version of Snowridge, Denverton, Opteron_G3, EPYC, and Dhyana
CPU model to uremove MONITOR/MWAIT featre.
After QEMU/KVM use "-overcommit cpu-pm=on" to expose MONITOR/MWAIT
On 2/12/2020 5:00 PM, Igor Mammedov wrote:
On Wed, 12 Feb 2020 16:13:28 +0800
Tao Xu wrote:
Add which features are added or removed in this version. Remove the
changed model-id in versioned CPU models, to keep the model name
unchanged at /proc/cpuinfo inside the VM.
Signed-off-by: Tao Xu
Add which features are added or removed in this version. Remove the
changed model-id in versioned CPU models, to keep the model name
unchanged at /proc/cpuinfo inside the VM.
Signed-off-by: Tao Xu
---
Changes in v2:
- correct the note of Cascadelake v3 (Xiaoyao)
---
target/i386/cpu.c | 54
Because MPX is being removed from the linux kernel, remove MPX feature
from Denverton.
Signed-off-by: Tao Xu
---
target/i386/cpu.c | 12
1 file changed, 12 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 32efa46852..848c992cd3 100644
--- a/target/i386/cpu.c
56xx/L56xx/X56xx (Nehalem-C) [IBRS]
Changes in v2:
- Rebase
- correct the note of Cascadelake v3 (Xiaoyao)
Tao Xu (4):
target/i386: Add Denverton-v2 (no MPX) CPU model
target/i386: Remove monitor from some CPU models
target/i386: Add new property note to versioned CPU models
target
Add additional information for -cpu help to indicate the changes in this
version of CPU model.
Suggested-by: Eduardo Habkost
Signed-off-by: Tao Xu
---
target/i386/cpu.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index
d.
Signed-off-by: Tao Xu
---
target/i386/cpu.c | 38 ++
1 file changed, 38 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 848c992cd3..6905e4eabd 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -3731,6 +3731,14 @@ static X86CPU
Add which features are added or removed in this version. Remove the
changed model-id in versioned CPU models.
Signed-off-by: Tao Xu
---
Changes in v2:
- correct the note of Cascadelake v3 (Xiaoyao)
---
target/i386/cpu.c | 50 +++
1 file changed
56xx/L56xx/X56xx (Nehalem-C) [IBRS]
Changes in v2:
- Rebase
- correct the note of Cascadelake v3 (Xiaoyao)
Tao Xu (4):
target/i386: Add Denverton-v2 (no MPX) CPU model
target/i386: Remove monitor from some CPU models
target/i386: Add new property note to versioned CPU models
target
Add additional information for -cpu help to indicate the changes in this
version of CPU model.
Suggested-by: Eduardo Habkost
Signed-off-by: Tao Xu
---
target/i386/cpu.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index
Because MPX is being removed from the linux kernel, remove MPX feature
from Denverton.
Signed-off-by: Tao Xu
---
target/i386/cpu.c | 12
1 file changed, 12 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 31556b7ec4..6981aa2a34 100644
--- a/target/i386/cpu.c
d.
Signed-off-by: Tao Xu
---
target/i386/cpu.c | 38 ++
1 file changed, 38 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 6981aa2a34..a6eb1b81fd 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -3678,6 +3678,14 @@ static X86CPU
On 12/19/2019 2:26 AM, Markus Armbruster wrote:
Tao Xu writes:
On 12/18/2019 9:33 AM, Tao Xu wrote:
On 12/17/2019 6:25 PM, Markus Armbruster wrote:
[...]
Also fun: for "0123", we use uint64_t 83, not double 123.0. But for
"0123.", we use 123.0, not 83.
Do we really
On 12/13/2019 6:06 PM, Michael S. Tsirkin wrote:
On Fri, Dec 13, 2019 at 09:19:21AM +0800, Tao Xu wrote:
This series of patches will build Heterogeneous Memory Attribute Table (HMAT)
according to the command line. The ACPI HMAT describes the memory attributes,
such as memory side cache
On 12/18/2019 9:33 AM, Tao Xu wrote:
On 12/17/2019 6:25 PM, Markus Armbruster wrote:
Tao Xu writes:
On 12/5/19 11:29 PM, Markus Armbruster wrote:
Tao Xu writes:
Parse input string both as a double and as a uint64_t, then use the
method which consumes more characters. Update the related
On 12/17/2019 11:01 PM, Markus Armbruster wrote:
Christophe de Dinechin writes:
On 17 Dec 2019, at 15:08, Markus Armbruster wrote:
Christophe de Dinechin writes:
On 5 Dec 2019, at 16:29, Markus Armbruster wrote:
Tao Xu writes:
Parse input string both as a double and as a uint64_t
On 12/17/2019 7:44 PM, Christophe de Dinechin wrote:
On 9 Dec 2019, at 09:30, Tao Xu wrote:
Parse input string both as a double and as a uint64_t, then use the
method which consumes more characters. Update the related test cases.
Signed-off-by: Tao Xu
---
Changes in v2:
- Resend
On 12/17/2019 6:25 PM, Markus Armbruster wrote:
Tao Xu writes:
On 12/5/19 11:29 PM, Markus Armbruster wrote:
Tao Xu writes:
Parse input string both as a double and as a uint64_t, then use the
method which consumes more characters. Update the related test cases.
Signed-off-by: Tao Xu
Gentle ping.
On 12/9/2019 4:30 PM, Xu, Tao3 wrote:
Parse input string both as a double and as a uint64_t, then use the
method which consumes more characters. Update the related test cases.
Signed-off-by: Tao Xu
---
Changes in v2:
- Resend to use double small than DBL_MIN
- Add more
Ping for comments.
On 12/9/2019 3:12 PM, Tao Xu wrote:
This series of patches will remove MPX from Denverton, remove Remove
monitor from some CPU models. Add additional information for -cpu help
to indicate the changes in this version of CPU model.
The output is as follows:
./x86_64-softmmu
On 12/13/2019 5:12 PM, Igor Mammedov wrote:
On Fri, 13 Dec 2019 09:33:10 +0800
Tao Xu wrote:
On 12/12/2019 8:48 PM, Igor Mammedov wrote:
Commit aa57020774b, by mistake used MachineClass::numa_mem_supported
to check if NUMA is supported by machine and also as unrelated change
set it to true
On 12/13/2019 6:06 PM, Michael S. Tsirkin wrote:
On Fri, Dec 13, 2019 at 09:19:21AM +0800, Tao Xu wrote:
This series of patches will build Heterogeneous Memory Attribute Table (HMAT)
according to the command line. The ACPI HMAT describes the memory attributes,
such as memory side cache
On 12/12/2019 8:48 PM, Igor Mammedov wrote:
Commit aa57020774b, by mistake used MachineClass::numa_mem_supported
to check if NUMA is supported by machine and also as unrelated change
set it to true for sbsa-ref board.
Luckily change didn't break machines that support NUMA, as the field
is set
the performance of the system
memory that use the memory side cache.
Acked-by: Markus Armbruster
Reviewed-by: Igor Mammedov
Reviewed-by: Daniel Black
Reviewed-by: Jonathan Cameron
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
No changes in v20.
Changes in v16:
- Use checks and assert to replace
this information as hint for optimization.
Acked-by: Markus Armbruster
Reviewed-by: Igor Mammedov
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v20:
- Fix the broken CI case when user input latency or bandwidth
less than required
Changes in v17:
- Remove
Check configuring HMAT usecase
Acked-by: Markus Armbruster
Suggested-by: Igor Mammedov
Signed-off-by: Tao Xu
---
Changes in v20:
- Fix the wrong target in pc_hmat_erange_cfg
- Use g_assert_true and g_assert_false to replace g_assert
(Thomas and Markus)
Changes in v19:
- Add
-by: Markus Armbruster
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v20:
- Disable cache level 0 in hmat-cache option (Igor)
- Update the QAPI description (Markus)
Changes in v19:
- Add description about the machine property 'hmat' in commit
message (Markus
-by: Markus Armbruster
Reviewed-by: Igor Mammedov
Reviewed-by: Daniel Black
Reviewed-by: Jingqi Liu
Suggested-by: Igor Mammedov
Signed-off-by: Tao Xu
---
No changes in v20.
Changes in v18:
- Remove unit "ns".
Changes in v17:
- Update the latency and bandwidth
Changes in v15:
mat/hmat.c parse and report
the platform's HMAT tables. Before using initiator option, enable HMAT with
-machine hmat=on.
Acked-by: Markus Armbruster
Reviewed-by: Igor Mammedov
Reviewed-by: Jingqi Liu
Suggested-by: Dan Williams
Signed-off-by: Tao Xu
---
No changes in v20.
Changes in v19:
HMAT with -machine hmat=on.
Acked-by: Markus Armbruster
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v20:
- Update the QAPI description (Markus)
- Keep base and bitmap unchanged when latency or bandwidth
out of range
Changes in v19:
- Add description about
for memory usage.
In the linux kernel, the codes in drivers/acpi/hmat/hmat.c parse and report
the platform's HMAT tables.
Acked-by: Markus Armbruster
Reviewed-by: Igor Mammedov
Reviewed-by: Daniel Black
Reviewed-by: Jonathan Cameron
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
No changes
and Bandwidth Information
Structure(s)
hmat acpi: Build Memory Side Cache Information Structure(s)
Tao Xu (3):
numa: Extend CLI to provide initiator information for numa nodes
tests/numa: Add case for QMP build HMAT
tests/bios-tables-test: add test cases for ACPI HMAT
hw
Parse input string both as a double and as a uint64_t, then use the
method which consumes more characters. Update the related test cases.
Signed-off-by: Tao Xu
---
Changes in v2:
- Resend to use double small than DBL_MIN
- Add more test case for double overflow and underflow.
- Set
Add which features are added or removed in this version. Remove the
changed model-id in versioned CPU models.
Signed-off-by: Tao Xu
---
Changes in v2:
- correct the note of Cascadelake v3 (Xiaoyao)
---
target/i386/cpu.c | 50 +++
1 file changed
Because MPX is being removed from the linux kernel, remove MPX feature
from Denverton.
Signed-off-by: Tao Xu
---
target/i386/cpu.c | 12
1 file changed, 12 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 69f518a21a..06a3077f95 100644
--- a/target/i386/cpu.c
56xx/L56xx/X56xx (Nehalem-C) [IBRS]
Changes in v2:
- correct the note of Cascadelake v3 (Xiaoyao)
Tao Xu (4):
target/i386: Add Denverton-v2 (no MPX) CPU model
target/i386: Remove monitor from some CPU models
target/i386: Add new property note to versioned CPU models
target/i386:
d.
Signed-off-by: Tao Xu
---
target/i386/cpu.c | 38 ++
1 file changed, 38 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 06a3077f95..b09ac38409 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -3621,6 +3621,14 @@ static X86CPU
Add additional information for -cpu help to indicate the changes in this
version of CPU model.
Suggested-by: Eduardo Habkost
Signed-off-by: Tao Xu
---
target/i386/cpu.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index
Parse input string both as a double and as a uint64_t, then use the
method which consumes more characters. Update the related test cases.
Signed-off-by: Tao Xu
---
Changes in v2:
- Add more test case for double overflow and underflow.
- Set mul as int64_t (Markus)
- Restore endptr
On 12/5/19 11:29 PM, Markus Armbruster wrote:
Tao Xu writes:
Parse input string both as a double and as a uint64_t, then use the
method which consumes more characters. Update the related test cases.
Signed-off-by: Tao Xu
---
[...]
diff --git a/util/cutils.c b/util/cutils.c
index
On 12/5/2019 4:44 PM, Xiaoyao Li wrote:
On 12/2/2019 2:32 PM, Tao Xu wrote:
Add which features are added or removed in this version. Remove the
changed model-id in versioned CPU models.
Signed-off-by: Tao Xu
---
target/i386/cpu.c | 50 +++
1
On 12/5/2019 4:55 PM, Xiaoyao Li wrote:
On 12/2/2019 2:32 PM, Tao Xu wrote:
This series of patches will remove MPX from Denverton, remove Remove
monitor from some CPU models. Add additional information for -cpu help
to indicate the changes in this version of CPU model.
The output is as follows
Parse input string both as a double and as a uint64_t, then use the
method which consumes more characters. Update the related test cases.
Signed-off-by: Tao Xu
---
tests/test-cutils.c| 37 -
tests/test-keyval.c| 47 ---
tests/test-qemu-opts.c
On 12/3/2019 2:25 PM, Michael S. Tsirkin wrote:
On Tue, Dec 03, 2019 at 07:00:53AM +0100, Markus Armbruster wrote:
"Michael S. Tsirkin" writes:
On Tue, Dec 03, 2019 at 08:53:30AM +0800, Tao Xu wrote:
Hi Michael,
Could this patch series be queued?
Thank you very much!
On 12/3/2019 1:35 PM, Michael S. Tsirkin wrote:
On Tue, Dec 03, 2019 at 08:53:30AM +0800, Tao Xu wrote:
Hi Michael,
Could this patch series be queued?
Thank you very much!
Tao
QEMU is in freeze, so not yet. Please ping after the release.
OK, Thank you!
t acpi: Build Memory Proximity Domain Attributes Structure(s)
hmat acpi: Build System Locality Latency and Bandwidth Information
Structure(s)
hmat acpi: Build Memory Side Cache Information Structure(s)
Tao Xu (3):
numa: Extend CLI to provide initiator information for numa nodes
tests/n
to expose MONITOR/MWAIT
(commit id 6f131f13e68d648a8e4f083c667ab1acd88ce4cd), the MONITOR/MWAIT
feature in these CPU model is unused.
Signed-off-by: Tao Xu
---
target/i386/cpu.c | 58 +++
1 file changed, 58 insertions(+)
diff --git a/target/i386/cpu.
d.
Signed-off-by: Tao Xu
---
target/i386/cpu.c | 38 ++
1 file changed, 38 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 06a3077f95..b09ac38409 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -3621,6 +3621,14 @@ static X86CPU
Because MPX is being removed from the linux kernel, remove MPX feature
from Denverton.
Signed-off-by: Tao Xu
---
target/i386/cpu.c | 12
1 file changed, 12 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 69f518a21a..06a3077f95 100644
--- a/target/i386/cpu.c
56xx/X56xx (Nehalem-C) [IBRS]
Tao Xu (4):
target/i386: Add Denverton-v2 (no MPX) CPU model
target/i386: Remove monitor from some CPU models
target/i386: Add new property note to versioned CPU models
target/i386: Add notes for versioned CPU models
target/i386/c
Add additional information for -cpu help to indicate the changes in this
version of CPU model.
Suggested-by: Eduardo Habkost
Signed-off-by: Tao Xu
---
target/i386/cpu.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index
Add which features are added or removed in this version. Remove the
changed model-id in versioned CPU models.
Signed-off-by: Tao Xu
---
target/i386/cpu.c | 50 +++
1 file changed, 25 insertions(+), 25 deletions(-)
diff --git a/target/i386/cpu.c b
Add which features are added or removed in this version. Remove the
changed model-id in versioned CPU models.
Signed-off-by: Tao Xu
---
target/i386/cpu.c | 50 +++
1 file changed, 25 insertions(+), 25 deletions(-)
diff --git a/target/i386/cpu.c b
d.
Signed-off-by: Tao Xu
---
target/i386/cpu.c | 38 ++
1 file changed, 38 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 06a3077f95..b09ac38409 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -3621,6 +3621,14 @@ static X86CPU
Because MPX is being removed from the linux kernel, remove MPX feature
from Denverton.
Signed-off-by: Tao Xu
---
target/i386/cpu.c | 12
1 file changed, 12 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 69f518a21a..06a3077f95 100644
--- a/target/i386/cpu.c
Add additional information for -cpu help to indicate the changes in this
version of CPU model.
Suggested-by: Eduardo Habkost
Signed-off-by: Tao Xu
---
target/i386/cpu.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index
Check configuring HMAT usecase
Acked-by: Markus Armbruster
Suggested-by: Igor Mammedov
Signed-off-by: Tao Xu
---
Changes in v20:
- Use g_assert_true and g_assert_false to replace g_assert
(Thomas and Markus)
Changes in v19:
- Add some fail cases for hmat-cache when level=0
this information as hint for optimization.
Acked-by: Markus Armbruster
Reviewed-by: Igor Mammedov
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v20:
- Fix the broken CI case when user input latency or bandwidth
less than required
Changes in v17:
- Remove
d Memory Side Cache Information Structure(s)
Tao Xu (3):
numa: Extend CLI to provide initiator information for numa nodes
tests/numa: Add case for QMP build HMAT
tests/bios-tables-test: add test cases for ACPI HMAT
hw/acpi/Kconfig | 7 +-
hw/acpi/Makefile.objs
-by: Markus Armbruster
Reviewed-by: Igor Mammedov
Reviewed-by: Daniel Black
Reviewed-by: Jingqi Liu
Suggested-by: Igor Mammedov
Signed-off-by: Tao Xu
---
No changes in v20.
Changes in v18:
- Remove unit "ns".
Changes in v17:
- Update the latency and bandwidth
Changes in v15:
HMAT with -machine hmat=on.
Acked-by: Markus Armbruster
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v20:
- Update the QAPI description (Markus)
- Keep base and bitmap unchanged when latency or bandwidth
out of range
Changes in v19:
- Add description about
for memory usage.
In the linux kernel, the codes in drivers/acpi/hmat/hmat.c parse and report
the platform's HMAT tables.
Acked-by: Markus Armbruster
Reviewed-by: Igor Mammedov
Reviewed-by: Daniel Black
Reviewed-by: Jonathan Cameron
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
No changes
mat/hmat.c parse and report
the platform's HMAT tables. Before using initiator option, enable HMAT with
-machine hmat=on.
Acked-by: Markus Armbruster
Reviewed-by: Igor Mammedov
Reviewed-by: Jingqi Liu
Suggested-by: Dan Williams
Signed-off-by: Tao Xu
---
No changes in v20.
Changes in v19:
the performance of the system
memory that use the memory side cache.
Acked-by: Markus Armbruster
Reviewed-by: Igor Mammedov
Reviewed-by: Daniel Black
Reviewed-by: Jonathan Cameron
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
No changes in v20.
Changes in v16:
- Use checks and assert to replace
-by: Markus Armbruster
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v20:
- Disable cache level 0 in hmat-cache option (Igor)
- Update the QAPI description (Markus)
Changes in v19:
- Add description about the machine property 'hmat' in commit
message (Markus
On 11/28/2019 7:53 PM, Thomas Huth wrote:
On 28/11/2019 12.49, Markus Armbruster wrote:
Tao Xu writes:
Check configuring HMAT usecase
Reviewed-by: Igor Mammedov
Suggested-by: Igor Mammedov
Signed-off-by: Tao Xu
---
Changes in v19:
- Add some fail cases for hmat-cache when level=0
On 11/28/2019 7:50 PM, Markus Armbruster wrote:
Tao Xu writes:
From: Liu Jingqi
Add -numa hmat-lb option to provide System Locality Latency and
Bandwidth Information. These memory attributes help to build
System Locality Latency and Bandwidth Information Structure(s)
in ACPI Heterogeneous
On 11/28/2019 7:50 PM, Markus Armbruster wrote:
Tao Xu writes:
From: Liu Jingqi
Add -numa hmat-cache option to provide Memory Side Cache Information.
These memory attributes help to build Memory Side Cache Information
Structure(s) in ACPI Heterogeneous Memory Attribute Table (HMAT).
Before
On 11/28/2019 9:57 PM, Igor Mammedov wrote:
On Thu, 28 Nov 2019 12:50:36 +0100
Markus Armbruster wrote:
Tao Xu writes:
From: Liu Jingqi
Add -numa hmat-cache option to provide Memory Side Cache Information.
These memory attributes help to build Memory Side Cache Information
Structure(s
this information as hint for optimization.
Reviewed-by: Igor Mammedov
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
No changes in 19.
Changes in v17:
- Remove unnecessary header file (Igor)
Changes in v16:
- Add more description for lb_length (Igor)
- Drop entry_list
for memory usage.
In the linux kernel, the codes in drivers/acpi/hmat/hmat.c parse and report
the platform's HMAT tables.
Reviewed-by: Igor Mammedov
Reviewed-by: Daniel Black
Reviewed-by: Jonathan Cameron
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
No changes in v19.
Changes in v16
-by: Igor Mammedov
Reviewed-by: Daniel Black
Reviewed-by: Jingqi Liu
Suggested-by: Igor Mammedov
Signed-off-by: Tao Xu
---
No changes in v19.
Changes in v18:
- Remove unit "ns".
Changes in v17:
- Update the latency and bandwidth
Changes in v15:
- Make tests without b
HMAT with -machine hmat=on.
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v19:
- Add description about the machine property 'hmat' in commit
message (Markus)
Changes in v18:
- Use qapi type uint64 and only nanosecond for latency (Markus)
Changes in v17:
- Add
the performance of the system
memory that use the memory side cache.
Reviewed-by: Igor Mammedov
Reviewed-by: Daniel Black
Reviewed-by: Jonathan Cameron
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
No changes in v19.
Changes in v16:
- Use checks and assert to replace masks (Igor)
- Fields
ximity Domain Attributes Structure(s)
hmat acpi: Build System Locality Latency and Bandwidth Information
Structure(s)
hmat acpi: Build Memory Side Cache Information Structure(s)
Tao Xu (3):
numa: Extend CLI to provide initiator information for numa nodes
tests/numa: Add case for QMP build
Check configuring HMAT usecase
Reviewed-by: Igor Mammedov
Suggested-by: Igor Mammedov
Signed-off-by: Tao Xu
---
Changes in v19:
- Add some fail cases for hmat-cache when level=0
Changes in v18:
- Rewrite the lines over 80 characters
Chenges in v17:
- Add some fail test cases
mat/hmat.c parse and report
the platform's HMAT tables. Before using initiator option, enable HMAT with
-machine hmat=on.
Reviewed-by: Igor Mammedov
Reviewed-by: Jingqi Liu
Suggested-by: Dan Williams
Signed-off-by: Tao Xu
---
Changes in v19:
- Add description about the machine property 'hmat'
-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v19:
- Add description about the machine property 'hmat' in commit
message (Markus)
- Update the QAPI comments
- Add a check for no memory side cache
Changes in v18:
- Update the error message (Igor)
Changes in v17
On 11/28/2019 10:46 AM, Tao Xu wrote:
On 11/27/2019 5:56 PM, Markus Armbruster wrote:
Tao Xu writes:
From: Liu Jingqi
Add -numa hmat-cache option to provide Memory Side Cache Information.
These memory attributes help to build Memory Side Cache Information
Structure(s) in ACPI Heterogeneous
On 11/27/2019 5:56 PM, Markus Armbruster wrote:
Tao Xu writes:
From: Liu Jingqi
Add -numa hmat-cache option to provide Memory Side Cache Information.
These memory attributes help to build Memory Side Cache Information
Structure(s) in ACPI Heterogeneous Memory Attribute Table (HMAT
-by: Igor Mammedov
Reviewed-by: Daniel Black
Reviewed-by: Jingqi Liu
Suggested-by: Igor Mammedov
Signed-off-by: Tao Xu
---
Changes in v18:
- Remove unit "ns".
Changes in v17:
- Update the latency and bandwidth
Changes in v15:
- Make tests without breaking CI (Michael)
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