On 10/5/24 22:05, Richard Henderson wrote:
Fill in the tlb_fill_align hook. So far this is the same
as tlb_fill_align_first, except that we can pass memop to
get_phys_addr as well.
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
---
target/arm/internals.h | 3
On 10/5/24 22:05, Richard Henderson wrote:
Determine cache attributes, and thence Device vs Normal memory,
"thence" ?
Other than that I have no arm knowledge to review the patch below
Helge
earlier in the function. We have an existing regime_is_stage2
if block into which this can be sl
On 10/5/24 22:05, Richard Henderson wrote:
Pass memop through get_phys_addr_twostage with its
recursion with get_phys_addr_nogpc.
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
---
target/arm/ptw.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
On 10/5/24 22:05, Richard Henderson wrote:
Pass the value through from get_phys_addr_nogpc.
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
---
target/arm/ptw.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
On 10/5/24 22:05, Richard Henderson wrote:
Zero is the safe do-nothing value for callers to use.
Pass the value through from get_phys_addr_gpc and
get_phys_addr_with_space_nogpc.
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
---
target/arm/ptw.c | 14 --
1
On 10/5/24 22:05, Richard Henderson wrote:
Zero is the safe do-nothing value for callers to use.
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
---
target/arm/internals.h | 3 ++-
target/arm/helper.c| 4 ++--
target/arm/ptw.c | 2 +-
3 files changed, 5
On 10/5/24 22:05, Richard Henderson wrote:
Zero is the safe do-nothing value for callers to use.
Pass the value through from get_phys_addr.
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
---
target/arm/ptw.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
On 10/5/24 22:05, Richard Henderson wrote:
Zero is the safe do-nothing value for callers to use.
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
---
target/arm/internals.h | 3 ++-
target/arm/ptw.c| 2 +-
target/arm/tcg/m_helper.c | 8
target
On 10/5/24 22:05, Richard Henderson wrote:
Fill in the tlb_fill_align hook, so that we can recognize
alignment exceptions in the correct priority order.
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
---
target/hppa/cpu.h| 3 +++
target/hppa/cpu.c| 2
On 10/5/24 22:05, Richard Henderson wrote:
In Chapter 5, Interruptions, the group 3 exceptions lists
"Unaligned data reference trap" has higher priority than
"Data memory break trap".
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
---
target/h
On 10/5/24 22:05, Richard Henderson wrote:
Drop the 'else' so that ret is overridden with the
highest priority fault.
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
---
target/hppa/mem_helper.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
rson
Reviewed-by: Helge Deller
---
target/hppa/mem_helper.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
On 10/5/24 22:05, Richard Henderson wrote:
Just add the argument, unused at this point.
Zero is the safe do-nothing value for all callers.
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
---
target/hppa/cpu.h| 2 +-
target/hppa/int_helper.c | 2 +-
target/hppa
On 10/5/24 22:05, Richard Henderson wrote:
When we have a tlb miss, defer the alignment check to
the new tlb_fill_align hook. Move the existing alignment
check so that we only perform it with a tlb hit.
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
---
accel/tcg/cputlb.c
On 10/5/24 22:05, Richard Henderson wrote:
Add the hook to struct TCGCPUOps. Add a default implementation
that recognizes alignment faults before page faults. Populate
all TCGCPUOps structures with the default implementation.
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
On 10/5/24 22:05, Richard Henderson wrote:
Split out of mmu_lookup.
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
---
include/exec/memop.h | 24
accel/tcg/cputlb.c | 16 ++--
2 files changed, 26 insertions(+), 14 deletions(-)
diff
On 10/5/24 22:05, Richard Henderson wrote:
Rename to use "memop_" prefix, like other functions
that operate on MemOp.
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
---
include/exec/memop.h | 4 ++--
accel/tcg/cputlb.c | 4 ++--
acce
On 10/5/24 22:05, Richard Henderson wrote:
This function is specific to MemOp, not TCG in general.
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
---
include/exec/memop.h | 23 +++
include/tcg/tcg.h| 23 ---
2 files changed, 23
On 10/5/24 22:05, Richard Henderson wrote:
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
---
accel/tcg/cputlb.c | 33 ++---
1 file changed, 10 insertions(+), 23 deletions(-)
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index fd6459b695
On 10/5/24 22:05, Richard Henderson wrote:
There should be no "just in case"; the page is already
in the tlb, and known to be not readable.
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
---
accel/tcg/cputlb.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletion
On 10/5/24 22:05, Richard Henderson wrote:
This new hook will allow targets to recognize an alignment
fault with the correct priority with respect to other faults
that can be raised by paging.
This should fix several hppa fault priority issues, most
importantly that access permissions come befor
On 10/2/24 17:47, Peter Maydell wrote:
On Wed, 2 Oct 2024 at 16:35, Alex Bennée wrote:
Helge Deller writes:
When the emulated CPU reads or writes to a memory location
a) for which no read/write permissions exists, *and*
b) the access happens unaligned (non-natural alignment),
then the CPU
necessary code to allow PARISC and possibly other architectures to
trigger a memory fault instead.
Signed-off-by: Helge Deller
Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=219339
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 117b516739..dd1da358fb 100644
--- a/accel/tcg/cputlb.c
+++ b
From: Helge Deller
While adding hppa64 support, the psw_v variable got extended from 32 to 64
bits. So, when packaging the PSW-V bit from the psw_v variable for interrupt
processing, check bit 31 instead the 63th (sign) bit.
This fixes a hard to find Linux kernel boot issue where the loss of
From: Helge Deller
The following changes since commit fd1952d814da738ed107e05583b3e02ac11e88ff:
Update version for v9.1.0 release (2024-09-03 09:18:26 -0700)
are available in the Git repository at:
https://github.com/hdeller/qemu-hppa.git tags/hppa-v9.1-fixes-pull-request
for you to
From: Helge Deller
The linux-user hppa target crashes randomly for me since commit
081a0ed188d8 ("target/hppa: Do not mask in copy_iaoq_entry").
That commit dropped the masking of the IAOQ addresses while copying them
from other registers and instead keeps them with all 64 bits up
Signed-off-by: Helge Deller
Reviewed-by: Richard Henderson
Tested-by: Guenter Roeck
Fixes: 931adff31478 ("target/hppa: Update cpu_hppa_get/put_psw for hppa64")
Cc: qemu-sta...@nongnu.org # v8.2+
---
v2:
- added change to cpu.h (as requested by Richard)
- added Richards R-b
- added sta
hppa: Do not mask in copy_iaoq_entry")
Signed-off-by: Helge Deller
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index 2bcb3b602b..56d9568d6c 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -319,7 +319,7 @@ static inline target_ulong hppa_form_gva_psw(target
Signed-off-by: Helge Deller
Fixes: 931adff31478 ("target/hppa: Update cpu_hppa_get/put_psw for hppa64")
diff --git a/target/hppa/helper.c b/target/hppa/helper.c
index b79ddd8184..d4b1a3cd5a 100644
--- a/target/hppa/helper.c
+++ b/target/hppa/helper.c
@@ -53,7 +53,7 @@ target_ulong cpu_hp
On 8/29/24 04:38, Richard Henderson wrote:
On 8/29/24 03:12, Helge Deller wrote:
Hi Richard,
I tested qemu-user from v9.1-rc4 for hppa and noticed that it crashes
immediately when starting a hppa chroot.
I was able to bisect the segfault back to
commit 081a0ed188d8d9d9038f00337d331d185a7ae331
Hi Richard,
I tested qemu-user from v9.1-rc4 for hppa and noticed that it crashes
immediately when starting a hppa chroot.
I was able to bisect the segfault back to
commit 081a0ed188d8d9d9038f00337d331d185a7ae331
Author: Richard Henderson
Date: Wed Mar 27 13:04:00 2024 -1000
target/hppa: D
On 5/29/24 17:11, Philippe Mathieu-Daudé wrote:
Hi Helge & Richard,
Hi Philippe,
Nevermind the missed review comments, I'm revisiting this
patch while looking at building libtcg-hppa.so.
Ok.
On 1/2/22 00:56, Philippe Mathieu-Daudé wrote:
On 31/1/22 22:35, Helge Deller wrote:
A
On 5/28/24 12:35, Thomas Huth wrote:
On 28/05/2024 11.54, Gerd Hoffmann wrote:
The xhci host adapter is the much better choice.
Signed-off-by: Gerd Hoffmann
---
hw/usb/hcd-ohci-pci.c | 1 +
hw/usb/Kconfig | 1 -
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/usb/hcd
o install.
>
> As expected, this reduces the runtime overhead of compilation when
> running a Linux kernel with address space randomization enabled.
Ah! I was wondering why you tried to convert to CF_PCREL at all.
So, that's the overall reason.
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
* Richard Henderson :
> Do not compile in the priv change based on the first
> translation; look up the PTE at execution time.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
* Richard Henderson :
> The return-by-reference is never used.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
* Richard Henderson :
> Use PAGE_WRITE_INV to temporarily enable write permission
> on for a given page, driven by PSW_X being set.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
* Richard Henderson :
> PSW_B causes B,GATE to trap as an illegal instruction, removing
> the sequential execution test that was merely an approximation.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
t most once per TB.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
* Richard Henderson :
> Generally, both of these bits are cleared at the end of each
> instruction. By separating these, we will be able to clear
> both with a single insn, instead of 2 or 3.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
* Richard Henderson :
> Print both raw IAQ_Front and IAQ_Back as well as the GVAs.
> Print control registers in system mode.
> Print floating point register if CPU_DUMP_FPU.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
* Richard Henderson :
> As with loads and stores, code offsets are kept intact until the
> full gva is formed. In qemu, this is in cpu_get_tb_cpu_state.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
ds wrong, or missing commas,
but maybe I'm just wrong...?
Other than that...:
Reviewed-by: Helge Deller
> Signed-off-by: Richard Henderson
* Richard Henderson :
> The kernel does this along the return path to user mode.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
> linux-user/hppa/target_cpu.h | 4 ++--
> target/hppa/cpu.h| 3 +++
> linux-user/elfload.c | 4 ++--
tions(-)
Reviewed-by: Helge Deller
* Richard Henderson :
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
> target/hppa/helper.h | 1 -
> target/hppa/int_helper.c | 2 +-
> target/hppa/op_helper.c | 7 ---
> target/hppa/translate.c | 41 ++--
> 4
rget/hppa/translate.c | 60 +
> 1 file changed, 55 insertions(+), 5 deletions(-)
Reviewed-by: Helge Deller
tions do the right thing with c or cf == 0,
> so there's no need for a special case anymore.
>
> Signed-off-by: Richard Henderson
> ---
> target/hppa/translate.c | 102 +++-
> 1 file changed, 27 insertions(+), 75 deletions(-)
Reviewed-by: Helge Deller
* Richard Henderson :
> Signed-off-by: Richard Henderson
> ---
> target/hppa/translate.c | 22 ++
> 1 file changed, 6 insertions(+), 16 deletions(-)
Reviewed-by: Helge Deller
* Richard Henderson :
> Define all of the context dependent field definitions.
> Use FIELD_EX32 and FIELD_DP32 with named fields instead
> of extract32 and deposit32 with raw constants.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
> ---
> target/h
* Richard Henderson :
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
> ---
> target/hppa/translate.c | 12 +++-
> 1 file changed, 3 insertions(+), 9 deletions(-)
>
> diff --git a/target/hppa/translate.c b/target/hppa/translate.c
> index 47f4b23d
* Richard Henderson :
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
* Richard Henderson :
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
* Richard Henderson :
> We can directly test bits of a 32-bit comparison without
> zero or sign-extending an intermediate result.
> We can directly test bit 0 for odd/even.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
* Richard Henderson :
> We can directly test bits of a 32-bit comparison without
> zero or sign-extending an intermediate result.
> We can directly test bit 0 for odd/even.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
>cond_make_0_tmp -> cond_make_ti
>cond_make_0 -> cond_make_vi
>cond_make -> cond_make_vv
>
> Pass 0 explictly, rather than implicitly in the function name.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
* Richard Henderson :
> This is a first step in enabling CF_PCREL, but for now
> we regenerate the absolute address before writeback.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
* Richard Henderson :
> Wrap offset and space together in one structure, ensuring
> that they're copied together as required.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
On 5/14/24 16:37, Helge Deller wrote:
* Richard Henderson :
Add a common routine for writing the return address.
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
---
target/hppa/translate.c | 54 +++--
1 file changed, 31 insertions(+), 23
* Richard Henderson :
> This allows unification of BE, BLR, BV, BVE with a common helper.
> Since we can now track space with IAQ_Next, we can now let the
> TranslationBlock continue across the delay slot with BE, BVE.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
* Richard Henderson :
> Move space assighments to a central location.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
> ---
> target/hppa/translate.c | 58 +++--
> 1 file changed, 27 insertions(+), 31 deletions(-)
>
* Richard Henderson :
> Add variable to track space changes to IAQ. So far, no such changes
> are introduced, but the new checks vs ctx->iasq_b may eliminate an
> unnecessary copy to cpu_iasq_f with e.g. BLR.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
* Richard Henderson :
> Minimize the amount of code in hppa_tr_translate_insn advancing the
> insn queue for the next insn. Move the goto_tb path to hppa_tr_tb_stop.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
> ---
> target/hppa
* Richard Henderson :
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
> ---
> target/hppa/translate.c | 10 --
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/target/hppa/translate.c b/target/hppa/translate.c
> index a9196050
* Richard Henderson :
> We no longer have to allocate a temp and perform an
> addition before translation of the rest of the insn.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
> ---
> target/hppa/translate.c | 26 ++
> 1 file c
* Richard Henderson :
> Add a common routine for writing the return address.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
> ---
> target/hppa/translate.c | 54 +++--
> 1 file changed, 31 insertions(+), 23 deletions(-)
* Richard Henderson :
> Instead of two separate cpu_iaoq_entry calls, use one call to update
> both IAQ_Front and IAQ_Back. Simplify with an argument combination
> that automatically handles a simple increment from Front to Back.
>
> Signed-off-by: Richard Henderson
Reviewed-b
* Richard Henderson :
> The generic tcg driver will have already checked for breakpoints.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
> ---
> target/hppa/translate.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/t
* Richard Henderson :
> Simplify the function by not attempting a conditional move
> on the branch destination -- just use nullify_over normally.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
> ---
> target/hppa/translate.c | 73 +++-
that
> we will *not* use a goto_tb. Use a plain indirect branch instead,
> which is what we got out of the attempted direct branch anyway.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
> ---
> target/hppa/translate.c | 33 +---
* Richard Henderson :
> Share this check between gen_goto_tb and hppa_tr_translate_insn.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
> ---
> target/hppa/translate.c | 20 ++--
> 1 file changed, 10 insertions(+), 10 deletions(-)
>
>
* Richard Henderson :
> This function is for log_pc(), which needs to produce a
> similar result to cpu_get_tb_cpu_state().
>
> Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
---
> ---
> target/hppa/cpu.c | 8
> 1 file changed, 4 insertions(+), 4 d
On 5/13/24 09:46, Richard Henderson wrote:
Most of the patches lead up to implementing CF_PCREL.
Along the way there is a grab bag of code updates (TCG_COND_TST*),
bug fixes (space changes during branch-in-branch-delay-slot),
and implementation of features (PSW bits B, X, T, H, L).
Sven reported
On 5/13/24 09:46, Richard Henderson wrote:
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
---
target/hppa/cpu.h | 43 ++-
target/hppa/cpu.c | 42 ++
2 files changed, 44 insertions(+), 41
54,8 @@ F: target/hexagon/gen_idef_parser_funcs.py
HPPA (PA-RISC) TCG CPUs
M: Richard Henderson
+R: Helge Deller
+R: Sven Schnelle
S: Maintained
F: target/hppa/
F: disas/hppa.c
@@ -1214,6 +1216,7 @@ HP-PARISC Machines
HP B160L, HP C3700
M: Richard Henderson
R: Helge Deller
+R: Sven S
On 4/23/24 17:10, Daniel P. Berrangé wrote:
On Tue, Apr 23, 2024 at 05:07:17PM +0200, Helge Deller wrote:
On 4/23/24 16:58, Cole Robinson wrote:
On 4/23/24 10:11 AM, Cole Robinson wrote:
Hi,
hppa-firmware.img and hppa-firmware64.img in qemu.git are missing ELF
build-id annotations. rpm
afirmware.lds $(OUT)head.o $(OUT)version.o -X -o
$@ -e startup --as-needed $(OUT)ccode32flat.o $(LIBGCC)
+ $(Q)$(LD) -N -T $(OUT)pafirmware.lds $(OUT)head.o $(OUT)version.o -X -o
$@ -e startup --as-needed --build-id $(OUT)ccode32flat.o $(LIBGCC)
deller@carbonx1:/home/cvs/LINUX/seabios
y: Richard Henderson
Tested-by: Helge Deller
Helge
---
Sven, I looked again through IIAOQ documentation and it does seem
like some of the bits are wrong, both on interrupt delivery and RFI.
r~
---
target/hppa/int_helper.c | 20 +++-
target/hppa/sys_helper.c | 18
On 4/2/24 08:29, Sven Schnelle wrote:
Richard Henderson writes:
On 4/1/24 20:01, Sven Schnelle wrote:
Implement dr2 and the mfdiag/mtdiag instructions. dr2 contains a bit
which enables/disables space id hashing. Seabios would then set
this bit when booting. Linux would disable it again during
diag instructions to save or restore the CPU registers to/from
the shadow registers.
Implement those per-CPU architecture diag instructions to fix those
parts of the HP ODE testcases (L2DIAG and WDIAG, section 1) which test
the shadow registers.
Signed-off-by: Helge Deller
[rth: Use decodetree
On 3/26/24 19:10, Richard Henderson wrote:
This operation is trivial and does not require a helper.
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
Helge
---
target/hppa/helper.h | 1 -
target/hppa/sys_helper.c | 4 ++--
target/hppa/translate.c | 17
On 3/26/24 19:10, Richard Henderson wrote:
Split trans_diag into per-operation functions.
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
Helge
---
target/hppa/insns.decode | 8 +++-
target/hppa/translate.c | 34 +-
2 files changed, 28
On 3/26/24 07:44, Richard Henderson wrote:
These ??? notes have been there since day one.
This fixes l2diag test 59.
Your patches fix the 64-bit wdiag test 66 (shladd) too.
I tested 32/64-bit Linux & 32-bit HP-UX.
No regressions.
Helge
Richard Henderson (3):
target/hppa: Squash d for pa
On 3/26/24 07:44, Richard Henderson wrote:
Overflow indicator should include the effect of the shift step.
We had previously left ??? comments about the issue.
Signed-off-by: Richard Henderson
Tested-by: Helge Deller
Helge
---
target/hppa/translate.c | 85
On 3/26/24 07:44, Richard Henderson wrote:
Prepare for proper indication of shladd unsigned overflow.
The UV indicator will be zero/not-zero instead of a single bit.
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
Tested-by: Helge Deller
Helge
---
target/hppa/translate.c
On 3/26/24 07:44, Richard Henderson wrote:
The cond_need_ext predicate was created while we still had a
32-bit compilation mode. It now makes more sense to treat D
as an absolute indicator of a 64-bit operation.
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
Tested-by: Helge
shadow registers.
Signed-off-by: Helge Deller
diff --git a/target/hppa/helper.h b/target/hppa/helper.h
index 8fd7ba65d8..2c5d58bec9 100644
--- a/target/hppa/helper.h
+++ b/target/hppa/helper.h
@@ -86,6 +86,7 @@ DEF_HELPER_FLAGS_0(read_interval_timer, TCG_CALL_NO_RWG, tl)
#ifndef CONFIG_USER_ONLY
bits for add and subtract, mirroring
the code in do_add and do_sub.
Signed-off-by: Richard Henderson
this patch does not break test #55 (uaddcm) any longer, and with the other
two patches test #58 (uaddcm & dcor) is OK as well.
So, for the whole series:
Reviewed-by: Helge Deller
Tested-by: H
On 3/25/24 04:04, Richard Henderson wrote:
Split do_unit_cond to do_unit_zero_cond to only handle
conditions versus zero. These are the only ones that
are legal for UXOR. Simplify trans_uxor accordingly.
Rename do_unit to do_unit_addsub, since xor has been split.
Properly compute carry-out bit
: Richard Henderson
Reviewed-by: Helge Deller
Tested-by: Helge Deller
Helge
---
target/hppa/translate.c | 24 ++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index a3f425d861..3fc3e7754c 100644
--- a
shift-right to reassemble into a single word
and place them all at bit 0 of their respective nibbles.
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
Tested-by: Helge Deller
Helge
---
target/hppa/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
On 3/24/24 18:13, Richard Henderson wrote:
On 3/23/24 11:15, Helge Deller wrote:
The uaddcmt (UNIT ADD COMPLEMENT AND TRAP ON CONDITION) instruction
triggers a trap if the condition is true, and stores the result of the
addition in the target register otherwise.
It does not use the condition to
: Sven Schnelle
Reviewed-by: Helge Deller
Tested-by: Helge Deller
Helge
---
target/hppa/mem_helper.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c
index 84785b5a5c..6f895fced7 100644
--- a/target/hppa
not break existing 32- and 64-bit Linux installations, so:
Tested-by: Helge Deller
Thanks!
Helge
---
target/hppa/cpu.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index a072d0bb63..9bc4d208fa 100644
--- a/target/hppa/cpu.h
+++ b/t
On 3/24/24 09:09, Sven Schnelle wrote:
move it to cpu.h, so it can also be used in hppa_form_gva_psw()
Signed-off-by: Sven Schnelle
Reviewed-by: Helge Deller
Helge
---
target/hppa/cpu.h | 10 --
target/hppa/translate.c | 12 +++-
2 files changed, 11 insertions
install it as null_cond.
This patch is not tested and as such sent as RFC.
I just stumbled over the apparently wrong behaviour while debugging the
uaddcm instruction.
Signed-off-by: Helge Deller
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 46b2d6508d..6088e9bbf3 100644
--- a
On 3/23/24 18:29, Richard Henderson wrote:
Call translator_io_start before write to EIRR.
Move evaluation of EIRR vs EIEM to hppa_cpu_exec_interrupt.
Exit TB after write to EIEM, but otherwise use a straight store.
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
Tested-by: Helge
On 3/23/24 18:29, Richard Henderson wrote:
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
Tested-by: Helge Deller
Thanks!
Helge
---
target/hppa/translate.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index
On 3/23/24 18:29, Richard Henderson wrote:
The call to gen_helper_read_interval_timer is
identical on both sides of the IF.
Signed-off-by: Richard Henderson
Reviewed-by: Helge Deller
Tested-by: Helge Deller
Thanks!
Helge
---
target/hppa/translate.c | 4 +---
1 file changed, 1
On 3/23/24 18:29, Richard Henderson wrote:
The return address comes from IA*Q_Next, and IASQ_Next
is always equal to IASQ_Back, not IASQ_Front.
Signed-off-by: Richard Henderson
Tested-by: Helge Deller
---
target/hppa/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
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