** Changed in: qemu
Status: Incomplete => Invalid
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https://bugs.launchpad.net/bugs/1868527
Title:
alignment may overlap the TLB flags
Status in QEMU:
Invalid
Bug description
This is an inspection yet.
For ARM SMMU simulation, TARGET_PAGE_BITS_MIN is 10. All low bits of the TLB
virtual address are used up by TLB flags and alignment flags. It's a little
crowded.
/*
* ARMv7 and later CPUs have 4K pages minimum, but ARMv5 and v6
* have to support 1K tiny pages.
*/
# d
That is of course completely dependent on the target page size. So,
yes, a target with a very small page size cannot use large alignments.
The assert makes sure.
Is this comment simply by inspection, or did you have an actual bug to
report?
** Changed in: qemu
Status: New => Incomplete
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