在 2023/5/21 下午6:23, Jiaxun Yang 写道:
As per "Loongson 3A5000/3B5000 Processor Reference Manual",
Loongson 3A5000's IPI implementation have 4 mailboxes per
core.
However, in 78464f023b54 ("hw/loongarch/virt: Modify ipi as
percpu device"), the number of IPI mailboxes was reduced to
one, which mi
在 2023/5/23 21:07, Philippe Mathieu-Daudé 写道:
> On 23/5/23 13:18, Jiaxun Yang wrote:
>>
>>
>>> 2023年5月23日 11:01，Song Gao 写道：
>>>
>>>
>>>
>>> 在 2023/5/23 上午11:22, Jiaxun Yang 写道:
>> [...]
>
Is totally the same on MIPS and LoongArch. I’m guarding them out because
We have differ
在 2023/6/3 下午3:06, Jiaxun Yang 写道:
2023年6月3日 01:28，Peter Maydell 写道：
On Sun, 21 May 2023 at 11:24, Jiaxun Yang wrote:
As per "Loongson 3A5000/3B5000 Processor Reference Manual",
Loongson 3A5000's IPI implementation have 4 mailboxes per
core.
However, in 78464f023b54 ("hw/loongarch/virt:
> 2023年6月3日 01:28，Peter Maydell 写道：
>
> On Sun, 21 May 2023 at 11:24, Jiaxun Yang wrote:
>>
>> As per "Loongson 3A5000/3B5000 Processor Reference Manual",
>> Loongson 3A5000's IPI implementation have 4 mailboxes per
>> core.
>>
>> However, in 78464f023b54 ("hw/loongarch/virt: Modify ipi as
On Sun, 21 May 2023 at 11:24, Jiaxun Yang wrote:
>
> As per "Loongson 3A5000/3B5000 Processor Reference Manual",
> Loongson 3A5000's IPI implementation have 4 mailboxes per
> core.
>
> However, in 78464f023b54 ("hw/loongarch/virt: Modify ipi as
> percpu device"), the number of IPI mailboxes was re
On 23/5/23 13:18, Jiaxun Yang wrote:
2023年5月23日 11:01，Song Gao 写道：
在 2023/5/23 上午11:22, Jiaxun Yang 写道:
[...]
Is totally the same on MIPS and LoongArch. I’m guarding them out because
We have different way to get IOCSR address space on MIPS, which is due
to be implemented.
I can furt
> 2023年5月23日 11:01，Song Gao 写道：
>
>
>
> 在 2023/5/23 上午11:22, Jiaxun Yang 写道:
[...]
>>
>>>
>> Is totally the same on MIPS and LoongArch. I’m guarding them out because
>> We have different way to get IOCSR address space on MIPS, which is due
>> to be implemented.
>>
>> I can further abstrac
在 2023/5/23 上午11:22, Jiaxun Yang 写道:
2023年5月23日 02:25，Song Gao 写道：
在 2023/5/22 下午9:44, Philippe Mathieu-Daudé 写道:
On 22/5/23 13:47, Jiaxun Yang wrote:
2023年5月22日 04:52，Huacai Chen 写道：
Hi, Jiaxun,
Rename loongarch_ipi to loongson_ipi? It will be shared by both MIPS
and LoongArch in
> 2023年5月23日 02:25，Song Gao 写道：
>
>
>
> 在 2023/5/22 下午9:44, Philippe Mathieu-Daudé 写道:
>> On 22/5/23 13:47, Jiaxun Yang wrote:
>>>
>>>
2023年5月22日 04:52，Huacai Chen 写道：
Hi, Jiaxun,
Rename loongarch_ipi to loongson_ipi? It will be shared by both MIPS
and Loon
在 2023/5/22 下午9:44, Philippe Mathieu-Daudé 写道:
On 22/5/23 13:47, Jiaxun Yang wrote:
2023年5月22日 04:52，Huacai Chen 写道：
Hi, Jiaxun,
Rename loongarch_ipi to loongson_ipi? It will be shared by both MIPS
and LoongArch in your series.
Hi Huacai,
Thanks for the point, what’s the opinion from
On 22/5/23 13:47, Jiaxun Yang wrote:
2023年5月22日 04:52，Huacai Chen 写道：
Hi, Jiaxun,
Rename loongarch_ipi to loongson_ipi? It will be shared by both MIPS
and LoongArch in your series.
Hi Huacai,
Thanks for the point, what’s the opinion from LoongArch mainatiners?
Or perhaps rename it as lo
> 2023年5月22日 04:52，Huacai Chen 写道：
>
> Hi, Jiaxun,
>
> Rename loongarch_ipi to loongson_ipi? It will be shared by both MIPS
> and LoongArch in your series.
Hi Huacai,
Thanks for the point, what’s the opinion from LoongArch mainatiners?
Or perhaps rename it as loong_ipi to reflect the natur
Hi, Jiaxun,
Rename loongarch_ipi to loongson_ipi? It will be shared by both MIPS
and LoongArch in your series.
Huacai
On Sun, May 21, 2023 at 6:24 PM Jiaxun Yang wrote:
>
> As per "Loongson 3A5000/3B5000 Processor Reference Manual",
> Loongson 3A5000's IPI implementation have 4 mailboxes per
>
As per "Loongson 3A5000/3B5000 Processor Reference Manual",
Loongson 3A5000's IPI implementation have 4 mailboxes per
core.
However, in 78464f023b54 ("hw/loongarch/virt: Modify ipi as
percpu device"), the number of IPI mailboxes was reduced to
one, which mismatches actual hardware.
It won't affec
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