On Mon, 4 Jul 2022 at 09:28, Richard Henderson
wrote:
>
> On 7/1/22 16:36, Peter Maydell wrote:
> >> +/*
> >> + * The SME exception we are testing for is raised via
> >> + * AArch64.CheckFPAdvSIMDEnabled(), and for AArch32 this is called
> >> + * when EL1 is using A64 or EL2 using
On 7/1/22 16:36, Peter Maydell wrote:
+/*
+ * The SME exception we are testing for is raised via
+ * AArch64.CheckFPAdvSIMDEnabled(), and for AArch32 this is called
+ * when EL1 is using A64 or EL2 using A64 and !TGE.
+ * See AArch32.CheckAdvSIMDOrFPEnabled().
+ */
+
On Tue, 28 Jun 2022 at 05:26, Richard Henderson
wrote:
>
> This new behaviour is in the ARM pseudocode function
> AArch64.CheckFPAdvSIMDEnabled, which applies to AArch32
> via AArch32.CheckAdvSIMDOrFPEnabled when the EL to which
> the trap would be delivered is in AArch64 mode.
>
> Given that
This new behaviour is in the ARM pseudocode function
AArch64.CheckFPAdvSIMDEnabled, which applies to AArch32
via AArch32.CheckAdvSIMDOrFPEnabled when the EL to which
the trap would be delivered is in AArch64 mode.
Given that ARMv9 drops support for AArch32 outside EL0, the trap EL
detection ought