On 5/16/21 11:09 AM, Peter Maydell wrote:
On Sat, 15 May 2021 at 18:13, Richard Henderson
wrote:
On 5/13/21 2:25 PM, Peter Maydell wrote:
-VDOT_scalar 1110 0 . 10 1101 . q:1 index:1 u:1 rm:4 \
- vm=%vm_dp vn=%vn_dp vd=%vd_dp
+VDOT_scalar 1110 0 . 10
On Sat, 15 May 2021 at 18:13, Richard Henderson
wrote:
>
> On 5/13/21 2:25 PM, Peter Maydell wrote:
> >> -VDOT_scalar 1110 0 . 10 1101 . q:1 index:1 u:1 rm:4 \
> >> - vm=%vm_dp vn=%vn_dp vd=%vd_dp
> >> +VDOT_scalar 1110 0 . 10 1101 . q:1 index:1
On 5/13/21 2:25 PM, Peter Maydell wrote:
+static bool do_neon_ddda(DisasContext *s, int q, int vd, int vn, int vm,
+ int data, gen_helper_gvec_4 *fn_gvec)
This patch seems to be doing more than its commit message suggests.
If we want to share code between trans_VDOT and
On 5/13/21 2:25 PM, Peter Maydell wrote:
-VDOT_scalar 1110 0 . 10 1101 . q:1 index:1 u:1 rm:4 \
- vm=%vm_dp vn=%vn_dp vd=%vd_dp
+VDOT_scalar 1110 0 . 10 1101 . q:1 index:1 u:1 vm:4 \
+ vn=%vn_dp vd=%vd_dp
Is it possible to make
On Fri, 30 Apr 2021 at 22:23, Richard Henderson
wrote:
>
> We were extracting the M register twice, once incorrectly
> as M:vm and once correctly as rm. Remove the incorrect
> name and remove the incorrect decode.
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/neon-shared.decode | 4
We were extracting the M register twice, once incorrectly
as M:vm and once correctly as rm. Remove the incorrect
name and remove the incorrect decode.
Signed-off-by: Richard Henderson
---
target/arm/neon-shared.decode | 4 +-
target/arm/translate-neon.c | 90
