On 03/01/2013 07:54 PM, Andreas Färber wrote:
> Am 27.02.2013 18:25, schrieb Fabien Chouteau:
>> On 02/27/2013 05:58 PM, Peter Maydell wrote:
>>> On 27 February 2013 16:37, Fabien Chouteau wrote:
I'm making my first steps in the ARM world by looking at R4F
implementation. More specifical
Am 27.02.2013 18:25, schrieb Fabien Chouteau:
> On 02/27/2013 05:58 PM, Peter Maydell wrote:
>> On 27 February 2013 16:37, Fabien Chouteau wrote:
>>> I'm making my first steps in the ARM world by looking at R4F
>>> implementation. More specifically I'm trying to add VFP3-D16 support
>>> which is,
On 1 March 2013 15:10, Fabien Chouteau wrote:
> On 03/01/2013 02:43 PM, Fabien Chouteau wrote:
>> On 03/01/2013 01:16 PM, Peter Maydell wrote:
>>> OK, that makes sense. I think it's also a reasonable thing for
>>> qemu's qemu-system-armeb model to present to the guest. Have
>>> you changed QEMU to
On 03/01/2013 02:43 PM, Fabien Chouteau wrote:
> On 03/01/2013 01:16 PM, Peter Maydell wrote:
>> On 1 March 2013 12:07, Fabien Chouteau wrote:
>>> On 03/01/2013 12:32 PM, Peter Maydell wrote:
I think you're going to have to run some tests on the actual
hardware to find out what it really
On 03/01/2013 01:16 PM, Peter Maydell wrote:
> On 1 March 2013 12:07, Fabien Chouteau wrote:
>> On 03/01/2013 12:32 PM, Peter Maydell wrote:
>>> I think you're going to have to run some tests on the actual
>>> hardware to find out what it really does. Specifically, what
>>> are the values of SCTLR
On 1 March 2013 12:07, Fabien Chouteau wrote:
> On 03/01/2013 12:32 PM, Peter Maydell wrote:
>> I think you're going to have to run some tests on the actual
>> hardware to find out what it really does. Specifically, what
>> are the values of SCTLR.IE, SCTLR.EE and CPSR.E when you think
>> you're i
On 03/01/2013 12:32 PM, Peter Maydell wrote:
> On 1 March 2013 11:21, Fabien Chouteau wrote:
>> TMS570LS31x/21x Technical Reference Manual:
>>
>> "The TMS570 family is based on the ARM® CortexTM-R4F core. ARM has
>> designed this core to be used in big-endian and little-endian systems.
>> For the
On 1 March 2013 11:21, Fabien Chouteau wrote:
> On 03/01/2013 11:40 AM, Peter Maydell wrote:
>> On 1 March 2013 10:13, Fabien Chouteau wrote:
>>> TMS570 are configured for big-endian only, so this is not a
>>> problem for me.
>>
>> Do you mean they are BE8 for load/stores always (ie SCTLR.EE is
>
On 03/01/2013 11:40 AM, Peter Maydell wrote:
> On 1 March 2013 10:13, Fabien Chouteau wrote:
>> On 02/28/2013 07:42 PM, Peter Maydell wrote:
>>> How are you handling the SCTLR IE and EE bits?
>>
>> I did nothing, as far as I know it's not possible to switch endianness
>> in QEMU.
>
> Yes, that's w
On 1 March 2013 10:13, Fabien Chouteau wrote:
> On 02/28/2013 07:42 PM, Peter Maydell wrote:
>> How are you handling the SCTLR IE and EE bits?
>
> I did nothing, as far as I know it's not possible to switch endianness
> in QEMU.
Yes, that's why I'm wondering how you're handling them.
> TMS570 ar
On 02/28/2013 07:42 PM, Peter Maydell wrote:
> On 28 February 2013 17:39, Fabien Chouteau wrote:
>> On 02/28/2013 03:16 PM, Peter Maydell wrote:
>>> On 28 February 2013 14:01, Fabien Chouteau wrote:
In fact I'm
working on a big-endian R4F (TMS570) and I have endianness issue in the
On 28 February 2013 17:39, Fabien Chouteau wrote:
> On 02/28/2013 03:16 PM, Peter Maydell wrote:
>> On 28 February 2013 14:01, Fabien Chouteau wrote:
>>> In fact I'm
>>> working on a big-endian R4F (TMS570) and I have endianness issue in the
>>> communication with GDB.
>>
>> If you're also trying
On 02/28/2013 03:16 PM, Peter Maydell wrote:
> On 28 February 2013 14:01, Fabien Chouteau wrote:
>> On 02/27/2013 09:49 PM, Paul Brook wrote:
>>> I've got a patch to implement this as a side-effect of a different feature,
>>> I'll look at pushing it out.
>>
>> Great, don't hesitate to ask if you w
On 28 February 2013 14:01, Fabien Chouteau wrote:
> On 02/27/2013 09:49 PM, Paul Brook wrote:
>> I've got a patch to implement this as a side-effect of a different feature,
>> I'll look at pushing it out.
>
> Great, don't hesitate to ask if you want some help.
>
> In the meantime I have another qu
On 02/27/2013 09:49 PM, Paul Brook wrote:
> I've got a patch to implement this as a side-effect of a different feature,
> I'll look at pushing it out.
Great, don't hesitate to ask if you want some help.
In the meantime I have another question for you. In
helper.c:vfp_gdb_get_reg(), there's a com
> > Probably what you'll want is to have a separate feature bit for 32
> > dregs which is set by default for vfpv3, and then use that in
> > VFP_DREG rather than the vfpv3 feature bit.
>
> Right, it might be easier than I though. Maybe add a
> ARM_FEATURE_VFP3_D16 and do:
>
> #define VFP_DREG(reg,
On 02/27/2013 05:58 PM, Peter Maydell wrote:
> On 27 February 2013 16:37, Fabien Chouteau wrote:
>> I'm making my first steps in the ARM world by looking at R4F
>> implementation. More specifically I'm trying to add VFP3-D16 support
>> which is, as far as I understand, a regular VFP3 with only 16
On 27 February 2013 16:37, Fabien Chouteau wrote:
> I'm making my first steps in the ARM world by looking at R4F
> implementation. More specifically I'm trying to add VFP3-D16 support
> which is, as far as I understand, a regular VFP3 with only 16 D
> registers instead of 32.
Andreas was looking
Hello QEMU folks,
I'm making my first steps in the ARM world by looking at R4F
implementation. More specifically I'm trying to add VFP3-D16 support
which is, as far as I understand, a regular VFP3 with only 16 D
registers instead of 32.
My question is: where do I check that an instruction is acce
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