On Tue, 2 May 2006, Marius Groeger wrote:
again, a current version of my FPU patch for MIPS. Fabrice, I tried to
Sorry, hunk #1 of the target-mips/op_mem.c patch got out wrong. (I
wanted to remove other feature patches[1] first and seemed to have
messed up in doing so.) Just delete this hunk
Hi Fabrice,
thanks for the review.
On Thu, 27 Apr 2006, Fabrice Bellard wrote:
1) Why do you use 3 temporaries ? Maybe two suffice in most cases.
Well, I less temporaries don't gain performance, while a
FDT2 = FDT0 * FDT1
fpu_dump_state()
allows for easier debugging. Therefore I'd rath
A few remarks:
1) Why do you use 3 temporaries ? Maybe two suffice in most cases.
2) do_cmp_d() should be completely decoded at translation time.
3) I suspect the macro FPR() does too many things at runtime which gives
an important performance loss. CP0St_FR should be known at translation time
Hi All,
a new version of my FPU patch, now actually doing some math. Known
issues include, but may not be limited to:
- only support .d format, that is IEEE 64bit
- no proper float exception handling. If someone gets CONFIG_SOFTFLOAT
to compile, this should be quite easy to improve. Most of
