Re: [Qemu-devel] [PATCH] sparc32 use stq_* for 64bit stores

2007-10-14 Thread Blue Swirl
On 10/14/07, Robert Reif <[EMAIL PROTECTED]> wrote: > Use stq_* for 64 bit stores. I changed also uses of 64 bit loads to ldq. But it looks like this makes OpenBIOS trigger alignment traps, this is the same reason why the alignment checks aren't fully enabled. So I can't commit this yet except for

Re: [Qemu-devel] [PATCH] sparc32 use stq_* for 64bit stores

2007-10-14 Thread Blue Swirl
On 10/14/07, Robert Reif <[EMAIL PROTECTED]> wrote: > Blue Swirl wrote: > > >On 10/14/07, Robert Reif <[EMAIL PROTECTED]> wrote: > > > > > >>Should the address be 64 bit alligned? i.e. T0 & ~7 rather than T0 & ~3? > >> > >>Should these unaligned address cause traps? > >> > >> > > > >Yes, but the c

Re: [Qemu-devel] [PATCH] sparc32 use stq_* for 64bit stores

2007-10-14 Thread Robert Reif
Blue Swirl wrote: On 10/14/07, Robert Reif <[EMAIL PROTECTED]> wrote: Should the address be 64 bit alligned? i.e. T0 & ~7 rather than T0 & ~3? Should these unaligned address cause traps? Yes, but the checks are already generated from translate.c (gen_op_check_align_T0_7). De we

Re: [Qemu-devel] [PATCH] sparc32 use stq_* for 64bit stores

2007-10-14 Thread Blue Swirl
On 10/14/07, Robert Reif <[EMAIL PROTECTED]> wrote: > Use stq_* for 64 bit stores. This could be less optimal for 32 bit hosts, but hopefully the compiler knows its business. > This fixes one bug where T1 was used twice rather than T1 and T2. Great! > Should the address be 64 bit alligned? i.e

[Qemu-devel] [PATCH] sparc32 use stq_* for 64bit stores

2007-10-14 Thread Robert Reif
Use stq_* for 64 bit stores. This fixes one bug where T1 was used twice rather than T1 and T2. Should the address be 64 bit alligned? i.e. T0 & ~7 rather than T0 & ~3? Should these unaligned address cause traps? Index: target-sparc/op_helper.c =