Re: [Qemu-devel] [PATCH 0/2] hw/adc: Implement a basic Aspeed ADC model

2017-05-19 Thread Andrew Jeffery
On Fri, 2017-05-19 at 17:51 -0700, no-re...@patchew.org wrote: > In file included from /tmp/qemu-test/src/hw/adc/aspeed_adc.c:15:0: > /tmp/qemu-test/src/hw/adc/aspeed_adc.c: In function 'aspeed_adc_read': > /tmp/qemu-test/src/hw/adc/aspeed_adc.c:106:34: error: format '%lx' expects > argument of ty

[Qemu-devel] [PATCH 0/2] hw/adc: Implement a basic Aspeed ADC model

2017-05-19 Thread Andrew Jeffery
Hello, This short series introduces a basic model for the Aspeed ADC and glues it into the generic Aspeed SoC definition. The register interface is enhanced slightly from the AST2400 to the AST2500, but in a backwards-compatible way by making use of reserved bits. As such I haven't made any effort