On 26/09/2016 18:35, Andreas Färber wrote:
> Am 26.09.2016 um 18:24 schrieb Paolo Bonzini:
>> On 26/09/2016 18:20, Andreas Färber wrote:
>>> Am 26.09.2016 um 18:17 schrieb Richard Henderson:
On 09/26/2016 05:20 AM, Paolo Bonzini wrote:
> On 26/09/2016 12:56, Sagar Karandikar wrote:
>
Am 26.09.2016 um 18:24 schrieb Paolo Bonzini:
> On 26/09/2016 18:20, Andreas Färber wrote:
>> Am 26.09.2016 um 18:17 schrieb Richard Henderson:
>>> On 09/26/2016 05:20 AM, Paolo Bonzini wrote:
On 26/09/2016 12:56, Sagar Karandikar wrote:
> -cpu-qom.h merged into cpu.h
Please foll
On 26/09/2016 18:20, Andreas Färber wrote:
> Am 26.09.2016 um 18:17 schrieb Richard Henderson:
>> On 09/26/2016 05:20 AM, Paolo Bonzini wrote:
>>> On 26/09/2016 12:56, Sagar Karandikar wrote:
-cpu-qom.h merged into cpu.h
>>>
>>> Please follow the model of other targets. RISCVCPUClass and th
Am 26.09.2016 um 18:17 schrieb Richard Henderson:
> On 09/26/2016 05:20 AM, Paolo Bonzini wrote:
>> On 26/09/2016 12:56, Sagar Karandikar wrote:
>>> -cpu-qom.h merged into cpu.h
>>
>> Please follow the model of other targets. RISCVCPUClass and the
>> RISCVCPU typedef should be in cpu-qom.h.
>
> I
On 09/26/2016 05:20 AM, Paolo Bonzini wrote:
On 26/09/2016 12:56, Sagar Karandikar wrote:
-cpu-qom.h merged into cpu.h
Please follow the model of other targets. RISCVCPUClass and the
RISCVCPU typedef should be in cpu-qom.h.
I thought we had this discussion before, and cpu-qom.h is sort of
On 26/09/2016 12:56, Sagar Karandikar wrote:
> -cpu-qom.h merged into cpu.h
Please follow the model of other targets. RISCVCPUClass and the
RISCVCPU typedef should be in cpu-qom.h.
Paolo
This patch set adds support for the RISC-V ISA [1] as a system-mode
target. It has been tested booting Linux and FreeBSD, passes the RISC-V
assembly test suite, and has had the riscv-torture [2] tester running on it for
a while now without any issues arising. This patch set supports RV64G and
RV