Re: [Qemu-devel] [PATCH 1/2] target/arm: Allow ARMCPRegInfo read/write functions to throw exceptions

2019-08-27 Thread Peter Maydell
On Sun, 18 Aug 2019 at 07:12, Richard Henderson wrote: > > On 8/16/19 1:58 PM, Peter Maydell wrote: > > @@ -1729,6 +1729,12 @@ static void handle_sys(DisasContext *s, uint32_t > > insn, bool isread, > > tcg_temp_free_ptr(tmpptr); > > tcg_temp_free_i32(tcg_syn); > > tcg_

Re: [Qemu-devel] [PATCH 1/2] target/arm: Allow ARMCPRegInfo read/write functions to throw exceptions

2019-08-17 Thread Richard Henderson
On 8/16/19 1:58 PM, Peter Maydell wrote: > @@ -1729,6 +1729,12 @@ static void handle_sys(DisasContext *s, uint32_t insn, > bool isread, > tcg_temp_free_ptr(tmpptr); > tcg_temp_free_i32(tcg_syn); > tcg_temp_free_i32(tcg_isread); > +} else if (ri->type & ARM_CP_RAISES_

[Qemu-devel] [PATCH 1/2] target/arm: Allow ARMCPRegInfo read/write functions to throw exceptions

2019-08-16 Thread Peter Maydell
Currently the only part of an ARMCPRegInfo which is allowed to cause a CPU exception is the access function, which returns a value indicating that some flavour of UNDEF should be generated. For the ATS system instructions, we would like to conditionally generate exceptions as part of the writefn,