On 05/06/2018 01:27, John Snow wrote:
>
>
> On 06/04/2018 11:50 AM, Paolo Bonzini wrote:
>> On 02/06/2018 03:22, John Snow wrote:
>>> - Status: Should be the status register after receiving the H2D Register
>>> update FIS, but prior to the data transfer, I think. "New value of the
>>> Status
On 06/04/2018 11:50 AM, Paolo Bonzini wrote:
> On 02/06/2018 03:22, John Snow wrote:
>> - Status: Should be the status register after receiving the H2D Register
>> update FIS, but prior to the data transfer, I think. "New value of the
>> Status register of the Command Block for initiation of
On 02/06/2018 03:22, John Snow wrote:
> - Status: Should be the status register after receiving the H2D Register
> update FIS, but prior to the data transfer, I think. "New value of the
> Status register of the Command Block for initiation of host data
> transfer."
> I think this is being s
On 04/17/2018 11:39 AM, Paolo Bonzini wrote:
> The PIO Setup FIS is written in the PIO:Entry state, which comes before
> the ATA and ATAPI data transfer states. As a result, the PIO Setup FIS
> interrupt is now raised before DMA ends for ATAPI commands, and tests have
> to be adjusted.
>
Yes,
The PIO Setup FIS is written in the PIO:Entry state, which comes before
the ATA and ATAPI data transfer states. As a result, the PIO Setup FIS
interrupt is now raised before DMA ends for ATAPI commands, and tests have
to be adjusted.
This is also hinted by the description of the command header in
