> The emulated CPU still identifies itself as a MIPS32(R1) 4Kc.
> Currently it doesn't throw a RI exception for R2 instructions, this
> is useful for Linux userland emulation, and also follows the current
> policy which doesn't distinguish between MIPS32R1 instructions and
> those of earlier ISAs.
[The previous patch had a broken MIPS32R2 bitops implementation,
and was apparently too big to make it to the list. I retry now
with a compressed attachment.]
Hello All,
this patch adds support for all mandatory MIPS32R2 instructions,
rationalizes the instruction decoding to check always 32-bit w
