On Tue, 18 Jun 2019 at 16:54, Cédric Le Goater wrote:
>
> From: Andrew Jeffery
>
> From the datasheet:
>
> This register stores the current status of counter #N. When timer
> enable bit TMC30[N * b] is disabled, the reload register will be
> loaded into this counter. When timer bit TMC30[N
From: Andrew Jeffery
>From the datasheet:
This register stores the current status of counter #N. When timer
enable bit TMC30[N * b] is disabled, the reload register will be
loaded into this counter. When timer bit TMC30[N * b] is set, the
counter will start to decrement. CPU can update
