On 26 February 2014 19:47, Rob Herring wrote:
> Tagged addresses would probably be broken in other places as well as I
> don't think we handle all of the BranchTo() pseudocode. I'm not sure
> anything is using tagged addresses ATM.
Yeah, I agree we would need to fix other places too at some point
On Wed, Feb 26, 2014 at 4:31 AM, Peter Maydell wrote:
> On 26 February 2014 03:32, Hu Tao wrote:
>> On Wed, Feb 26, 2014 at 10:49:59AM +0800, Hu Tao wrote:
>>> On Sat, Feb 15, 2014 at 04:07:24PM +, Peter Maydell wrote:
>>> > From: Rob Herring
>
>>> > /* Determine whether this address is
On 26 February 2014 03:32, Hu Tao wrote:
> On Wed, Feb 26, 2014 at 10:49:59AM +0800, Hu Tao wrote:
>> On Sat, Feb 15, 2014 at 04:07:24PM +, Peter Maydell wrote:
>> > From: Rob Herring
>> > /* Determine whether this address is in the region controlled by
>> > * TTBR0 or TTBR1 (or i
On Wed, Feb 26, 2014 at 10:49:59AM +0800, Hu Tao wrote:
> On Sat, Feb 15, 2014 at 04:07:24PM +, Peter Maydell wrote:
> > From: Rob Herring
> >
> > Add support for v8 page table walks. This supports stage 1 translations
> > for 4KB, 16KB and 64KB page sizes starting with 0 or 1 level.
> >
> >
On Sat, Feb 15, 2014 at 04:07:24PM +, Peter Maydell wrote:
> From: Rob Herring
>
> Add support for v8 page table walks. This supports stage 1 translations
> for 4KB, 16KB and 64KB page sizes starting with 0 or 1 level.
>
> Signed-off-by: Rob Herring
> [PMM: fix style nits, fold in 16/64K pa
From: Rob Herring
Add support for v8 page table walks. This supports stage 1 translations
for 4KB, 16KB and 64KB page sizes starting with 0 or 1 level.
Signed-off-by: Rob Herring
[PMM: fix style nits, fold in 16/64K page support patch, use
arm_el_is_aa64() to decide whether to do 64 bit page t
