Re: [Qemu-devel] [PATCH v3 4/5] xilinx_devcfg: Zynq devcfg device model

2013-05-31 Thread Peter Crosthwaite
Hi Anthony, On Fri, May 31, 2013 at 5:41 AM, Anthony Liguori anth...@codemonkey.ws wrote: Peter Crosthwaite peter.crosthwa...@xilinx.com writes: [snip] } That's still possible using just the register API (Patch 2 content only) and throwing away the memory API glue. I think its actually

Re: [Qemu-devel] [PATCH v3 4/5] xilinx_devcfg: Zynq devcfg device model

2013-05-30 Thread Peter Crosthwaite
On Thu, May 30, 2013 at 3:08 AM, Paolo Bonzini pbonz...@redhat.com wrote: Il 29/05/2013 19:04, Edgar E. Iglesias ha scritto: +for (i = 0; i R_MAX; ++i) { +RegisterInfo *r = s-regs_info[i]; + +*r = (RegisterInfo) { +.data = s-regs[i], +

Re: [Qemu-devel] [PATCH v3 4/5] xilinx_devcfg: Zynq devcfg device model

2013-05-30 Thread Paolo Bonzini
Il 30/05/2013 09:15, Peter Crosthwaite ha scritto: Hi Peter, Should we be putting r-access-name here instead of devcfg-regs? Yes, that's why I preferred to wrap the memory_region_init_io into an API that takes a RegisterInfo. :) ACK, You've convinced me :). Will be in v4 (pending

Re: [Qemu-devel] [PATCH v3 4/5] xilinx_devcfg: Zynq devcfg device model

2013-05-30 Thread Anthony Liguori
Peter Crosthwaite peter.crosthwa...@xilinx.com writes: Hi Anthony, On Thu, May 30, 2013 at 3:57 AM, Anthony Liguori anth...@codemonkey.ws wrote: peter.crosthwa...@xilinx.com writes: From: Peter A. G. Crosthwaite peter.crosthwa...@petalogix.com Minimal device model for devcfg module of

Re: [Qemu-devel] [PATCH v3 4/5] xilinx_devcfg: Zynq devcfg device model

2013-05-29 Thread Paolo Bonzini
Il 24/05/2013 07:49, peter.crosthwa...@xilinx.com ha scritto: +static const MemoryRegionOps devcfg_reg_ops = { +.read = register_read_memory_le, +.write = register_write_memory_le, +.endianness = DEVICE_LITTLE_ENDIAN, +.valid = { +.min_access_size = 4, +

Re: [Qemu-devel] [PATCH v3 4/5] xilinx_devcfg: Zynq devcfg device model

2013-05-29 Thread Peter Crosthwaite
Hi Paolo, On Wed, May 29, 2013 at 6:51 PM, Paolo Bonzini pbonz...@redhat.com wrote: Il 24/05/2013 07:49, peter.crosthwa...@xilinx.com ha scritto: +static const MemoryRegionOps devcfg_reg_ops = { +.read = register_read_memory_le, +.write = register_write_memory_le, +.endianness =

Re: [Qemu-devel] [PATCH v3 4/5] xilinx_devcfg: Zynq devcfg device model

2013-05-29 Thread Paolo Bonzini
Il 29/05/2013 15:54, Peter Crosthwaite ha scritto: Hi Paolo, On Wed, May 29, 2013 at 6:51 PM, Paolo Bonzini pbonz...@redhat.com wrote: Il 24/05/2013 07:49, peter.crosthwa...@xilinx.com ha scritto: +static const MemoryRegionOps devcfg_reg_ops = { +.read = register_read_memory_le, +

Re: [Qemu-devel] [PATCH v3 4/5] xilinx_devcfg: Zynq devcfg device model

2013-05-29 Thread Edgar E. Iglesias
On Fri, May 24, 2013 at 03:49:00PM +1000, peter.crosthwa...@xilinx.com wrote: From: Peter A. G. Crosthwaite peter.crosthwa...@petalogix.com Minimal device model for devcfg module of Zynq. DMA capabilities and interrupt generation supported. Signed-off-by: Peter A. G. Crosthwaite

Re: [Qemu-devel] [PATCH v3 4/5] xilinx_devcfg: Zynq devcfg device model

2013-05-29 Thread Paolo Bonzini
Il 29/05/2013 19:04, Edgar E. Iglesias ha scritto: +for (i = 0; i R_MAX; ++i) { +RegisterInfo *r = s-regs_info[i]; + +*r = (RegisterInfo) { +.data = s-regs[i], +.data_size = sizeof(uint32_t), +.access =

Re: [Qemu-devel] [PATCH v3 4/5] xilinx_devcfg: Zynq devcfg device model

2013-05-29 Thread Anthony Liguori
peter.crosthwa...@xilinx.com writes: From: Peter A. G. Crosthwaite peter.crosthwa...@petalogix.com Minimal device model for devcfg module of Zynq. DMA capabilities and interrupt generation supported. Signed-off-by: Peter A. G. Crosthwaite peter.crosthwa...@petalogix.com --- Changed since

Re: [Qemu-devel] [PATCH v3 4/5] xilinx_devcfg: Zynq devcfg device model

2013-05-29 Thread Anthony Liguori
Anthony Liguori anth...@codemonkey.ws writes: peter.crosthwa...@xilinx.com writes: From: Peter A. G. Crosthwaite peter.crosthwa...@petalogix.com Minimal device model for devcfg module of Zynq. DMA capabilities and interrupt generation supported. Signed-off-by: Peter A. G. Crosthwaite

Re: [Qemu-devel] [PATCH v3 4/5] xilinx_devcfg: Zynq devcfg device model

2013-05-29 Thread Peter Crosthwaite
Hi Anthony, On Thu, May 30, 2013 at 3:57 AM, Anthony Liguori anth...@codemonkey.ws wrote: peter.crosthwa...@xilinx.com writes: From: Peter A. G. Crosthwaite peter.crosthwa...@petalogix.com Minimal device model for devcfg module of Zynq. DMA capabilities and interrupt generation supported.

[Qemu-devel] [PATCH v3 4/5] xilinx_devcfg: Zynq devcfg device model

2013-05-23 Thread peter . crosthwaite
From: Peter A. G. Crosthwaite peter.crosthwa...@petalogix.com Minimal device model for devcfg module of Zynq. DMA capabilities and interrupt generation supported. Signed-off-by: Peter A. G. Crosthwaite peter.crosthwa...@petalogix.com --- Changed since v2: Some QOM styling updates. Re-implemented