On Wed, Feb 3, 2016 at 10:37 AM, Peter Maydell wrote:
> On 2 February 2016 at 23:22, Alistair Francis wrote:
>> On Tue, Feb 2, 2016 at 3:01 PM, Christopher Covington
>> wrote:
>>> As for the status of our TCG PMU patches, unfortunately, last I recall,
>>> I was writing some kvm-unit-tests that D
On 2 February 2016 at 23:22, Alistair Francis wrote:
> On Tue, Feb 2, 2016 at 3:01 PM, Christopher Covington
> wrote:
>> As for the status of our TCG PMU patches, unfortunately, last I recall,
>> I was writing some kvm-unit-tests that Drew wanted me to test against
>> the KVM PMU, which required
On Tue, Feb 2, 2016 at 3:01 PM, Christopher Covington
wrote:
> Hi Alistair,
>
> On 02/02/2016 04:22 PM, Alistair Francis wrote:
>> On Wed, Aug 5, 2015 at 9:51 AM, Christopher Covington
>> wrote:
>>> This adds logic to increment PMEVCNTR's based on different event inputs,
>>> implements all remain
Hi Alistair,
On 02/02/2016 04:22 PM, Alistair Francis wrote:
> On Wed, Aug 5, 2015 at 9:51 AM, Christopher Covington
> wrote:
>> This adds logic to increment PMEVCNTR's based on different event inputs,
>> implements all remaining CP registers, and triggers an interrupt on
>> event overflow.
>
>
On Wed, Aug 5, 2015 at 9:51 AM, Christopher Covington
wrote:
> This adds logic to increment PMEVCNTR's based on different event inputs,
> implements all remaining CP registers, and triggers an interrupt on
> event overflow.
We (Xilinx) need parts of this patch to avoid kernel panics when
booting
This adds logic to increment PMEVCNTR's based on different event inputs,
implements all remaining CP registers, and triggers an interrupt on
event overflow.
Written by Aaron Lindsay.
Signed-off-by: Christopher Covington
---
target-arm/cpu-qom.h | 2 +
target-arm/cpu.c | 2 +
target-arm/
