Re: [Qemu-devel] AArch64 QEMU System emulation: issue with TTBR0

2014-06-08 Thread Ian Campbell
On Tue, 2014-06-03 at 14:28 +0200, Claudio Fontana wrote: Thank you for the clarifications and advice, I think executable permissions might be involved, as removing the NX / PNX check in get_phys_addr_lpae() makes it proceed ahead I'm seeing something very similar running modprobe, I get a

Re: [Qemu-devel] AArch64 QEMU System emulation: issue with TTBR0

2014-06-08 Thread Peter Maydell
On 8 June 2014 12:26, Ian Campbell i...@hellion.org.uk wrote: On Tue, 2014-06-03 at 14:28 +0200, Claudio Fontana wrote: Thank you for the clarifications and advice, I think executable permissions might be involved, as removing the NX / PNX check in get_phys_addr_lpae() makes it proceed ahead

Re: [Qemu-devel] AArch64 QEMU System emulation: issue with TTBR0

2014-06-08 Thread Ian Campbell
On Sun, 2014-06-08 at 13:19 +0100, Peter Maydell wrote: On 8 June 2014 12:26, Ian Campbell i...@hellion.org.uk wrote: On Tue, 2014-06-03 at 14:28 +0200, Claudio Fontana wrote: Thank you for the clarifications and advice, I think executable permissions might be involved, as removing the NX /

Re: [Qemu-devel] AArch64 QEMU System emulation: issue with TTBR0

2014-06-08 Thread Ian Campbell
On Sun, 2014-06-08 at 14:27 +0100, Ian Campbell wrote: get_phys_addr_lpae: XN == 1000 yes, PXN == 800 no Which I think is correct. Aha, for VMSA-v8 bit 54 is UXN unlike v7 where it is just XN. So that's the underlying bug I'm seeing I think... I'll confirm and post a patch.

Re: [Qemu-devel] AArch64 QEMU System emulation: issue with TTBR0

2014-06-03 Thread Rob Herring
On Mon, Jun 2, 2014 at 11:16 AM, Claudio Fontana hw.clau...@gmail.com wrote: Hello Peter, I am porting OSv to AArch64, and I have some working code running on the Foundation Models, where I run qemu natively with --enable-kvm, which does not seem to work when run instead on top of the

Re: [Qemu-devel] AArch64 QEMU System emulation: issue with TTBR0

2014-06-03 Thread Claudio Fontana
On 02.06.2014 18:37, Peter Maydell wrote: On 2 June 2014 17:16, Claudio Fontana hw.clau...@gmail.com wrote: In particular I get a sync exception when I try to msr to TTBR0_EL1. The ESR as read in env-cp15.esr_el[1] is 0x840e, which looking up in the ESR table means Instruction fault,

Re: [Qemu-devel] AArch64 QEMU System emulation: issue with TTBR0

2014-06-03 Thread Claudio Fontana
On 03.06.2014 11:34, Rob Herring wrote: On Mon, Jun 2, 2014 at 11:16 AM, Claudio Fontana hw.clau...@gmail.com wrote: Hello Peter, I am porting OSv to AArch64, and I have some working code running on the Foundation Models, where I run qemu natively with --enable-kvm, which does not seem to

[Qemu-devel] AArch64 QEMU System emulation: issue with TTBR0

2014-06-02 Thread Claudio Fontana
Hello Peter, I am porting OSv to AArch64, and I have some working code running on the Foundation Models, where I run qemu natively with --enable-kvm, which does not seem to work when run instead on top of the system emulation. In particular I get a sync exception when I try to msr to TTBR0_EL1.

Re: [Qemu-devel] AArch64 QEMU System emulation: issue with TTBR0

2014-06-02 Thread Claudio Fontana
On 2 June 2014 18:16, Claudio Fontana hw.clau...@gmail.com wrote: Hello Peter, I am porting OSv to AArch64, and I have some working code running on the Foundation Models, where I run qemu natively with --enable-kvm, which does not seem to work when run instead on top of the system

Re: [Qemu-devel] AArch64 QEMU System emulation: issue with TTBR0

2014-06-02 Thread Peter Maydell
On 2 June 2014 17:21, Claudio Fontana hw.clau...@gmail.com wrote: hmm one thing that came to mind of course after posting, is that QEMU in system emulation mode probably tries to start at EL2 or EL3, while on OSv I assume to be running as a guest at EL1. No, at the moment both QEMU's system

Re: [Qemu-devel] AArch64 QEMU System emulation: issue with TTBR0

2014-06-02 Thread Peter Maydell
On 2 June 2014 17:16, Claudio Fontana hw.clau...@gmail.com wrote: In particular I get a sync exception when I try to msr to TTBR0_EL1. The ESR as read in env-cp15.esr_el[1] is 0x840e, which looking up in the ESR table means Instruction fault, with IFSC (instruction fault status code) =