Re: [Qemu-devel] ARM v6 memory barrier cp15 ops still implemented as NOPs

On 16 June 2017 at 20:41, Alex Bennée wrote: > > Peter Maydell writes: > >> Hi; I just noticed that we seem to still implement the ARM v6 >> memory-barrier cp15 ops as NOPs: >> >> { .name = "ISB", .cp = 15, .crn = 7, .crm = 5, .opc1 = 0,

Re: [Qemu-devel] ARM v6 memory barrier cp15 ops still implemented as NOPs

Peter Maydell writes: > Hi; I just noticed that we seem to still implement the ARM v6 > memory-barrier cp15 ops as NOPs: > > { .name = "ISB", .cp = 15, .crn = 7, .crm = 5, .opc1 = 0, .opc2 = 4, > .access = PL0_W, .type = ARM_CP_NO_RAW, .writefn =

[Qemu-devel] ARM v6 memory barrier cp15 ops still implemented as NOPs

Hi; I just noticed that we seem to still implement the ARM v6 memory-barrier cp15 ops as NOPs: { .name = "ISB", .cp = 15, .crn = 7, .crm = 5, .opc1 = 0, .opc2 = 4, .access = PL0_W, .type = ARM_CP_NO_RAW, .writefn = arm_cp_write_ignore }, { .name = "DSB", .cp = 15, .crn = 7, .crm =