> -Original Message-
> From: Michael S. Tsirkin
> Sent: Wednesday, July 17, 2024 8:04 PM
> To: Yao, Xingtao/姚 幸涛
> Cc: marcel.apfelb...@gmail.com; qemu-devel@nongnu.org;
> jonathan.came...@huawei.com
> Subject: Re: [PATCH v2] pci-bridge: avoid linking a single do
> -Original Message-
> From: Philippe Mathieu-Daudé
> Sent: Wednesday, July 17, 2024 6:18 PM
> To: Yao, Xingtao/姚 幸涛 ; m...@redhat.com;
> marcel.apfelb...@gmail.com
> Cc: qemu-devel@nongnu.org; jonathan.came...@huawei.com
> Subject: Re: [PATCH v2] pci-bridge: a
On Wed, Jul 17, 2024 at 04:56:21AM -0400, Yao Xingtao wrote:
> Since the downstream port is not checked, two slots can be linked to
> a single port. However, this can prevent the driver from detecting the
> device properly.
>
> It is necessary to ensure that a downstream port is not linked more th
Hi Yao,
On 17/7/24 10:56, Yao Xingtao via wrote:
Since the downstream port is not checked, two slots can be linked to
a single port. However, this can prevent the driver from detecting the
device properly.
It is necessary to ensure that a downstream port is not linked more than
once.
Links:
h
