Re: TCG op for 32 bit only cpu on qemu-riscv64

2021-06-10 Thread LIU Zhiwei
On 6/10/21 9:29 PM, Richard Henderson wrote: On 6/9/21 6:43 PM, LIU Zhiwei wrote: 1)First a multiply instruction, if the source value big enough, it will return a result with some bits not zero in MSW 32-bit. Multiply is fine.  Input bits outside the low 32 cannot appear in the low 32 of th

Re: TCG op for 32 bit only cpu on qemu-riscv64

2021-06-10 Thread Richard Henderson
On 6/9/21 6:43 PM, LIU Zhiwei wrote: 1)First a multiply instruction, if the source value big enough, it will return a result with some bits not zero in MSW 32-bit. Multiply is fine. Input bits outside the low 32 cannot appear in the low 32 of the output. Multiply-high-part on the other hand

Re: TCG op for 32 bit only cpu on qemu-riscv64

2021-06-09 Thread LIU Zhiwei
On 6/7/21 11:52 PM, Richard Henderson wrote: On 6/6/21 8:07 PM, LIU Zhiwei wrote: Hi Alistair, As I see,  we are moving  on to remove TARGET_RISCV64 macro. I have some questions: 1) Which tcg op should use when translate an instruction for 32bit cpu. The tcg_*_i64, tcg_*_i32 or tcg_*_tl?

Re: TCG op for 32 bit only cpu on qemu-riscv64

2021-06-07 Thread Richard Henderson
On 6/7/21 2:22 AM, LIU Zhiwei wrote: I am implementing RVP to get rid of TARGET_RISCV64. After we have recognized an instruction only used by a 32-bit CPU, 1) Should we only use the lowest 32bits of the 64bits register in RV64? TCGv s; TCGv_i32 s32; s = tcg_new_temp(); s32 = tcg_new_temp_i32

Re: TCG op for 32 bit only cpu on qemu-riscv64

2021-06-07 Thread Richard Henderson
On 6/6/21 8:07 PM, LIU Zhiwei wrote: Hi Alistair, As I see,  we are moving  on to remove TARGET_RISCV64 macro. I have some questions: 1) Which tcg op should use when translate an instruction for 32bit cpu. The tcg_*_i64, tcg_*_i32 or tcg_*_tl? You use *_tl, because that's the size of the fi

Re: TCG op for 32 bit only cpu on qemu-riscv64

2021-06-07 Thread LIU Zhiwei
On 6/7/21 2:22 PM, Alistair Francis wrote: On Mon, Jun 7, 2021 at 1:09 PM LIU Zhiwei wrote: Hi Alistair, As I see, we are moving on to remove TARGET_RISCV64 macro. I have some questions: 1) Which tcg op should use when translate an instruction for 32bit cpu. The tcg_*_i64, tcg_*_i32 or t

Re: TCG op for 32 bit only cpu on qemu-riscv64

2021-06-06 Thread Alistair Francis
On Mon, Jun 7, 2021 at 1:09 PM LIU Zhiwei wrote: > > Hi Alistair, > > As I see, we are moving on to remove TARGET_RISCV64 macro. > > I have some questions: > > 1) Which tcg op should use when translate an instruction for 32bit cpu. > The tcg_*_i64, tcg_*_i32 or tcg_*_tl? > I see some API such as

TCG op for 32 bit only cpu on qemu-riscv64

2021-06-06 Thread LIU Zhiwei
Hi Alistair, As I see,  we are moving  on to remove TARGET_RISCV64 macro. I have some questions: 1) Which tcg op should use when translate an instruction for 32bit cpu. The tcg_*_i64, tcg_*_i32 or tcg_*_tl? I see some API such as gen_get_gpr that are using the tcg_*_tl. But I am not sure if i