> On 16 Jan 2018, at 8:28, Jason Wang wrote:
>
>
>
> On 2018年01月16日 10:48, Michael S. Tsirkin wrote:
>> On Tue, Jan 09, 2018 at 12:10:10PM +1100, David Gibson wrote:
>>> On Mon, Jan 08, 2018 at 08:10:23PM +0200, Michael S. Tsirkin wrote:
On Mon, Jan 08, 2018 at 09:14:41AM +, Peter Ma
16.01.2018 00:26, John Snow wrote:
On 01/11/2018 10:15 AM, Vladimir Sementsov-Ogievskiy wrote:
11.01.2018 17:43, Eric Blake wrote:
On 01/11/2018 08:26 AM, Vladimir Sementsov-Ogievskiy wrote:
# @autoload: the bitmap will be automatically loaded when the image it
is stored
# in is o
> -Original Message-
> From: Michael S. Tsirkin [mailto:m...@redhat.com]
> Sent: Tuesday, January 16, 2018 12:42 PM
> To: Zhoujian (jay)
> Cc: qemu-devel@nongnu.org; imamm...@redhat.com; Huangweidong (C)
> ; wangxin (U) ; Gonglei
> (Arei) ; Liuzhe (Ahriy, Euler)
> Subject: Re: [PATCH v6 0
Hi Paolo,
Maybe it is a little boring to review updated comments, but I think it is the
right thing to do, so could you have a look when you're free?
Regards,
Jay
> -Original Message-
> From: Zhoujian (jay)
> Sent: Thursday, January 04, 2018 1:30 PM
> To: qemu-devel@nongnu.org
> Cc: pbonz
On Tue, 16 Jan 2018 15:47:13 +1100
David Gibson wrote:
> At present if we require a vsmt mode that's not equal to the kernel's
> default, and the kernel doesn't let us change it (e.g. because it's an old
> kernel without support) then we always fail.
>
> But in fact we can cope with the kernel h
[PATCH RFC] target-arm:Add a dynamic XML-description of the cp-registers
to GDB
This patch offers to GDB the ability to read/write all the coprocessor
registers for ARM and ARM64 by generating dynamically an XML-description for
these registers.
- gdbstub.c :
*Extend the get_feature_xml(
On Tue, Jan 16, 2018 at 10:16:28AM +0800, Fam Zheng wrote:
> On Mon, Jan 15, 2018 at 8:26 PM, Cornelia Huck wrote:
> > On Mon, 15 Jan 2018 11:48:41 +
> > "Daniel P. Berrange" wrote:
> >
> >> Currently if I look at the patchew website for build logs, the 'docker'
> >> job results are listed as
On 16 January 2018 at 05:04, Philippe Mathieu-Daudé wrote:
> If devices have qtests for code coverage, I think we should accept them
> upstream, even if they are not yet plugged into a board.
>
> The other way, there are motivated contributors who start sending
> patches but then never finish due
On 15.01.2018 18:23, Collin L. Walling wrote:
> On 01/15/2018 12:05 PM, Eric Blake wrote:
>> On 01/15/2018 10:44 AM, Collin L. Walling wrote:
[...]
>>> +/**
>>> + * atoi:
>>> + * @str: the string to be converted.
>>> + *
>>> + * Given a string @str, convert it to an integer. Any non-numerical
>>> v
Peter Maydell writes:
> On 9 January 2018 at 12:22, Alex Bennée wrote:
>> We can now add float16_mul and use the common decompose and
>> canonicalize functions to have a single implementation for
>> float16/32/64 versions.
>>
>> Signed-off-by: Alex Bennée
>> Signed-off-by: Richard Henderson
>
On 15/01/2018 19:16, Mark Cave-Ayland wrote:
> On 11/01/18 11:48, Fabien Chouteau wrote:
>
>> On 10/01/2018 21:43, Jean-Christophe Dubois wrote:
>>> With the LEON3 IRQ controller IRQs can be acknoledged 2 ways:
>>> * Explicitely by software writing to the CLEAR_OFFSET register
>>> * Implicitely wh
Am 11.01.2018 um 20:52 hat Kevin Wolf geschrieben:
> This series implements a minimal QMP command that allows to create an
> image format on a given block node. The interface is still going to
> change to some kind of an async command (possibly a block job), so I
> prefixed x- for now.
>
> At this
On 15/01/2018 18:27, Jean-Christophe Dubois wrote:
> Le 2018-01-15 14:45, Jean-Christophe Dubois a écrit :
>>
>> Note: For now I am not so much interested in the AMBA discovery as the
>> type of software platform I am thinking about is embedded where the
>> hardware is well known ahead of time. Thi
On 16/01/2018 05:47, David Gibson wrote:
> At present if we require a vsmt mode that's not equal to the kernel's
> default, and the kernel doesn't let us change it (e.g. because it's an old
> kernel without support) then we always fail.
>
> But in fact we can cope with the kernel having a differen
On 15.01.2018 13:00, BALATON Zoltan wrote:
[...]
> I've also noticed that most of the boards were available both in ppcemb
> and ppc targets so maybe these could be merged now to avoid confusion
> but I don't know the reason why ppcemb existed in the first place so I
> don't know what other implica
On 16 January 2018 at 10:41, Thomas Huth wrote:
> On 15.01.2018 13:00, BALATON Zoltan wrote:
> [...]
>> I've also noticed that most of the boards were available both in ppcemb
>> and ppc targets so maybe these could be merged now to avoid confusion
>> but I don't know the reason why ppcemb existed
On 01/15/2018 06:23 PM, Collin L. Walling wrote:
> On 01/15/2018 12:05 PM, Eric Blake wrote:
>> On 01/15/2018 10:44 AM, Collin L. Walling wrote:
>>> Moved:
>>> memcmp from bootmap.h to libc.h (renamed from _memcmp)
>>> strlen from sclp.c to libc.h (renamed from _strlen)
>>>
>>> Added C stan
The threshold size is changed to be recorded in s->threshold_size by
commit b15df1ae5063c7c181f8f068f9eba7661b3b5e1.
Signed-off-by: Wei Wang
---
migration/migration.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/migration/migration.c b/migration/migration.c
index d3a1
On 16.01.2018 11:51, Peter Maydell wrote:
> On 16 January 2018 at 10:41, Thomas Huth wrote:
>> On 15.01.2018 13:00, BALATON Zoltan wrote:
>> [...]
>>> I've also noticed that most of the boards were available both in ppcemb
>>> and ppc targets so maybe these could be merged now to avoid confusion
>
On 15 January 2018 at 23:35, Paolo Bonzini wrote:
> The following changes since commit 997eba28a3ed5400a80f754bf3a1c8044b75b9ff:
>
> Merge remote-tracking branch
> 'remotes/pmaydell/tags/pull-target-arm-20180111' into staging (2018-01-11
> 14:34:41 +)
>
> are available in the git repositor
Peter Maydell writes:
> On 9 January 2018 at 12:22, Alex Bennée wrote:
>> While a comparison between a QNaN and a number will return the number
>> it is not the same with a signaling NaN. In this case the SNaN will
>> "win" and after potentially raising an exception it will be quietened.
>>
>>
Hi, I've modified the qemu source to add support for specifying a ifname
when using -netdev tap or -netdev bridge with a helper. Currently this
is not supported and all interface names are named tap0, tap1, ...
Hopfully i'm submitting this correctly, if not I appologize. Also, my C
is a bit ru
On Mon, Jan 15, 2018 at 8:26 PM, Cornelia Huck wrote:
> On Mon, 15 Jan 2018 11:48:41 +
> "Daniel P. Berrange" wrote:
>
>> Currently if I look at the patchew website for build logs, the 'docker'
>> job results are listed as a single expandable item.
>>
>> Patchew runs 3 separate docker builds,
On 01/16/2018 06:08 AM, Paolo Bonzini wrote:
QemuLockable is a polymorphic lock type that takes an object and
knows which function to use for locking and unlocking. The
implementation could use C11 _Generic, but since the support is
not very widespread I am instead using __builtin_choose_expr
On 16 January 2018 at 03:45, Richard Henderson
wrote:
> The code sequence we were generating was only good for unsigned
> comparisons. For signed comparisions, use the sequence from gcc.
>
> Fixes booting of ppc64 firmware, with a patch changing the code
> sequence for ppc comparisons.
>
> Tested
On 01/16/2018 06:08 AM, Paolo Bonzini wrote:
There are cases in which a queued coroutine must be restarted from
non-coroutine context (with qemu_co_enter_next). In this cases,
qemu_co_enter_next also needs to be thread-safe, but it cannot use a
CoMutex and so cannot qemu_co_queue_wait. This h
Hello,
I am trying to configure qemu with ptnet. But it seems like, now there
is no 'ptnet' branch to checkout,
so I am unable to configure using '--enable-ptnetmap' option.
please help in this regard.
Thank you.
From: "Edgar E. Iglesias"
The following changes since commit f5213bd060b460c99e605472b7e03967db43:
Merge remote-tracking branch 'remotes/juanquintela/tags/migration/20180115'
into staging (2018-01-15 13:17:47 +)
are available in the git repository at:
g...@github.com:edgarigl/qemu
From: Alistair Francis
Add the PMU IO Module Interrupt controller device.
Signed-off-by: Alistair Francis
Reviewed-by: Edgar E. Iglesias
Signed-off-by: Edgar E. Iglesias
---
default-configs/microblaze-softmmu.mak | 1 +
hw/intc/Makefile.objs | 1 +
hw/intc/xlnx-pmu-iomod
From: Alistair Francis
The Xilinx ZynqMP SoC has two main processing systems in it. The ARM
processing system (which is already modeled in QEMU) and the MicroBlaze
Power Management Unit (PMU). This is the inital work for adding support
for the PMU.
The PMU susbsystem runs along side the ARM syst
From: Alistair Francis
In preperation for having an ARM and MicroBlaze ZynqMP machine let's
split out the current ARM specific config options.
Signed-off-by: Alistair Francis
Acked-by: Peter Maydell
Reviewed-by: Edgar E. Iglesias
Signed-off-by: Edgar E. Iglesias
---
default-configs/aarch64-
On Tue, Jan 16, 2018 at 06:10:17AM +, Kang, Luwei wrote:
> > > On Mon, Jan 15, 2018 at 12:04:55 -0200, Eduardo Habkost wrote:
> > > > CCing libvirt developers.
> > > ...
> > > > This case is slightly more problematic, however: the new feature is
> > > > actually migratable (under very controlle
From: Alistair Francis
Connect the MicroBlaze CPU and the ROM and RAM memory regions.
Signed-off-by: Alistair Francis
Reviewed-by: Edgar E. Iglesias
Signed-off-by: Edgar E. Iglesias
---
hw/microblaze/xlnx-zynqmp-pmu.c | 70 +++--
1 file changed, 68 inserti
From: Alistair Francis
This is the initial version of the Inter Processor Interrupt device.
Signed-off-by: Alistair Francis
Reviewed-by: Edgar E. Iglesias
Signed-off-by: Edgar E. Iglesias
---
hw/intc/Makefile.objs | 1 +
hw/intc/xlnx-zynqmp-ipi.c | 377 +
On 14 January 2018 at 22:55, Francisco Iglesias
wrote:
> Coverity found that the variable tx_rx in the function
> xilinx_spips_flush_txfifo was being used uninitialized (CID 1383841). This
> patch corrects this by always initializing tx_rx to zeros.
>
> Signed-off-by: Francisco Iglesias
> ---
>
From: Alistair Francis
Signed-off-by: Alistair Francis
Reviewed-by: Edgar E. Iglesias
Signed-off-by: Edgar E. Iglesias
---
hw/microblaze/xlnx-zynqmp-pmu.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-
Hi
On Tue, Jan 16, 2018 at 12:25 PM, Peter Maydell
wrote:
> On 15 January 2018 at 23:35, Paolo Bonzini wrote:
>> The following changes since commit 997eba28a3ed5400a80f754bf3a1c8044b75b9ff:
>>
>> Merge remote-tracking branch
>> 'remotes/pmaydell/tags/pull-target-arm-20180111' into staging (20
On 16 January 2018 at 03:33, Richard Henderson
wrote:
> I think this will be the last revision before queueing for pull.
>
> Peter, the target/arm patches here are primarily for testing,
> without having to go all the way through to SVE. It also shows
> how the generic vector interface ought to b
On 15 January 2018 at 18:24, Philippe Mathieu-Daudé wrote:
> Since v7:
> - addressed Peter & Paolo reviews
> - do not use qdev_property_add_static() but move common properties into
> a new DEFINE_SDHCI_COMMON_PROPERTIES()
> - use &address_space_memory rather than create AS with address_spa
Alex Bennée writes:
> Peter Maydell writes:
>
>> On 9 January 2018 at 12:22, Alex Bennée wrote:
>>> While a comparison between a QNaN and a number will return the number
>>> it is not the same with a signaling NaN. In this case the SNaN will
>>> "win" and after potentially raising an exception
On 16 January 2018 at 11:58, Marc-André Lureau
wrote:
> Hi
>
> On Tue, Jan 16, 2018 at 12:25 PM, Peter Maydell
> wrote:
>> On 15 January 2018 at 23:35, Paolo Bonzini wrote:
>>> The following changes since commit 997eba28a3ed5400a80f754bf3a1c8044b75b9ff:
>>>
>>> Merge remote-tracking branch
>>
qemu-softmmu-ppc64 is supposed to be a superset of qemu-softmmu-ppc.
However, instead of simply including the 32-bit config file, we've
duplicated all CONFIG_xxx settings there instead. This way, we've missed
some CONFIG switches in ppc64-softmmu.mak which were only added to the
32-bit config file
Order the CONFIG switches in ppc-softmmu.mak according to the machine
classes where they are used (embedded, Mac or PReP), so that it is
easier for the users to disable a set of switches completely if they
are not needed.
Also add the missing CONFIG_IDE_SII3112 switch to the embedded section
which
qemu-system-ppcemb has been once split of qemu-system-ppc to support
CPU page sizes < 4096 for some of the embedded 4xx PowerPC CPUs.
However, there was hardly any OS available in the wild that really
used such small page sizes (Linux uses 4096 on PPC), so there is
no known recent use case for this
ppc64-softmmu is a superset of ppc-softmmu which in turn is a superset
of ppcemb-softmmu. But since the config files are currently independent
from each other, we missed to define some CONFIG switches in the super-
sets: CONFIG_SUNGEM is missing from the ppc64-softmmu config, and the
CONFIG_IDE_SII
We've got the config switch CONFIG_PPC4XX, so we should use it
in the Makefile accordingly and only include the PPC4xx boards
if this switch has been enabled. (Note: Unfortunately, the files
ppc4xx_devs.c and ppc405_uc.c still have to be included in the
build anyway to fulfil some complicated linke
On Tue, Jan 16, 2018 at 06:51:32PM +0800, Wei Wang wrote:
> The threshold size is changed to be recorded in s->threshold_size by
> commit b15df1ae5063c7c181f8f068f9eba7661b3b5e1.
>
> Signed-off-by: Wei Wang
Could you help confirm the commit ID? Since what I see is
b15df1ae50. Otherwise:
Revie
On 16 January 2018 at 04:46, Michael S. Tsirkin wrote:
> A large pull due to patch buildup over the holiday period.
> Most notable here is probably the addition of vhost-user-blk.
>
> The following changes since commit f5213bd060b460c99e605472b7e03967db43:
>
> Merge remote-tracking branch 'r
On 15.01.2018 17:44, Collin L. Walling wrote:
> ECKD DASDs have different IPL structures for CDL and LDL
> formats. The current Ipl1 and Ipl2 structs follow the CDL
> format, so we prepend "EckdCdl" to them. Boot info for LDL
> has been moved to a new struct: EckdLdlIpl1.
>
> Also introduce struct
On 01/16/2018 04:00 AM, Michael S. Tsirkin wrote:
On Fri, Jan 12, 2018 at 03:56:55PM +0100, Maxime Coquelin wrote:
The number of queues supported by the slave is queried with
message VHOST_USER_GET_QUEUE_NUM, not with message
VHOST_USER_GET_PROTOCOL_FEATURES.
Also, looking at master and slave
according to Eduardo Habkost's commit fd3b02c889 all PCIEs now implement
INTERFACE_PCIE_DEVICE so we don't need is_express field anymore.
Devices that implements only INTERFACE_PCIE_DEVICE (is_express == 1)
or
devices that implements only INTERFACE_CONVENTIONAL_PCI_DEVICE (is_express == 0)
where n
On Sat, Jan 13, 2018 at 08:22:31AM +0100, Vincent Bernat wrote:
> ❦ 12 janvier 2018 16:47 -0200, Eduardo Habkost :
>
> > Adding Westmere-PCID would require adding a Westmere-PCID-IBRS
> > CPU model too, so this is starting to look a bit ridiculous.
> > Sane VM management systems would know how t
> -Original Message-
> From: Michael S. Tsirkin [mailto:m...@redhat.com]
> Sent: Tuesday, January 16, 2018 12:24 PM
> To: Zhoujian (jay)
> Cc: qemu-devel@nongnu.org; pbonz...@redhat.com; Huangweidong (C)
> ; stefa...@redhat.com; pa...@linux.vnet.ibm.com;
> longpeng ; xin.z...@intel.com; ro
On 15.01.2018 17:44, Collin L. Walling wrote:
> Set boot menu options for an s390 guest and store them in
> the iplb. These options are set via the QEMU command line
> option:
>
> -boot menu=on|off[,splash-time=X]
>
> or via the libvirt domain xml:
>
>
>
>
>
> Where X repre
This is needed, for example, to create a new bitmap and merge several
disabled bitmaps into a new one. Without this flag we will have to
put block-dirty-bitmap-add and block-dirty-bitmap-disable into one
transaction.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
qapi/block-core.json | 6 +
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
qapi/transaction.json | 4 +++
blockdev.c| 79 +++
2 files changed, 83 insertions(+)
diff --git a/qapi/transaction.json b/qapi/transaction.json
index bd312792da..b643d848f8 100644
--- a/q
Hi all.
There are three qmp commands, needed to implement external backup API.
Using these three commands, client may do all needed bitmap management by
hand:
on backup start we need to do a transaction:
{disable old bitmap, create new bitmap}
on backup success:
drop old bitmap
on backup fai
Add locks and remove comments about BQL accordingly to
dirty_bitmap_mutex definition in block_int.h.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
block/dirty-bitmap.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/block/dirty-bitmap.c b/block/dirty-bitmap.c
index 37
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
qapi/block-core.json | 42 ++
blockdev.c | 42 ++
2 files changed, 84 insertions(+)
diff --git a/qapi/block-core.json b/qapi/block-core.json
index 827254db22.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
qapi/block-core.json | 38 ++
include/block/dirty-bitmap.h | 2 ++
block/dirty-bitmap.c | 18 ++
blockdev.c | 30 ++
4 files changed,
To maintain load/store disabled bitmap there is new approach:
- deprecate @autoload flag of block-dirty-bitmap-add, make it ignored
- store enabled bitmaps as "auto" to qcow2
- store disabled bitmaps without "auto" flag to qcow2
- on qcow2 open load "auto" bitmaps as enabled and others
as d
On 16 January 2018 at 12:24, Peter Maydell wrote:
> On 16 January 2018 at 04:46, Michael S. Tsirkin wrote:
>> A large pull due to patch buildup over the holiday period.
>> Most notable here is probably the addition of vhost-user-blk.
>>
>> The following changes since commit f5213bd060b460c99e
* Peter Maydell (peter.mayd...@linaro.org) wrote:
> On 16 January 2018 at 04:46, Michael S. Tsirkin wrote:
> > A large pull due to patch buildup over the holiday period.
> > Most notable here is probably the addition of vhost-user-blk.
> >
> > The following changes since commit f5213bd060b460c
❦ 16 janvier 2018 10:41 -0200, Eduardo Habkost :
>> > Adding Westmere-PCID would require adding a Westmere-PCID-IBRS
>> > CPU model too, so this is starting to look a bit ridiculous.
>> > Sane VM management systems would know how to use
>> > "-cpu Westmere,+pcid" without requiring new CPU model
(used to be 'qcow2: preallocation and COW improvements')
v6: the series is split; now includes only ALLOCATE flag introduction
and improvement of qcow2 COW with efficient write-zeroes.
File space preallocation beyond EOF will be a separate series.
Rebased; remarks to patch 8 resolved.
The flag is supposed to indicate that the region of the disk image has
to be sufficiently allocated so it reads as zeroes.
The call with the flag set must return -ENOTSUP if allocation cannot
be done efficiently.
This has to be made sure of by both
- the drivers that support the flag
- and the
Signed-off-by: Anton Nefedov
Reviewed-by: Alberto Garcia
---
block/blkverify.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/block/blkverify.c b/block/blkverify.c
index 06369f9..9ba65d0 100644
--- a/block/blkverify.c
+++ b/block/blkverify.c
@@ -140,6 +140,15 @@ static int blkverif
Signed-off-by: Anton Nefedov
Reviewed-by: Eric Blake
Reviewed-by: Alberto Garcia
---
block/mirror.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/block/mirror.c b/block/mirror.c
index c9badc1..d18ec65 100644
--- a/block/mirror.c
+++ b/block/mirror.c
@@ -1064,6 +1064,11 @@ static void
To be used in the following commit without a forward declaration.
Signed-off-by: Anton Nefedov
Reviewed-by: Alberto Garcia
---
block/qcow2.c | 35 +--
1 file changed, 17 insertions(+), 18 deletions(-)
diff --git a/block/qcow2.c b/block/qcow2.c
index 4348b2c..2ed
The idea is that ALLOCATE requests may overlap with other requests.
Reuse the existing block layer infrastructure for serialising requests.
Use the following approach:
- mark ALLOCATE serialising, so subsequent requests to the area wait
- ALLOCATE request itself must never wait if another reque
COW (even empty/zero) areas require encryption too
Signed-off-by: Anton Nefedov
---
tests/qemu-iotests/134 | 9 +
tests/qemu-iotests/134.out | 10 ++
2 files changed, 19 insertions(+)
diff --git a/tests/qemu-iotests/134 b/tests/qemu-iotests/134
index 9914415..6083ae4 100755
Support the flag if the underlying BDS supports it
Signed-off-by: Anton Nefedov
Reviewed-by: Alberto Garcia
---
block/blkdebug.c | 3 ++-
block/blkverify.c | 2 +-
block/mirror.c | 2 +-
block/raw-format.c | 3 ++-
4 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/block/blkd
Current write_zeroes implementation is good enough to satisfy this flag too
Signed-off-by: Anton Nefedov
Reviewed-by: Alberto Garcia
---
block/file-posix.c | 8
1 file changed, 8 insertions(+)
diff --git a/block/file-posix.c b/block/file-posix.c
index 36ee89e..c36e156 100644
--- a/blo
If COW areas of the newly allocated clusters are zeroes on the backing image,
efficient bdrv_write_zeroes(flags=BDRV_REQ_ALLOCATE) can be used on the whole
cluster instead of writing explicit zero buffers later in perform_cow().
iotest 060:
write to the discarded cluster does not trigger COW anymo
ensure SMBusDeviceClass::init is set before calling it
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i2c/smbus.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/i2c/smbus.c b/hw/i2c/smbus.c
index 2d1b79a689..a90d65ef37 100644
--- a/hw/i2c/smbus.c
+++ b/hw/i2c/smbus.c
@
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i2c/smbus_eeprom.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/hw/i2c/smbus_eeprom.c b/hw/i2c/smbus_eeprom.c
index b13ec0fe7a..7e81ae4fe5 100644
--- a/hw/i2c/smbus_eeprom.c
+++ b/hw/i2c/smbus_eeprom.c
@@ -97,12 +97,11 @@ st
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/sysbus.h | 4
hw/core/sysbus.c| 23 +++
2 files changed, 27 insertions(+)
diff --git a/include/hw/sysbus.h b/include/hw/sysbus.h
index e88bb6dae0..c87a6df29e 100644
--- a/include/hw/sysbus.h
+++ b/include/hw/sysbu
The SysBusDevice is the last DeviceClass::init user.
Instead of using
SysBusDeviceClass::realize
-> DeviceClass::realize
-> DeviceClass::init
-> sysbus_device_init
-> SysBusDeviceClass::init
Simplify the path by directly calling SysBusDeviceClass::init
in SysB
Hi,
This series finalize the qdev QOMification.
We first convert the I2CSlave/SMBusDevice,
then the usb-ccid and virtio-ccw,
and finally the SysBusDevice.
At the end we get one less TODO :)
/* TODO remove, once users are converted to unrealize */
There is still one standing in SysBusDevice
Signed-off-by: Philippe Mathieu-Daudé
---
hw/usb/ccid.h | 9 +--
hw/usb/ccid-card-emulated.c | 42 ---
hw/usb/ccid-card-passthru.c | 10
hw/usb/dev-smartcard-reader.c | 57 +++
4 files changed, 5
following the DeviceRealize and DeviceUnrealize typedefs,
this unify a bit the QOM API.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/qdev-core.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h
index de7fe2e6e0..8d15d
they are not useful, keep the code clean.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/core/qdev.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/hw/core/qdev.c b/hw/core/qdev.c
index 985f890a74..91ddbfa5f3 100644
--- a/hw/core/qdev.c
+++ b/hw/core/qdev.c
@@ -219,14 +219,6 @@ voi
it has no more users.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/qdev-core.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h
index 0a71bf83f0..de063b232f 100644
--- a/include/hw/qdev-core.h
+++ b/include/hw/qdev-core.h
@@ -30,7 +30,6
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/i2c/i2c.h| 2 +-
include/hw/i2c/smbus.h | 2 +-
hw/audio/wm8750.c | 8 +++-
hw/display/ssd0303.c| 5 ++---
hw/gpio/max7310.c | 6 ++
hw/i2c/core.c | 10 --
hw/i2c/smbus.c | 10 ---
On Tue, 16 Jan 2018 06:16:34 +0200
"Michael S. Tsirkin" wrote:
> On Fri, Dec 29, 2017 at 04:16:42PM +0100, Igor Mammedov wrote:
> > It turns out that FADT isn't actually tested for changes
> > against reference table, since it happens to be the 1st
> > table in RSDT which is currently ignored.
>
Signed-off-by: Philippe Mathieu-Daudé
---
hw/s390x/virtio-ccw.h | 2 +-
hw/s390x/virtio-ccw.c | 35 +--
2 files changed, 18 insertions(+), 19 deletions(-)
diff --git a/hw/s390x/virtio-ccw.h b/hw/s390x/virtio-ccw.h
index 3905f3a3d6..2fc513001e 100644
--- a/hw/s390
it has no users.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/qdev-core.h | 2 --
hw/core/qdev.c | 9 -
2 files changed, 11 deletions(-)
diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h
index de063b232f..de7fe2e6e0 100644
--- a/include/hw/qdev-core.h
+++ b/in
Max Reitz wrote:
> On 2018-01-15 12:52, Juan Quintela wrote:
>> From: Alexey Perevalov
>>
>> This patch provides blocktime calculation per vCPU,
>> as a summary and as a overlapped value for all vCPUs.
>>
>> This approach was suggested by Peter Xu, as an improvements of
>> previous approch wher
On Tue, 16 Jan 2018 06:48:06 +0200
"Michael S. Tsirkin" wrote:
> From: "Dr. David Alan Gilbert"
>
> Move the log_dirty check into vhost_section.
>
> Signed-off-by: Dr. David Alan Gilbert
> Reviewed-by: Michael S. Tsirkin
> Signed-off-by: Michael S. Tsirkin
As it change looks unsafe to me wi
From: Richard Henderson
Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
Message-id: 20180110063337.21538-3-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/translate-a64.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/target/arm/translate-a64.c b
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Message-id: 20180115182436.2066-3-f4...@amsat.org
Signed-off-by: Peter Maydell
---
include/hw/sd/sdhci.h | 2 --
hw/sd/sdhci.c | 2 --
2 files changed, 4 deletions(-)
diff --git a/include
Since milkymist-memcard is still using the legacy SD card API,
the SD card created by sd_init() is not plugged into any bus.
This means that the controller has to reset it manually.
Failing to do this mostly didn't affect the guest since the
guest typically does a programmed SD card reset as part
Instead of ignoring the response from address_space_ld*()
(indicating an attempt to read a page table descriptor from
an invalid physical address), use it to report the failure
correctly.
Since this is another couple of locations where we need to
decide the value of the ARMMMUFaultInfo ea bit base
Add virt-2.12 machine type.
Signed-off-by: Peter Maydell
---
hw/arm/virt.c | 19 +--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 151592b..543f9bd 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1618,7 +1618,7 @@ static voi
Since ssi-sd is still using the legacy SD card API, the SD
card created by sd_init() is not plugged into any bus. This
means that the controller has to reset it manually.
Failing to do this mostly didn't affect the guest since the
guest typically does a programmed SD card reset as part of
its SD c
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Message-id: 20180115182436.2066-2-f4...@amsat.org
Signed-off-by: Peter Maydell
---
hw/sd/sdhci-internal.h | 4
include/hw/sd/sdhci.h | 7 ++-
hw/sd/sdhci.c | 1 +
3 files change
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Message-id: 20180115182436.2066-10-f4...@amsat.org
Signed-off-by: Peter Maydell
---
hw/sd/sdhci-internal.h | 1 +
hw/sd/sdhci.c | 3 +--
2 files changed, 2 insertions(+), 2 deletions(-)
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Message-id: 20180115182436.2066-11-f4...@amsat.org
Signed-off-by: Peter Maydell
---
hw/sd/sdhci-internal.h | 2 +-
hw/sd/sdhci.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
From: Richard Henderson
Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
Message-id: 20180110063337.21538-2-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/translate-a64.c | 44
1 file changed, 28 insertions(+),
Since omap_mmc is still using the legacy SD card API, the SD
card created by sd_init() is not plugged into any bus. This
means that the controller has to reset it manually.
Failing to do this mostly didn't affect the guest since the
guest typically does a programmed SD card reset as part of
its SD
1 - 100 of 494 matches
Mail list logo
