Hi,
A gentle reminder for Juan and other migration maintainers for the
review of this patchset series if any changes are required or give to
queue them. There are more patchset series coming after this. As
discussed earlier, we have broken down it into 4 different patchset
series. This is
On 03/08/2023 02.29, Luca Bonissi wrote:
From: Luca Bonissi
Date: Thu, 3 Aug 2023 02:15:57 +0200
Subject: [PATCH] Fixed incorrect LLONG alignment for openrisc and cris
OpenRISC (or1k) has long long alignment to 4 bytes, but currently not
defined in abitypes.h. This lead to incorrect packing of
On 2023/8/2 10:54 PM, Alistair Francis wrote:
On Tue, Jul 11, 2023 at 12:59 PM Max Chou wrote:
This patchset provides an implementation for Zvbb, Zvbc, Zvkned, Zvknh,
Zvksh, Zvkg, and Zvksed of the draft RISC-V vector cryptography
extensions as per the v20230620 version of the
Add helpers for reading/writing the 68881 FPSR register so that
changes in floating point exception state can be seen by the
application.
Call these helpers in pre_load/post_load hooks to synchronize
exception state.
Signed-off-by: Keith Packard
---
target/m68k/cpu.c| 12 +++
> Good catch. Mostly ok.
Thanks much for looking at this.
> No need for inline markers.
Thanks.
> In general it is bad form to call HELPER(foo) directly. In this case
> it doesn't hurt, but better form to reverse the implementations.
Good point. I had copied this from the arm vfp code
[...]
>diff --git a/block/mirror.c b/block/mirror.c
>index d3cacd1708..cd19b49f7f 100644
>--- a/block/mirror.c
>+++ b/block/mirror.c
>@@ -1143,6 +1143,10 @@ immediate_exit:
> g_free(s->in_flight_bitmap);
> bdrv_dirty_iter_free(s->dbi);
>
>+if (ret >= 0) {
>+ret =
Generally guest side should discover which services the device is
able to offer, then do requests on device.
However it's also possible to break this rule in a guest. Handle
unexpected request here to avoid NULL pointer dereference.
Fixes: e7a775fd ('cryptodev: Account statistics')
Cc: Gonglei
Hi Michael, Lei,
Yiming Tao, Yongkang Jia, Xiao Lei(from Zhejiang University) reported
issuses and CVEs in the past days.
This series fixes a CVE and a BUG for virtio-crypto/cryptodev.
Zhenwei Pi (2):
virtio-crypto: verify src buffer length for sym request
cryptodev: Handle unexpected
For symmetric algorithms, the length of ciphertext must be as same
as the plaintext.
The missing verification of the src_len and the dst_len in
virtio_crypto_sym_op_helper() may lead buffer overflow/divulged.
This patch is originally written by Yiming Tao for QEMU-SECURITY,
resend it(a few
On 8/2/23 17:55, Keith Packard via wrote:
Add helpers for reading/writing the 68881 FPSR register so that
changes in floating point exception state can be seen by the
application.
Signed-off-by: Keith Packard
---
target/m68k/cpu.h| 2 ++
target/m68k/fpu_helper.c | 72
This variable is unused.
Signed-off-by: Richard Henderson
---
linux-user/user-mmap.h | 1 -
linux-user/mmap.c | 2 --
2 files changed, 3 deletions(-)
diff --git a/linux-user/user-mmap.h b/linux-user/user-mmap.h
index 3fc986f92f..7265c2c116 100644
--- a/linux-user/user-mmap.h
+++
This variable is unused.
Signed-off-by: Richard Henderson
---
bsd-user/qemu.h | 1 -
bsd-user/mmap.c | 2 --
2 files changed, 3 deletions(-)
diff --git a/bsd-user/qemu.h b/bsd-user/qemu.h
index edf9602f9b..8f2d6a3c78 100644
--- a/bsd-user/qemu.h
+++ b/bsd-user/qemu.h
@@ -232,7 +232,6 @@
From: Akihiko Odaki
MAP_FIXED_NOREPLACE can ensure the mapped address is fixed without
concerning that the new mapping overwrites something else.
Signed-off-by: Akihiko Odaki
Message-Id: <20230802071754.14876-5-akihiko.od...@daynix.com>
[rth: Pass -1 as fd for MAP_ANON]
Signed-off-by: Richard
Follow the lead of the linux kernel in fs/binfmt_elf.c,
in which an ET_DYN executable which uses an interpreter
(usually a PIE executable) is loaded away from where the
interpreter itself will be loaded.
Signed-off-by: Richard Henderson
---
linux-user/elfload.c | 43
Copy each guest kernel's default value, then bound it
against reserved_va or the host address space.
Signed-off-by: Richard Henderson
---
linux-user/aarch64/target_mman.h | 3 +++
linux-user/alpha/target_mman.h | 3 +++
linux-user/arm/target_mman.h | 3 +++
From: Akihiko Odaki
Linux 6.4.7 does nothing when a value smaller than the initial brk is
specified.
Fixes: 86f04735ac ("linux-user: Fix brk() to release pages")
Reviewed-by: Helge Deller
Signed-off-by: Akihiko Odaki
Message-Id: <20230802071754.14876-6-akihiko.od...@daynix.com>
Signed-off-by:
Builds on Helge's v6, incorporating my feedback plus
some other minor cleanup.
r~
Akihiko Odaki (6):
linux-user: Unset MAP_FIXED_NOREPLACE for host
linux-user: Fix MAP_FIXED_NOREPLACE on old kernels
linux-user: Do not call get_errno() in do_brk()
linux-user: Use MAP_FIXED_NOREPLACE for
Provide default values that are as close as possible to the
values used by the guest's kernel.
Signed-off-by: Richard Henderson
---
linux-user/aarch64/target_mman.h | 10 ++
linux-user/alpha/target_mman.h | 8
linux-user/arm/target_mman.h | 8
Ensure that the chosen values for mmap_next_start and
task_unmapped_base are within the guest address space.
Signed-off-by: Richard Henderson
---
linux-user/user-mmap.h | 18 +-
linux-user/main.c | 26 ++
linux-user/mmap.c | 18
The heap starts at "brk" not "start_brk". With this fixed,
image_info.start_brk is unused and may be removed.
Signed-off-by: Richard Henderson
---
linux-user/qemu.h | 1 -
linux-user/flatload.c | 2 +-
linux-user/main.c | 2 --
3 files changed, 1 insertion(+), 4 deletions(-)
diff
From: Akihiko Odaki
do_brk() minimizes calls into target_mmap() by aligning the address
with host page size, which is potentially larger than the target page
size. However, the current implementation of this optimization has two
bugs:
- The start of brk is rounded up with the host page size
From: Akihiko Odaki
Later the returned value is compared with -1, and negated errno is not
expected.
Fixes: 00faf08c95 ("linux-user: Don't use MAP_FIXED in do_brk()")
Reviewed-by: Helge Deller
Signed-off-by: Akihiko Odaki
Message-Id: <20230802071754.14876-4-akihiko.od...@daynix.com>
From: Akihiko Odaki
The man page states:
> Note that older kernels which do not recognize the MAP_FIXED_NOREPLACE
> flag will typically (upon detecting a collision with a preexisting
> mapping) fall back to a “non-MAP_FIXED” type of behavior: they will
> return an address that is different from
From: Helge Deller
While we attempt to load a ET_DYN executable far away from
TASK_UNMAPPED_BASE, we are not completely in control of the
address space layout. If the interpreter lands close to
the executable, leaving insufficient heap space, move brk.
Signed-off-by: Helge Deller
[rth:
From: Akihiko Odaki
Passing MAP_FIXED_NOREPLACE to host will fail for reserved_va because
the address space is reserved with mmap. Replace it with MAP_FIXED
in that case.
Signed-off-by: Akihiko Odaki
Message-Id: <20230802071754.14876-2-akihiko.od...@daynix.com>
[rth: Expand inline
>-Original Message-
>From: Nicolin Chen
>Subject: Re: [RFC PATCH v4 00/24] vfio: Adopt iommufd
>
>On Tue, Aug 01, 2023 at 08:28:01AM +, Duan, Zhenzhong wrote:
>
>> Ping, any comments or suggestions are appreciated.
>
>Zhenzhong, I'd love to, yet haven't got the chance to go through
Add helpers for reading/writing the 68881 FPSR register so that
changes in floating point exception state can be seen by the
application.
Signed-off-by: Keith Packard
---
target/m68k/cpu.h| 2 ++
target/m68k/fpu_helper.c | 72
On 8/1/2023 6:46 AM, Daniel Henrique Barboza wrote:
>
>
> On 7/30/23 22:53, Fei Wu wrote:
>> riscv virt platform's memory started at 0x8000 and
>> straddled the 4GiB boundary. Curiously enough, this choice
>> of a memory layout will prevent from launching a VM with
>> a bit more than 2000MiB
From: Luca Bonissi
Date: Thu, 3 Aug 2023 02:15:57 +0200
Subject: [PATCH] Fixed incorrect LLONG alignment for openrisc and cris
OpenRISC (or1k) has long long alignment to 4 bytes, but currently not
defined in abitypes.h. This lead to incorrect packing of /epoll_event/
structure and eventually
On Thu, 3 Aug 2023 01:34:04 +0200
Samuel Thibault wrote:
> Henrik Carlqvist, le jeu. 03 août 2023 01:26:02 +0200, a ecrit:
> > On Thu, 3 Aug 2023 01:13:24 +0200
> > Samuel Thibault wrote:
> >
> > > Henrik Carlqvist, le jeu. 03 août 2023 01:09:09 +0200, a ecrit:
> > > > On Wed, 2 Aug 2023
Hi Zhao,
Hitting this error after this patch.
ERROR:../target/i386/cpu.c:257:max_processor_ids_for_cache: code should
not be reached
Bail out! ERROR:../target/i386/cpu.c:257:max_processor_ids_for_cache: code
should not be reached
Aborted (core dumped)
Looks like share_level for all the caches
Henrik Carlqvist, le jeu. 03 août 2023 01:26:02 +0200, a ecrit:
> On Thu, 3 Aug 2023 01:13:24 +0200
> Samuel Thibault wrote:
>
> > Henrik Carlqvist, le jeu. 03 août 2023 01:09:09 +0200, a ecrit:
> > > On Wed, 2 Aug 2023 21:53:56 +0200
> > > Samuel Thibault wrote:
> > >
> > > > Henrik
On Thu, 3 Aug 2023 01:13:24 +0200
Samuel Thibault wrote:
> Henrik Carlqvist, le jeu. 03 août 2023 01:09:09 +0200, a ecrit:
> > On Wed, 2 Aug 2023 21:53:56 +0200
> > Samuel Thibault wrote:
> >
> > > Henrik Carlqvist, le mar. 01 août 2023 23:27:25 +0200, a ecrit:
> > > > @@ -950,10 +953,11
Henrik Carlqvist, le jeu. 03 août 2023 01:09:09 +0200, a ecrit:
> On Wed, 2 Aug 2023 21:53:56 +0200
> Samuel Thibault wrote:
>
> > Henrik Carlqvist, le mar. 01 août 2023 23:27:25 +0200, a ecrit:
> > > @@ -950,10 +953,11 @@ static int slirp_smb(SlirpState* s, const char
> > > *exported_dir,
> >
On Wed, 2 Aug 2023 21:53:56 +0200
Samuel Thibault wrote:
> Henrik Carlqvist, le mar. 01 août 2023 23:27:25 +0200, a ecrit:
> > @@ -950,10 +953,11 @@ static int slirp_smb(SlirpState* s, const char
> > *exported_dir,
> > "printing = bsd\n"
> > "disable spoolss = yes\n"
>
On Mon, Jul 31, 2023 at 12:21:48PM -0400,
Xiaoyao Li wrote:
> pc_machine_kvm_type() was introduced by commit e21be724eaf5 ("i386/xen:
> add pc_machine_kvm_type to initialize XEN_EMULATE mode") to do Xen
> specific initialization by utilizing kvm_type method.
>
> commit eeedfe6c6316 ("hw/xen:
QE tested v3 of this series using the test steps provided by Hawkins
and everything works fine.
Tested-by: Lei Yang
On Sun, Jul 23, 2023 at 8:10 PM Hawkins Jiawei wrote:
>
> This series enables shadowed CVQ to intercept VLAN commands
> through shadowed CVQ, update the virtio NIC device model
>
On Wed, Aug 02, 2023 at 04:14:29PM +0200,
David Hildenbrand wrote:
> On 02.08.23 10:03, Xiaoyao Li wrote:
> > On 8/2/2023 1:21 AM, David Hildenbrand wrote:
> > > On 31.07.23 18:21, Xiaoyao Li wrote:
> > > > From: Isaku Yamahata
> > > >
> > > > Signed-off-by: Isaku Yamahata
> > > >
On Tue, Aug 01, 2023 at 08:28:01AM +, Duan, Zhenzhong wrote:
> Ping, any comments or suggestions are appreciated.
Zhenzhong, I'd love to, yet haven't got the chance to go through
this series. I think that most of us are quite occupied at this
moment by the kernel side of the changes.
I
Hi Zhao,
On 8/1/23 05:35, Zhao Liu wrote:
> From: Zhuocheng Ding
>
> We introduce cluster-id other than module-id to be consistent with
s/We introduce/Introduce/
Thanks
Babu
> CpuInstanceProperties.cluster-id, and this avoids the confusion
> of parameter names when hotplugging.
>
>
On Mon, Jul 31, 2023 at 12:22:01PM -0400,
Xiaoyao Li wrote:
> Signed-off-by: Xiaoyao Li
> ---
> target/i386/kvm/kvm.c | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
> index a96640512dbc..62f237068a3a 100644
> ---
On Mon, Jul 31, 2023 at 12:21:57PM -0400,
Xiaoyao Li wrote:
> From: Chao Peng
>
> Currently only KVM_MEMORY_EXIT_FLAG_PRIVATE in flags is valid when
> KVM_EXIT_MEMORY_FAULT happens. It indicates userspace needs to do
> the memory conversion on the RAMBlock to turn the memory into desired
>
On 2/8/23 23:08, Jean-Christophe Dubois wrote:
* Add TZASC as unimplemented device.
- Allow bare metal application to access this (unimplemented) device
* Add CSU as unimplemented device.
- Allow bare metal application to access this (unimplemented) device
* Add various memory segments
On 2/8/23 23:08, Jean-Christophe Dubois wrote:
* Add TZASC as unimplemented device.
- Allow bare metal application to access this (unimplemented) device
* Add CSU as unimplemented device.
- Allow bare metal application to access this (unimplemented) device
Signed-off-by: Jean-Christophe
Hi Jean-Christophe,
On 2/8/23 23:08, Jean-Christophe Dubois wrote:
* Add Addr and size definition for all i.MX6UL devices in i.MX6UL header file.
I'm OK with your patch, but some addr/size are added, while other
are changed. It is hard to review. Having one patch for changes
and another for
Hello,
On behalf of the QEMU Team, I'd like to announce the availability of the
third release candidate for the QEMU 8.1 release. This release is meant
for testing purposes and should not be used in a production environment.
http://download.qemu.org/qemu-8.1.0-rc2.tar.xz
On 2/8/23 15:57, Thomas Huth wrote:
The values in "msg" are assembled in host endian byte order (the other
field are also not swapped), so we must not swap the __addr_head here.
Signed-off-by: Thomas Huth
---
hw/i386/x86-iommu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
On 2/8/23 15:57, Thomas Huth wrote:
On big endian hosts, we need to reverse the bitfield order in the
struct VTDInvDescIEC, just like it is already done for the other
bitfields in the various structs of the intel-iommu device.
Signed-off-by: Thomas Huth
---
hw/i386/intel_iommu_internal.h | 9
On 2/8/23 15:57, Thomas Huth wrote:
After reading the guest memory with dma_memory_read(), we have
to make sure that we byteswap the little endian data to the host's
byte order.
Signed-off-by: Thomas Huth
---
hw/i386/intel_iommu.c | 5 +
1 file changed, 5 insertions(+)
Maybe worth
On 2/8/23 15:57, Thomas Huth wrote:
The values in "addr" are populated locally in this function in host
endian byte order, so we must not swap the index_l field here.
Signed-off-by: Thomas Huth
---
hw/i386/intel_iommu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by:
* Add Addr and size definition for all i.MX7 devices in i.MX7 header file.
* Use those newly defined named constants whenever possible.
* Standardize the way we init a familly of unimplemented devices
- SAI
- PWM
- CAN
* Add/rework few comments
Signed-off-by: Jean-Christophe Dubois
---
* Add TZASC as unimplemented device.
- Allow bare metal application to access this (unimplemented) device
* Add CSU as unimplemented device.
- Allow bare metal application to access this (unimplemented) device
Signed-off-by: Jean-Christophe Dubois
---
hw/arm/fsl-imx6ul.c | 12
The SRC device is normaly used to start the secondary CPU.
When running Linux directly, Qemu is emulating a PSCI interface that UBOOT
is installing at boot time and therefore the fact that the SRC device is
unimplemented is hidden as Qemu respond directly to PSCI requets without
using the SRC
This patch adds a few unimplemented TZ devices (TZASC and CSU) to
i.MX6UL and i.MX7 processors to avoid bare metal application to
experiment "bus error" when acccessing these devices.
It also adds some internal memory segments (OCRAM) to the i.MX7 to
allow bare metal application to use them.
* Add TZASC as unimplemented device.
- Allow bare metal application to access this (unimplemented) device
* Add CSU as unimplemented device.
- Allow bare metal application to access this (unimplemented) device
* Add various memory segments
- OCRAM
- OCRAM EPDC
- OCRAM PXP
- OCRAM S
-
* Add Addr and size definition for all i.MX6UL devices in i.MX6UL header file.
* Use those newly defined named constants whenever possible.
* Standardize the way we init a familly of unimplemented devices
- SAI
- PWM (add missing PWM instances)
- CAN
* Add/rework few comments
Signed-off-by:
Updated section name, so libbpf should init/gues proper
program type without specifications during open/load.
Also, added map_flags with explicitly declared BPF_F_MMAPABLE.
Signed-off-by: Andrew Melnychenko
---
ebpf/rss.bpf.skeleton.h | 1460 ---
eBPF RSS program and maps may now be passed during initialization.
Initially was implemented for libvirt to launch qemu without permissions,
and initialized eBPF program through the helper.
Signed-off-by: Andrew Melnychenko
---
hw/net/virtio-net.c| 55
It allows using file descriptors of eBPF provided
outside of QEMU.
QEMU may be run without capabilities for eBPF and run
RSS program provided by management tool(g.e. libvirt).
Signed-off-by: Andrew Melnychenko
---
ebpf/ebpf_rss-stub.c | 6 ++
ebpf/ebpf_rss.c | 27
Hi Frederick,
On 2/8/23 22:36, Frederick Virchanza Gotham wrote:
On Wed, Aug 2, 2023 at 11:04 AM Frederick Virchanza Gotham wrote:
I can't get sparc64 to work at all though. Even I make a simple 'Hello
World' program in C using only "puts", if I try to use qemu-user to
run it, it crashes.
Now, the binary objects may be retrieved by id.
It would require for future qmp commands that may require specific
eBPF blob.
Added command "request-ebpf". This command returns
eBPF program encoded base64. The program taken from the
skeleton and essentially is an ELF object that can be
loaded in
Changed eBPF map updates through mmaped array.
Mmaped arrays provide direct access to map data.
It should omit using bpf_map_update_elem() call,
which may require capabilities that are not present.
Signed-off-by: Andrew Melnychenko
---
ebpf/ebpf_rss.c | 117
This series of patches provides the ability to retrieve eBPF program
through qmp, so management application may load bpf blob with proper
capabilities.
Now, virtio-net devices can accept eBPF programs and maps through properties
as external file descriptors. Access to the eBPF map is direct
On Wed, Aug 02, 2023 at 05:04:45PM -0300, Fabiano Rosas wrote:
> Peter Xu writes:
>
> >> +if (await_return_path_close_on_source(s)) {
> >> +trace_migration_return_path_pause_err();
> >> +return MIG_THR_ERR_FATAL;
> >> +}
> >
> > I see that here on return
On Wed, Aug 02, 2023 at 04:58:38PM -0300, Fabiano Rosas wrote:
> Peter Xu writes:
>
> > On Wed, Aug 02, 2023 at 11:36:43AM -0300, Fabiano Rosas wrote:
> >> This function currently has a straight-forward part which is waiting
> >> for the thread to join and a complicated part which is doing a
>
On 8/2/23 21:57, Richard Henderson wrote:
On 8/2/23 12:51, Helge Deller wrote:
@@ -3159,7 +3140,7 @@ static void load_elf_image(const char *image_name, int
image_fd,
*/
load_addr = target_mmap(loaddr, (size_t)hiaddr - loaddr + 1, PROT_NONE,
Peter Xu writes:
>> +if (await_return_path_close_on_source(s)) {
>> +trace_migration_return_path_pause_err();
>> +return MIG_THR_ERR_FATAL;
>> +}
>
> I see that here on return path failures we'll bail out, and actually it's
> against the instinction (that
On 8/2/23 12:55, Thomas Huth wrote:
On 19/07/2023 14.38, Luca Bonissi wrote:
On 19/07/23 10:49, Laurent Vivier wrote:
According to linux/glibc sourced, epoll is only packed for x86_64.
And, in recent glibc, also for i386, even it seems not necessary: even if the
__alignof__(long long) is
Peter Xu writes:
> On Wed, Aug 02, 2023 at 11:36:43AM -0300, Fabiano Rosas wrote:
>> This function currently has a straight-forward part which is waiting
>> for the thread to join and a complicated part which is doing a
>> qemu_file_shutdown() on the return path file.
>>
>> The shutdown is
On 8/2/23 12:51, Helge Deller wrote:
@@ -3159,7 +3140,7 @@ static void load_elf_image(const char *image_name, int
image_fd,
*/
load_addr = target_mmap(loaddr, (size_t)hiaddr - loaddr + 1, PROT_NONE,
MAP_PRIVATE | MAP_ANON | MAP_NORESERVE |
-
On 8/2/23 20:36, Richard Henderson wrote:
On 8/1/23 16:27, Helge Deller wrote:
+/* where to map binaries? */
+#if HOST_LONG_BITS == 64 && TARGET_ABI_BITS == 64
+# define TASK_UNMAPPED_BASE_PIE 0x55
+# define TASK_UNMAPPED_BASE 0x70
+#elif HOST_LONG_BITS == 64 &&
On 19/07/2023 14.38, Luca Bonissi wrote:
On 19/07/23 10:49, Laurent Vivier wrote:
According to linux/glibc sourced, epoll is only packed for x86_64.
And, in recent glibc, also for i386, even it seems not necessary: even if
the __alignof__(long long) is 8, structures like epoll_event are
Henrik Carlqvist, le mar. 01 août 2023 23:27:25 +0200, a ecrit:
> @@ -950,10 +953,11 @@ static int slirp_smb(SlirpState* s, const char
> *exported_dir,
> "printing = bsd\n"
> "disable spoolss = yes\n"
> "usershare max shares = 0\n"
> -"[qemu]\n"
On 8/2/23 20:25, Richard Henderson wrote:
On 8/1/23 16:27, Helge Deller wrote:
Reorganize the guest memory layout to get as much memory as possible for
heap for the guest application.
This patch optimizes the memory layout by loading pie executables
into lower memory and shared libs into
On 8/1/23 16:27, Helge Deller wrote:
+/* where to map binaries? */
+#if HOST_LONG_BITS == 64 && TARGET_ABI_BITS == 64
+# define TASK_UNMAPPED_BASE_PIE 0x55
+# define TASK_UNMAPPED_BASE0x70
+#elif HOST_LONG_BITS == 64 && TARGET_ABI_BITS == 32
+# define TASK_UNMAPPED_BASE_PIE
Wed, 2 Aug 2023 18:18:01 +0300 Michael Tokarev :
> Or if whole thing makes no sense to backport to stable, please
> let me know as well.
The xen-platform change does not need to be backported IMHO.
Olaf
pgpcgqotx9y5h.pgp
Description: Digitale Signatur von OpenPGP
On 8/1/23 16:27, Helge Deller wrote:
Reorganize the guest memory layout to get as much memory as possible for
heap for the guest application.
This patch optimizes the memory layout by loading pie executables
into lower memory and shared libs into higher memory (at
TASK_UNMAPPED_BASE). This
On 8/1/23 16:08, Helge Deller wrote:
+#if defined(TARGET_AARCH64) || defined(TARGET_ARM)
+static int open_cpuinfo(CPUArchState *cpu_env, int fd)
+{
+const int is64 = TARGET_ABI_BITS == 64;
+ARMCPU *cpu = ARM_CPU(thread_cpu);
+uint64_t midr = cpu->midr;
+const int rev = (midr &
cpu->cfg.mvendorid is a 32 bit field and kvm_set_one_reg() always write
a target_ulong val, i.e. a 64 bit field in a 64 bit host.
Given that we're passing a pointer to the mvendorid field, the reg is
reading 64 bits starting from mvendorid and going 32 bits in the next
field, marchid. Here's an
Hi Zhao,
On 8/1/23 05:35, Zhao Liu wrote:
> From: Zhuocheng Ding
>
> Support module level in i386 cpu topology structure "X86CPUTopoInfo".
>
> Since x86 does not yet support the "clusters" parameter in "-smp",
> X86CPUTopoInfo.modules_per_die is currently always 1. Therefore, the
> module
A few patches to fix RME support and allow booting a realm guest, based
on
https://lore.kernel.org/qemu-devel/20230714154648.327466-1-peter.mayd...@linaro.org/
Since v1 I fixed patches 1, 2 and 6 following Peter's comments, and
added patch 5. Patch 6 now factors the timer IRQ update into a new
The AT instruction is UNDEFINED if the {NSE,NS} configuration is
invalid. Add a function to check this on all AT instructions that apply
to an EL lower than 3.
Suggested-by: Peter Maydell
Signed-off-by: Jean-Philippe Brucker
---
target/arm/helper.c | 36 +---
1
In realm state, stage-2 translation tables are fetched from the realm
physical address space (R_PGRQD).
Signed-off-by: Jean-Philippe Brucker
---
target/arm/ptw.c | 26 ++
1 file changed, 18 insertions(+), 8 deletions(-)
diff --git a/target/arm/ptw.c b/target/arm/ptw.c
GPC checks are not performed on the output address for AT instructions,
as stated by ARM DDI 0487J in D8.12.2:
When populating PAR_EL1 with the result of an address translation
instruction, granule protection checks are not performed on the final
output address of a successful translation.
When FEAT_RME is implemented, these bits override the value of
CNT[VP]_CTL_EL0.IMASK in Realm and Root state. Move the IRQ state update
into a new gt_update_irq() function and test those bits every time we
recompute the IRQ state.
Since we're removing the IRQ state from some trace events, add a
At the moment we only handle Secure and Nonsecure security spaces for
the AT instructions. Add support for Realm and Root.
For AArch64, arm_security_space() gives the desired space. ARM DDI0487J
says (R_NYXTL):
If EL3 is implemented, then when an address translation instruction
that applies
When HCR_EL2.E2H is enabled, TLB entries are formed using the EL2&0
translation regime, instead of the EL2 translation regime. The TLB VAE2*
instructions invalidate the regime that corresponds to the current value
of HCR_EL2.E2H.
At the moment we only invalidate the EL2 translation regime. This
Hi Zhao,
On 8/1/23 05:35, Zhao Liu wrote:
> From: Zhao Liu
>
> In cpu_x86_cpuid(), there are many variables in representing the cpu
> topology, e.g., topo_info, cs->nr_cores/cs->nr_threads.
>
> Since the names of cs->nr_cores/cs->nr_threads does not accurately
> represent its meaning, the use
The first two patches mirror similar patches I recently sent for nios2.
1. Use correct parameter for EXIT (d1 instead of d0)
2. Fix use of deposit64 in LSEEK (argument order was incorrect)
The second patch has also been submitted by Peter Maydell, it's
included here because it was required to
On 8/2/23 04:04, Matheus Tavares Bernardino wrote:
Ilya Leoshkevich wrote:
On Tue, 2023-08-01 at 12:37 -0300, Matheus Tavares Bernardino wrote:
Previously, qemu-user would always report PID 1 to GDB. This was
changed
at dc14a7a6e9 (gdbstub: Report the actual qemu-user pid, 2023-06-30),
but
Instead of using d0 (the semihost function number), use d1 (the
provide exit status).
Signed-off-by: Keith Packard
---
target/m68k/m68k-semi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/m68k/m68k-semi.c b/target/m68k/m68k-semi.c
index 88ad9ba814..12235759c7
According to the m68k semihosting spec:
"The instruction used to trigger a semihosting request depends on the
m68k processor variant. On ColdFire, "halt" is used; on other processors
(which don't implement "halt"), "bkpt #0" may be used."
Add support for non-CodeFire processors by matching
On Wed, Aug 02, 2023 at 11:36:43AM -0300, Fabiano Rosas wrote:
> This function currently has a straight-forward part which is waiting
> for the thread to join and a complicated part which is doing a
> qemu_file_shutdown() on the return path file.
>
> The shutdown is tricky because all calls to
The arguments for deposit64 are (value, start, length, fieldval); this
appears to have thought they were (value, fieldval, start,
length). Reorder the parameters to match the actual function.
Signed-off-by: Keith Packard
---
target/m68k/m68k-semi.c | 2 +-
1 file changed, 1 insertion(+), 1
On Tue, Jul 11, 2023 at 1:01 PM Max Chou wrote:
>
> Adds sm4_ck constant for use in sm4 cryptography across different targets.
>
> Signed-off-by: Max Chou
> Reviewed-by: Frank Chang
> Signed-off-by: Max Chou
Reviewed-by: Alistair Francis
Alistair
> ---
> crypto/sm4.c | 10
On 8/2/23 06:08, Mikhail Tyutin wrote:
The fix is to clear TLB_INVALID_MASK bit in tlb_addr, as it happens in other places e.g.
load_helper().
Signed-off-by: Dmitriy Solovev
Signed-off-by: Mikhail Tyutin
---
accel/tcg/cputlb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
The
On Wed, Aug 02, 2023 at 11:36:44AM -0300, Fabiano Rosas wrote:
> Replace the return path retry logic with finishing and restarting the
> thread. This fixes a race when resuming the migration that leads to a
> segfault.
>
> Currently when doing postcopy we consider that an IO error on the
> return
On Tue, Jul 11, 2023 at 1:00 PM Max Chou wrote:
>
> From: Dickon Hood
>
> This commit adds support for the Zvbb vector-crypto extension, which
> consists of the following instructions:
>
> * vrol.[vv,vx]
> * vror.[vv,vx,vi]
> * vbrev8.v
> * vrev8.v
> * vandn.[vv,vx]
> * vbrev.v
> * vclz.v
> *
On 01/08/2023 15.03, Daniel P. Berrangé wrote:
The gitlab cache is limited to only handle content within the
$CI_PROJECT_DIR hierarchy, and as such relative paths are always
implicitly relative to $CI_PROJECT_DIR.
Signed-off-by: Daniel P. Berrangé
---
.gitlab-ci.d/windows.yml | 2 +-
1 file
On 01/08/2023 15.04, Daniel P. Berrangé wrote:
The cache is used to hold the msys installer. Even if the build phase
fails, we should still populate the cache as the installer will be
valid for next time.
Signed-off-by: Daniel P. Berrangé
---
.gitlab-ci.d/windows.yml | 1 +
1 file changed,
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