On 19.06.2012, at 08:21, Benjamin Herrenschmidt wrote:
> This adds a qemu-specific hypervisor call to the pseries machine
> which allows to do what amounts to memmove, memcpy and xor over
> regions of physical memory such as the framebuffer.
>
> This is the simplest way to get usable framebuffer
On 19.06.2012, at 08:02, Benjamin Herrenschmidt wrote:
> We were incorrectly g_free'ing an object that isn't allocated
> in one error path and failed to release it completely in another
>
> This fixes qemu crashes with some cases of IO errors.
>
> Signed-off-by: Benjamin Herrenschmidt
Thanks,
On 19.06.2012, at 07:56, Benjamin Herrenschmidt wrote:
> More recent Power server chips (i.e. based on the 64 bit hash MMU)
> support more than just the traditional 4k and 16M page sizes. This
> can get quite complicated, because which page sizes are supported,
> which combinations are supported
Phandles are the fancy device tree name for "pointer to another node".
To create a phandle property, we most likely want to reference to the
node we're pointing to by its path. So create a helper that allows
us to do so.
Signed-off-by: Alexander Graf
---
v2 -> v3:
-
On 19.06.2012, at 22:30, Benjamin Herrenschmidt wrote:
> On Tue, 2012-06-19 at 16:59 +0200, Juan Quintela wrote:
- The hash table (mentioned above). This is just a big chunk of
>> memory
(it will routinely be 16M), so I really don't want to start
>> iterating
all elements, just a b
pace. This patch adds an allocator for these
properties.
Signed-off-by: Alexander Graf
---
device_tree.c |7 +++
device_tree.h |1 +
2 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/device_tree.c b/device_tree.c
index d037896..7541274 100644
--- a/device_tree.c
+++ b/dev
On 19.06.2012, at 22:51, Peter Maydell wrote:
> On 19 June 2012 20:15, Alexander Graf wrote:
>> Now that we are dynamically creating the dtb, it's really useful to
>> be able to dump the created blob for debugging.
>
>> @@ -300,6 +302,22 @@ static int mpc8544_load
Signed-off-by: Alexander Graf
---
hw/ppce500_mpc8544ds.c |8
pc-bios/mpc8544ds.dtb | Bin 1904 -> 1810 bytes
pc-bios/mpc8544ds.dts |5 -
3 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index 54e7ec7..28c7
v3:
- [phandle helper] rename "string" to target_node_path
- [phandle helper] add correct header includes
- use snprintf
- create and use new multi-cell setting api
Alexander Graf (31):
dt: allow add_subnode to create root subnodes
dt: add helpers for multi-cell adds
dt: add
We have a nice 64bit helper to ease the device tree generation and
make the code more readable when creating 64bit 2-cell parameters.
Use it when generating the device tree.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- rename cell64 -> u64
- don't treat memory as single
Every time we use an address constant, it needs to potentially fit into
a 64bit physical address space. So let's define things accordingly.
Signed-off-by: Alexander Graf
---
hw/ppce500_mpc8544ds.c | 34 +-
1 files changed, 17 insertions(+), 17 dele
Signed-off-by: Alexander Graf
---
v2 -> v3:
- use snprintf
- use new multi-cell setting api
---
hw/ppce500_mpc8544ds.c | 17 +
pc-bios/mpc8544ds.dts |9 -
2 files changed, 17 insertions(+), 9 deletions(-)
diff --git a/hw/ppce500_mpc8544ds.c b
This reverts commit "dt: temporarily disable subtree creation
failure check" which was meant as a temporary solution to keep
external and dynamic device tree construction intact.
Now that we switched to fully dynamic dt construction, it's no
longer necessary.
Signed-off-by:
This patch adds a helper to search for a node's phandle by its path. This
is especially useful when the phandle is part of an array, not just a single
cell in which case qemu_devtree_setprop_phandle would be the easy choice.
Signed-off-by: Alexander Graf
---
device_tree.c |
We're passing the ram size as uint32_t, capping it to 32 bits atm.
Change to target_phys_addr_t (uint64_t) to make sure we have all
the bits.
Signed-off-by: Alexander Graf
---
hw/ppce500_mpc8544ds.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/hw/ppce500_mpc854
On 19.06.2012, at 23:13, Benjamin Herrenschmidt
wrote:
> On Tue, 2012-06-19 at 23:00 +0200, Alexander Graf wrote:
>> How is the problem different from RAM? It's a 16MB region that can be
>> accessed by the guest even during transfer time, so it can get dirty
>> du
On 19.06.2012, at 23:51, Benjamin Herrenschmidt wrote:
> On Tue, 2012-06-19 at 23:48 +0200, Alexander Graf wrote:
>>> We could keep track manually maybe using some kind of dirty bitmap of
>>> changes to the hash table but that would add overhead to things like
>>&g
On 20.06.2012, at 01:28, Benjamin Herrenschmidt wrote:
> On Wed, 2012-06-20 at 01:11 +0200, Juan Quintela wrote:
>>
>>> I am confident I can come up with something as far as the kernel and
>>> qemu <-> kernel interface goes. I need to get my head around the details
>>> on how to implement that t
On 20.06.2012, at 01:52, Benjamin Herrenschmidt wrote:
> On Wed, 2012-06-20 at 01:30 +0200, Alexander Graf wrote:
>>> We support the paravirtualized -M pseries in full emu as well, in which
>>> case the hashed page table is handled by qemu itself who implements the
>&g
e "variables have to be declared
on the top of a block" methodology.
Tested-by: Alexander Graf
Alex
On 20.06.2012, at 11:49, Kevin Wolf wrote:
> Am 20.06.2012 11:36, schrieb Alexander Graf:
>>
>> On 20.06.2012, at 10:02, Kevin Wolf wrote:
>>
>>> Move the declaration of s into the #ifdef sections that actually make
>>> use of it.
>>>
>>
On the e500 series, accessing SPR_EPR magically turns into an access at
that CPU's IACK register on the MPIC. Implement that logic to get kernels
that make use of that feature work.
Signed-off-by: Alexander Graf
---
hw/ppce500_mpc8544ds.c |1 +
target-ppc/Makefile.objs |1 +
t
The number of SPRs avaiable in different PowerPC chip is still increasing. Add
definitions for the MAS7_MAS3 SPR and all currently known bits in EPCR.
Signed-off-by: Alexander Graf
---
target-ppc/cpu.h | 22 ++
1 files changed, 22 insertions(+), 0 deletions(-)
diff --git
The BookE variant of MSR_SF is MSR_CM. Implement everything it takes in TCG to
support running 64bit code with MSR_CM set.
Signed-off-by: Alexander Graf
---
target-ppc/cpu.h |9 +
target-ppc/excp_helper.c |9 +
target-ppc/mem_helper.c |2 +-
target-ppc
This patch adds e5500's CPU initialization to the TCG CPU initialization
code.
Signed-off-by: Alexander Graf
---
target-ppc/translate_init.c | 104 +-
1 files changed, 101 insertions(+), 3 deletions(-)
diff --git a/target-ppc/translate_init.c b/t
Some machines have MSR bits they reset with as enabled. Don't hardcode the
logic, but let the individual core implementations save their own reset
mask into an env variable.
Signed-off-by: Alexander Graf
---
target-ppc/cpu.h|1 +
target-ppc/translate_init.c |
Whatever we pass in to qemu_devtree_setprop to put into the device tree
will not get modified by that function, so it can easily be declared const.
Signed-off-by: Alexander Graf
---
device_tree.c |2 +-
device_tree.h |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a
Recent u-boot has different defines for its gzip extract buffer, but the
common ground seems to be 64MB. So let's bump it up to that, enabling me
to load my test image again ;).
Signed-off-by: Alexander Graf
---
hw/loader.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
s the /compatible contents to its value.
Signed-off-by: Alexander Graf
---
hw/ppce500_mpc8544ds.c | 12 +---
qemu-config.c |4
2 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index f6da25b..d38ad99 100644
---
020DS
This should get you a working kernel. Everything after that works just the same
as with e500v2 or e500mc.
Alex
Alexander Graf (8):
dt: make setprop argument static
PPC: e500: allow users to set the /compatible property via -machine
uImage: increase the gzip load size
PPC: Add some
On 21.06.2012, at 00:26, Scott Wood wrote:
> On 06/20/2012 03:11 PM, Alexander Graf wrote:
>> +/* XXX better abstract into Emb.xxx features */
>> +if (version == fsl_e5500) {
>> +spr_register(env, SPR_BOOKE_EPCR, "EPCR",
>> +
On 21.06.2012, at 01:07, Scott Wood wrote:
> On 06/20/2012 05:59 PM, Alexander Graf wrote:
>>
>> On 21.06.2012, at 00:26, Scott Wood wrote:
>>
>>> On 06/20/2012 03:11 PM, Alexander Graf wrote:
>>>> +/* XXX better abstract into Emb.xxx feat
On 64bit capable systems, MAS2 can actually hold a 64bit virtual page
address. So increase the mask for its EPN.
Signed-off-by: Alexander Graf
---
target-ppc/cpu.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 652a35a
The BookE variant of MSR_SF is MSR_CM. Implement everything it takes in TCG to
support running 64bit code with MSR_CM set.
Signed-off-by: Alexander Graf
---
target-ppc/cpu.h |9 +
target-ppc/excp_helper.c |9 +
target-ppc/mem_helper.c |2 +-
target-ppc
IVPR can either hold 32 or 64 bit addresses, depending on the CPU type. Let
the CPU initialization function pass in its mask itself, so we can easily
extend it.
Signed-off-by: Alexander Graf
---
target-ppc/translate_init.c |9 +
1 files changed, 5 insertions(+), 4 deletions(-)
diff
This patch moves the debug #ifdef'ed SPR trace generation into its
own function, so we can call it from multiple places.
Signed-off-by: Alexander Graf
---
target-ppc/translate_init.c | 30 ++
1 files changed, 18 insertions(+), 12 deletions(-)
diff --git a/t
The number of SPRs avaiable in different PowerPC chip is still increasing. Add
definitions for the MAS7_MAS3 SPR and all currently known bits in EPCR.
Signed-off-by: Alexander Graf
---
target-ppc/cpu.h | 22 ++
1 files changed, 22 insertions(+), 0 deletions(-)
diff --git
020DS
This should get you a working kernel. Everything after that works just the same
as with e500v2 or e500mc.
v1 -> v2:
- remove reset msr vector
- clean up ivpr_mask code
- make MAS2 64bit aware
Alex
Alexander Graf (11):
dt: make setprop argument static
PPC: e500: allow users to
s the /compatible contents to its value.
Signed-off-by: Alexander Graf
---
hw/ppce500_mpc8544ds.c | 12 +---
qemu-config.c |4
2 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index f6da25b..d38ad99 100644
---
The MAS registers on BookE are all 32 bit wide, except for MAS2, which
can hold up to 64 bit on 64 bit capable CPUs. Reflect this in the SPR
setting code, so that the guest can never write invalid values in them.
Signed-off-by: Alexander Graf
---
target-ppc/translate_init.c | 19
Recent u-boot has different defines for its gzip extract buffer, but the
common ground seems to be 64MB. So let's bump it up to that, enabling me
to load my test image again ;).
Signed-off-by: Alexander Graf
---
hw/loader.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
This patch adds e5500's CPU initialization to the TCG CPU initialization
code.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- remove reset msr vector
- clean up ivpr_mask code
---
target-ppc/translate_init.c | 96 +-
1 files changed, 93 in
On the e500 series, accessing SPR_EPR magically turns into an access at
that CPU's IACK register on the MPIC. Implement that logic to get kernels
that make use of that feature work.
Signed-off-by: Alexander Graf
---
hw/ppce500_mpc8544ds.c |1 +
target-ppc/Makefile.objs |1 +
t
Whatever we pass in to qemu_devtree_setprop to put into the device tree
will not get modified by that function, so it can easily be declared const.
Signed-off-by: Alexander Graf
---
device_tree.c |2 +-
device_tree.h |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a
On 21.06.2012, at 18:04, Scott Wood wrote:
> On 06/21/2012 08:33 AM, Alexander Graf wrote:
>> The MAS registers on BookE are all 32 bit wide, except for MAS2, which
>> can hold up to 64 bit on 64 bit capable CPUs. Reflect this in the SPR
>> setting code, so that the guest ca
On 21.06.2012, at 20:09, Blue Swirl wrote:
> On Wed, Jun 20, 2012 at 8:11 PM, Alexander Graf wrote:
>> Some machines have MSR bits they reset with as enabled. Don't hardcode the
>> logic, but let the individual core implementations save their own reset
>>
iner for the time
being, unless someone else wants to stand up and take on it.
Acked-by: Alexander Graf
Alex
On 23.06.2012, at 02:45, Peter Crosthwaite wrote:
> On Sat, Jun 23, 2012 at 7:14 AM, Alexander Graf wrote:
>>
>> On 22.06.2012, at 15:17, Peter Crosthwaite wrote:
>>
>>> CC device-tree.c original contributors. (Jerome Young and Hollis Blanchard).
>>>
Commit eeacee4d865 changed the syntax of tcg_dump_ops, but didn't convert
all users (notably missing the ppc ones) to it. Fix them to the new syntax.
Signed-off-by: Alexander Graf
---
tcg/ppc/tcg-target.c |2 +-
tcg/ppc64/tcg-target.c |2 +-
2 files changed, 2 insertions(
Hi Blue / Aurelien,
This is my current patch queue for ppc. Please pull.
Alex
The following changes since commit affe5189907f397514cdd4ee7446595c1246a0e9:
Alexander Graf (1):
TCG: Fix compile breakage in tcg_dump_ops
are available in the git repository at:
git://repo.or.cz/qemu
From: Blue Swirl
When the code is moved together by the next patch, compiler
detects a possible uninitialized variable use. Avoid the warning
by initializing the variables.
Signed-off-by: Blue Swirl
Signed-off-by: Alexander Graf
Signed-off-by: Andreas Färber
Signed-off-by: Alexander Graf
Signed-off-by: Alexander Graf
---
hw/ppce500_mpc8544ds.c | 17 +
pc-bios/mpc8544ds.dts |9 -
2 files changed, 17 insertions(+), 9 deletions(-)
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index a078e24..c7c16c1 100644
--- a/hw/ppce500_mpc8544ds.c
Signed-off-by: Alexander Graf
---
hw/ppce500_mpc8544ds.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index 28c7c8c..a078e24 100644
--- a/hw/ppce500_mpc8544ds.c
+++ b/hw/ppce500_mpc8544ds.c
@@ -101,6 +101,7 @@ static int
We want to get rid of the concept of loading an external device tree and instead
generate our own. However, to do this we need to also create a device tree
template programatically.
This patch adds a helper to create an empty device tree in memory.
Signed-off-by: Alexander Graf
Reviewed-by
Signed-off-by: Alexander Graf
---
hw/ppce500_mpc8544ds.c |8
pc-bios/mpc8544ds.dtb | Bin 1904 -> 1810 bytes
pc-bios/mpc8544ds.dts |5 -
3 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index 54e7ec7..28c7
Signed-off-by: Alexander Graf
---
hw/ppce500_mpc8544ds.c | 16
1 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index c68e994..5c2b6ab 100644
--- a/hw/ppce500_mpc8544ds.c
+++ b/hw/ppce500_mpc8544ds.c
@@ -83,6 +83,8
vided by qemu (including SLOF) which internally calls H_RTAS.
We might in the future implement part (or even all) of RTAS inside the
guest like IBM's firmware does and replace H_RTAS with some finer grained
set of private hypercalls.
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: Alex
Some times in the device tree, we find an array of 2 u32 cells that
really are a single u64 value. This patch adds a helper to make the
creation of these easy.
Signed-off-by: Alexander Graf
Reviewed-by: Peter Crosthwaite
---
device_tree.c |7 +++
device_tree.h |2 ++
2 files
From: Blue Swirl
Add an explicit CPUPPCState parameter instead of relying on AREG0.
Signed-off-by: Blue Swirl
Signed-off-by: Alexander Graf
Signed-off-by: Andreas Färber
Signed-off-by: Alexander Graf
---
target-ppc/Makefile.objs|1 -
target-ppc/helper.h | 74
From: Blue Swirl
Move decrementer and timebase helpers to a dedicated file.
Signed-off-by: Blue Swirl
Signed-off-by: Alexander Graf
Signed-off-by: Andreas Färber
Signed-off-by: Alexander Graf
---
target-ppc/Makefile.objs |2 +
target-ppc/op_helper.c | 135
, cpu_{ld,st}{l,uw}_data in loads and stores.
Signed-off-by: Blue Swirl
Signed-off-by: Alexander Graf
Signed-off-by: Andreas Färber
Signed-off-by: Alexander Graf
---
configure|2 +-
cpu-all.h|9 +++
target-ppc/Makefile.objs
On 64bit capable systems, MAS2 can actually hold a 64bit virtual page
address. So increase the mask for its EPN.
Signed-off-by: Alexander Graf
---
target-ppc/cpu.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 652a35a
When generating serial port device tree nodes, we duplicate quite a bit
of code, because there are 2 of them in the mpc8544ds board we emulate.
Shove the generating code into a function, so we duplicate less code.
Signed-off-by: Alexander Graf
---
hw/ppce500_mpc8544ds.c | 54
If anyone outside of QEMU wants to mess with a QEMU generated device tree,
he needs to know which range phandles are valid in. So let's expose a
machine option that an external program can use to set the start allocate
id for phandles in QEMU.
Signed-off-by: Alexander Graf
---
device_t
From: Blue Swirl
Move MMU, TLB, SLB and BAT ops to mmu_helper.c.
Signed-off-by: Blue Swirl
Signed-off-by: Alexander Graf
Signed-off-by: Andreas Färber
Signed-off-by: Alexander Graf
---
target-ppc/Makefile.objs |2 +
target-ppc/mmu_helper.c | 882
From: Blue Swirl
Move misc helpers from op_helper.c to misc_helpers.c.
Signed-off-by: Blue Swirl
Signed-off-by: Alexander Graf
Signed-off-by: Andreas Färber
Signed-off-by: Alexander Graf
---
target-ppc/Makefile.objs |2 +
target-ppc/misc_helper.c | 116
This patch adds e5500's CPU initialization to the TCG CPU initialization
code.
Signed-off-by: Alexander Graf
---
target-ppc/translate_init.c | 96 +-
1 files changed, 93 insertions(+), 3 deletions(-)
diff --git a/target-ppc/translate_init.c b/t
From: Benjamin Herrenschmidt
We were incorrectly g_free'ing an object that isn't allocated
in one error path and failed to release it completely in another
This fixes qemu crashes with some cases of IO errors.
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: Alexander Gra
On the e500 series, accessing SPR_EPR magically turns into an access at
that CPU's IACK register on the MPIC. Implement that logic to get kernels
that make use of that feature work.
Signed-off-by: Alexander Graf
---
hw/ppce500_mpc8544ds.c |1 +
target-ppc/Makefile.objs |1 +
t
roperty in the guest device tree.
This patch generates this property using the supported page size
information that's already in the CPUState.
Signed-off-by: Nishanth Aravamudan
Signed-off-by: David Gibson
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: Alexander Gra
Signed-off-by: Alexander Graf
---
hw/ppce500_mpc8544ds.c |9 +
pc-bios/mpc8544ds.dts |6 --
2 files changed, 9 insertions(+), 6 deletions(-)
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index 5c2b6ab..03938b2 100644
--- a/hw/ppce500_mpc8544ds.c
+++ b/hw
The MAS registers on BookE are all 32 bit wide, except for MAS2, which
can hold up to 64 bit on 64 bit capable CPUs. Reflect this in the SPR
setting code, so that the guest can never write invalid values in them.
Signed-off-by: Alexander Graf
---
target-ppc/translate_init.c | 19
From: Blue Swirl
Add an explicit CPUPPCState parameter instead of relying on AREG0.
Signed-off-by: Blue Swirl
Signed-off-by: Alexander Graf
Signed-off-by: Andreas Färber
Signed-off-by: Alexander Graf
---
target-ppc/Makefile.objs|1 -
target-ppc/helper.h | 18
Every time we use an address constant, it needs to potentially fit into
a 64bit physical address space. So let's define things accordingly.
Signed-off-by: Alexander Graf
---
hw/ppce500_mpc8544ds.c | 34 +-
1 files changed, 17 insertions(+), 17 dele
Signed-off-by: Alexander Graf
---
hw/ppce500_mpc8544ds.c |5 +
pc-bios/mpc8544ds.dtb | Bin 1972 -> 1924 bytes
pc-bios/mpc8544ds.dts |5 -
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index 3ec9013..c046
so - map devices above 32bit.
Signed-off-by: Alexander Graf
---
hw/ppce500_mpc8544ds.c | 28 ++--
1 files changed, 18 insertions(+), 10 deletions(-)
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index c6a09bb..bf48bc7 100644
--- a/hw/ppce500_mpc8544ds.c
From: Blue Swirl
Add an explicit CPUPPCState parameter instead of relying on AREG0.
Signed-off-by: Blue Swirl
Signed-off-by: Alexander Graf
Signed-off-by: Andreas Färber
[fix unwanted whitespace line in Makefile.target]
Signed-off-by: Alexander Graf
---
target-ppc/Makefile.objs |1
Due to popular demand, we're updating the way we generate the MPIC
node and interrupt lines based on what the current state of art is.
Requested-by: Scott Wood
Signed-off-by: Alexander Graf
---
hw/ppce500_mpc8544ds.c | 33 ++---
1 files changed, 18 inser
From: Fabien Chouteau
Do not call cpu_dump_state if logfile is NULL.
Signed-off-by: Fabien Chouteau
[agraf: adjust to inline functions]
Signed-off-by: Alexander Graf
---
qemu-log.h |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/qemu-log.h b/qemu-log.h
index
that allows us
to pass the cells as arguments.
Signed-off-by: Alexander Graf
Reviewed-by: Peter Crosthwaite
---
device_tree.h | 12
1 files changed, 12 insertions(+), 0 deletions(-)
diff --git a/device_tree.h b/device_tree.h
index 4378685..1e671e2 100644
--- a/device_tree.h
+++ b
We're passing the ram size as uint32_t, capping it to 32 bits atm.
Change to target_phys_addr_t (uint64_t) to make sure we have all
the bits.
Signed-off-by: Alexander Graf
---
hw/ppce500_mpc8544ds.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/hw/ppce500_mpc854
Phandles are the fancy device tree name for "pointer to another node".
To create a phandle property, we most likely want to reference to the
node we're pointing to by its path. So create a helper that allows
us to do so.
Signed-off-by: Alexander Graf
Reviewed-by: Pe
From: Blue Swirl
Move more misc helpers from helper.c to misc_helper.c.
Signed-off-by: Blue Swirl
Signed-off-by: Alexander Graf
Signed-off-by: Andreas Färber
Signed-off-by: Alexander Graf
---
target-ppc/helper.c |9 -
target-ppc/misc_helper.c |9 +
2 files
Recent u-boot has different defines for its gzip extract buffer, but the
common ground seems to be 64MB. So let's bump it up to that, enabling me
to load my test image again ;).
Signed-off-by: Alexander Graf
---
hw/loader.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
We want to be able to override the automatically created device tree
by using the -dtb option. Implement this for the mpc8544ds machine.
Signed-off-by: Alexander Graf
---
hw/ppce500_mpc8544ds.c | 26 ++
1 files changed, 22 insertions(+), 4 deletions(-)
diff --git a/hw
Our subnode creation helper can't handle creation of root subnodes,
like "/memory". Fix this by allowing the parent node to be an empty
string, indicating the root node.
Signed-off-by: Alexander Graf
Reviewed-by: Peter Crosthwaite
---
device_tree.c |7 ++-
1 files change
represent offsets
within a page are ignored and should be cleared.
There is a similar (but more complicated) definition in PowerISA V2.06.
Signed-off-by: Fabien Chouteau
Signed-off-by: Alexander Graf
---
target-ppc/mmu_helper.c | 17 +++--
1 files changed, 15 insertions(+), 2
Signed-off-by: Alexander Graf
---
hw/ppce500_mpc8544ds.c | 50
pc-bios/mpc8544ds.dtb | Bin 1810 -> 72 bytes
pc-bios/mpc8544ds.dts | 46
3 files changed, 50 insertions(+), 46 deletions(-)
d
From: Blue Swirl
Lookup table 'hbrev' is never written to, so add a 'const' qualifier.
Signed-off-by: Blue Swirl
Signed-off-by: Alexander Graf
Signed-off-by: Andreas Färber
Signed-off-by: Alexander Graf
---
target-ppc/int_helper.c |2 +-
1 files changed, 1 insert
The BookE variant of MSR_SF is MSR_CM. Implement everything it takes in TCG to
support running 64bit code with MSR_CM set.
Signed-off-by: Alexander Graf
---
target-ppc/cpu.h |9 +
target-ppc/excp_helper.c |9 +
target-ppc/mem_helper.c |2 +-
target-ppc
Signed-off-by: Alexander Graf
---
hw/ppce500_mpc8544ds.c | 35 +++
pc-bios/mpc8544ds.dts | 26 --
2 files changed, 35 insertions(+), 26 deletions(-)
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index c7c16c1..c68e994
ation about the guest
configuration.
Signed-off-by: Alexander Graf
---
hw/ppce500_mpc8544ds.c | 18 ++
qemu-config.c |4
2 files changed, 22 insertions(+), 0 deletions(-)
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index 880ed55..7c6edc2 100644
This patch adds a helper to search for a node's phandle by its path. This
is especially useful when the phandle is part of an array, not just a single
cell in which case qemu_devtree_setprop_phandle would be the easy choice.
Signed-off-by: Alexander Graf
Reviewed-by: Peter Crosth
Whatever we pass in to qemu_devtree_setprop to put into the device tree
will not get modified by that function, so it can easily be declared const.
Signed-off-by: Alexander Graf
Reviewed-by: Peter Crosthwaite
---
device_tree.c |2 +-
device_tree.h |2 +-
2 files changed, 2 insertions
pace. This patch adds an allocator for these
properties.
Signed-off-by: Alexander Graf
---
device_tree.c |7 +++
device_tree.h |1 +
2 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/device_tree.c b/device_tree.c
index d037896..7541274 100644
--- a/device_tree.c
+++ b/dev
From: Blue Swirl
Add an explicit CPUPPCState parameter instead of relying on AREG0.
Signed-off-by: Blue Swirl
Signed-off-by: Alexander Graf
Signed-off-by: Andreas Färber
Signed-off-by: Alexander Graf
---
target-ppc/Makefile.objs |1 -
target-ppc/helper.h | 42
The number of SPRs avaiable in different PowerPC chip is still increasing. Add
definitions for the MAS7_MAS3 SPR and all currently known bits in EPCR.
Signed-off-by: Alexander Graf
---
target-ppc/cpu.h | 22 ++
1 files changed, 22 insertions(+), 0 deletions(-)
diff --git
s the /compatible contents to its value.
Signed-off-by: Alexander Graf
---
hw/ppce500_mpc8544ds.c | 12 +---
qemu-config.c |4
2 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index f6da25b..d38ad99 100644
---
Signed-off-by: Alexander Graf
---
target-ppc/cpu.h| 31 +++
target-ppc/kvm.c| 208 +++
target-ppc/kvm_ppc.h|5 +
target-ppc/mmu_helper.c |7 ++
target-ppc/translate_init.c | 21 +
5 files changed,
which was the only way to boot the mpc8544ds
machine. This patch only manifests said requirement in the build system.
Signed-off-by: Alexander Graf
---
hw/ppc/Makefile.objs |2 +-
hw/ppce500_mpc8544ds.c |5 -
2 files changed, 1 insertions(+), 6 deletions(-)
diff --git a/h
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