Every device that can do PCI should also be able to do IDE. So let's move
the IDE definitions over to pci.mak.
Signed-off-by: Alexander Graf ag...@suse.de
---
default-configs/arm-softmmu.mak |1 -
default-configs/i386-softmmu.mak |3 ---
default-configs/mips-softmmu.mak
This patch adds an emulation layer for an ICH-9 AHCI controller. For now
this controller does not do IDE legacy emulation. It is a pure AHCI controller.
Signed-off-by: Alexander Graf ag...@suse.de
---
v1 - v2:
- rename IDEExtender to IDEBusOps and make a pointer (kraxel)
- make dma hooks
ATAPI also can do ncq, so let's expose the capability.
This patch makes CD-ROM support work on Windows 7 for me.
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ide/core.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/hw/ide/core.c b/hw/ide/core.c
index
On 14.12.2010, at 21:31, Benjamin Herrenschmidt wrote:
The only working system emulation we have are Macs (G3 beige, G4, G5),
so we can't just ignore Apple.
Alex even made me stick to their odd 0x41 rtas-version property. ;)
Hah :-) Nothing ever used RTAS on these... afaik, it didn't
On 14.12.2010, at 17:20, Kevin Wolf wrote:
Am 14.12.2010 01:34, schrieb Alexander Graf:
The ATA core is currently heavily intertwined with BMDMA code. Let's loosen
that a bit, so we can happily replace the DMA backend with different
implementations.
Signed-off-by: Alexander Graf ag
The ATA core is currently heavily intertwined with BMDMA code. Let's loosen
that a bit, so we can happily replace the DMA backend with different
implementations.
Signed-off-by: Alexander Graf ag...@suse.de
---
v7 - v8:
- rewrite as DMA ops
v8 - v9:
- fold in: split out irq setting
We hook into transfer_start and immediately call the end function
for ahci. This means that everything needs to be in place for the
end function when we start the transfer, so let's move the function
down to where all state is in place.
Signed-off-by: Alexander Graf ag...@suse.de
---
v9 - v10
On 14.12.2010, at 17:28, Kevin Wolf wrote:
Am 14.12.2010 01:34, schrieb Alexander Graf:
This patch adds support for AHCI emulation. I have tested and verified it
works
in Linux, OpenBSD, Windows Vista and Windows 7. This AHCI emulation supports
NCQ, so multiple read or write requests can
Am 15.12.2010 um 09:28 schrieb Gerd Hoffmann kra...@redhat.com:
Hi,
One thing that might be worth considering is to have preliminary
seabios support for booting. Gerd does have something in the queue
there ;).
Not in the queue, it's upstream. Just pull latest seabios. As it didn't
':
/src/qemu/hw/ide/ahci.c:1103:19: error: variable 'pr' set but not used
[-Werror=unused-but-set-variable]
CC: Alexander Graf ag...@suse.de
CC: Kevin Wolf kw...@redhat.com
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/ide/ahci.c |4
1 files changed, 0 insertions(+), 4
':
/src/qemu/hw/ide/ahci.c:1103:19: error: variable 'pr' set but not used
[-Werror=unused-but-set-variable]
In the tfd variable case, fix the logic also.
CC: Alexander Graf ag...@suse.de
CC: Kevin Wolf kw...@redhat.com
Signed-off-by: Blue Swirl blauwir...@gmail.com
Acked-by: Alexander Graf
...@reactos.org
Cc: Alexander Graf ag...@suse.de
Signed-off-by: Andreas Färber andreas.faer...@web.de
---
hw/ppc_prep.c |3 ---
1 files changed, 0 insertions(+), 3 deletions(-)
diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c
index 1492266..6b22122 100644
--- a/hw/ppc_prep.c
+++ b/hw/ppc_prep.c
@@ -600,9
On 14.12.2010, at 01:49, Andreas Färber wrote:
Hello,
Based on an earlier attempt of mine to make OpenBIOS work with -M prep,
with kind support from Hervé Poussineau here's an initial stab at
fixing the long-broken PReP emulation and preparing migration from
abandoned OpenHack'Ware to
On 19.12.2010, at 11:46, Blue Swirl wrote:
This patch replaces explicit bswaps with endianness hints to the
mmio layer.
CC: Alexander Graf ag...@suse.de
Signed-off-by: Blue Swirl blauwir...@gmail.com
---
hw/serial.c | 86 --
1
On 19.12.2010, at 13:26, Andreas Färber wrote:
Am 19.12.2010 um 10:52 schrieb Alexander Graf:
On 14.12.2010, at 01:49, Andreas Färber wrote:
r3480 added this check to account for the entry vector 0xfff00100 to be
available for CPUs that need it. Today however, the NIP is not yet
On 19.12.2010, at 16:04, Andreas Färber wrote:
Am 19.12.2010 um 10:54 schrieb Alexander Graf:
On 14.12.2010, at 01:49, Andreas Färber wrote:
Hello,
Based on an earlier attempt of mine to make OpenBIOS work with -M prep,
with kind support from Hervé Poussineau here's an initial stab
On 19.12.2010, at 15:19, Mulyadi Santosa wrote:
Hi :)
On Sun, Dec 19, 2010 at 03:29, Stefano Bonifazi stefboombas...@email.it
wrote:
Hi!
I am answering myself hoping that my solution may help somebody other who
has to face the same problem:
I am not PPC user by myself, but I think it
On 19.12.2010, at 20:12, Andreas Färber wrote:
Am 19.12.2010 um 16:34 schrieb Alexander Graf:
On 19.12.2010, at 16:04, Andreas Färber wrote:
Am 19.12.2010 um 10:54 schrieb Alexander Graf:
On 14.12.2010, at 01:49, Andreas Färber wrote:
Hello,
Based on an earlier attempt of mine
Poussineau hpous...@reactos.org
Cc: Alexander Graf ag...@suse.de
Signed-off-by: Andreas Färber andreas.faer...@web.de
The implied question behind RFC is, has this been a dormant bug in
ppc_prep.c or would this need to be fixed at ISA level (allowing two devices
to share the same IRQ) in isa
On 20.12.2010, at 13:19, François Revol wrote:
So we certainly do need some open source firmware solution for prep to at
least have Linux running. For other guests, I don't see a reason why users
shouldn't try to fetch a real firmware blob separately :).
We're not shipping any firmware
When not using MSI, receiving an interrupt while the interrupt line is active
pulses the interrupt line. Without this, guests don't realize that a new
interrupt occured.
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ide/ahci.c |3 +--
1 files changed, 1 insertions(+), 2 deletions
.
In preparation of potential non-ich9 implementations, this set also
splits ahci code from concrete ich9 specific code. That way we can
later on create other AHCI adapters while reusing a lot of code.
Git tree (including BIOS patch to enable booting from AHCI):
git://repo.or.cz/qemu/ahci.git ahci
Alexander
The drive sends a d2h init fis on initialization. Usually, the guest doesn't
receive fises yet at that point though, so the delivery is deferred.
Let's reflect that by sending the init fis on fis receive enablement.
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ide/ahci.c | 34
, making things easier to
read an understand.
Signed-off-by: Alexander Graf ag...@suse.de
---
v1 - v2:
- reflect ich name in init functions
---
hw/ide/ahci.c | 110 -
hw/ide/ich.c | 90 +-
2
-by: Alexander Graf ag...@suse.de
---
hw/ide/ahci.c |5 -
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index 7a29925..bd4f8a4 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -332,7 +332,7 @@ static void ahci_mem_writel(void *ptr, target_phys_addr_t
of ports.
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ide/ahci.c | 29 +++--
hw/ide/ahci.h | 10 +-
hw/ide/ich.c |3 ++-
3 files changed, 26 insertions(+), 16 deletions(-)
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index bd4f8a4..c0bc5ff 100644
From: Sebastian Herbszt herb...@gmx.de
There are multiple ahci devices out there. The currently implemented ich-9
is only one of the many. So let's split that one out into a separate file
to stress the difference.
Signed-off-by: Sebastian Herbszt herb...@gmx.de
Signed-off-by: Alexander Graf ag
The DMA helpers incur additional overhead on data transfers. I'm not
sure we need the additional complexity provided by them. So let's just
use qiovs directly when running in the fast path (ncq).
Signed-off-by: Alexander Graf ag...@suse.de
---
hw/ide/ahci.c | 100
On 20.12.2010, at 23:24, Andreas Färber wrote:
Am 20.12.2010 um 13:30 schrieb Alexander Graf:
On 20.12.2010, at 13:19, François Revol wrote:
So we certainly do need some open source firmware solution for prep to
at least have Linux running. For other guests, I don't see a reason why
On 20.12.2010, at 23:24, Andreas Färber wrote:
Am 20.12.2010 um 13:30 schrieb Alexander Graf:
On 20.12.2010, at 13:19, François Revol wrote:
So we certainly do need some open source firmware solution for prep to
at least have Linux running. For other guests, I don't see a reason why
On 31.05.2009, at 17:20, Stuart Brady wrote:
Hi!
Here's an update of the Z80 system emulator, which currently emulates
the ZX Spectrum only. Significant changes since Ulrich Hecht's updated
version are as follows:
* Converted CPU emulation core to TCG
* Fixed emulation of 'bright'
On 21.12.2010, at 00:00, Andreas Färber wrote:
Am 20.12.2010 um 10:04 schrieb Alexander Graf:
On 19.12.2010, at 20:12, Andreas Färber wrote:
Am 19.12.2010 um 16:34 schrieb Alexander Graf:
On 19.12.2010, at 16:04, Andreas Färber wrote:
Am 19.12.2010 um 10:54 schrieb Alexander Graf
On 21.12.2010, at 01:06, Andreas Färber wrote:
Am 20.12.2010 um 23:45 schrieb Alexander Graf:
On 31.05.2009, at 17:20, Stuart Brady wrote:
Here's an update of the Z80 system emulator, which currently emulates
the ZX Spectrum only. [...]
[...] do you think it's a valuable target
On 21.12.2010, at 01:33, Andreas Färber wrote:
Am 21.12.2010 um 00:07 schrieb Alexander Graf:
On 21.12.2010, at 00:00, Andreas Färber wrote:
Am 20.12.2010 um 10:04 schrieb Alexander Graf:
On 19.12.2010, at 20:12, Andreas Färber wrote:
Am 19.12.2010 um 16:34 schrieb Alexander Graf
On 21.12.2010, at 02:24, Andreas Färber wrote:
Am 21.12.2010 um 01:10 schrieb Alexander Graf:
On 21.12.2010, at 01:06, Andreas Färber wrote:
Am 20.12.2010 um 23:45 schrieb Alexander Graf:
On 31.05.2009, at 17:20, Stuart Brady wrote:
Here's an update of the Z80 system emulator, which
On 21.12.2010, at 12:14, Artyom Tarasenko wrote:
On Tue, Dec 21, 2010 at 10:25 AM, Alexander Graf ag...@suse.de wrote:
On 21.12.2010, at 02:24, Andreas Färber wrote:
Am 21.12.2010 um 01:10 schrieb Alexander Graf:
On 21.12.2010, at 01:06, Andreas Färber wrote:
Am 20.12.2010 um 23:45
On 21.12.2010, at 17:56, Anthony Liguori wrote:
On 12/21/2010 10:07 AM, Markus Armbruster wrote:
Richard W.M. Jonesrjo...@redhat.com writes:
On Tue, Dec 21, 2010 at 04:41:03PM +0100, Markus Armbruster wrote:
Like this?
upstream qemu | default |-enable-kvm
On 02.12.2010, at 15:18, anthony.per...@citrix.com wrote:
From: Anthony PERARD anthony.per...@citrix.com
This option gives the ability to switch one accelerator like kvm, xen
or the default one tcg. We can specify more than one accelerator by
separate them by a colon. QEMU will try each
On 21.12.2010, at 19:28, Andreas Färber wrote:
Since Christmas and the New Year with its good intensions are approaching,
apart from z80 there's some more feature forks around:
http://repo.or.cz/w/qemu.git/forks?o=age
- hpoussin.git ppc contains the 40p machine that I'm reviewing for
On 21.12.2010, at 19:57, Andreas Färber wrote:
Am 21.12.2010 um 18:33 schrieb Alexander Graf:
On 02.12.2010, at 15:18, anthony.per...@citrix.com wrote:
From: Anthony PERARD anthony.per...@citrix.com
This option gives the ability to switch one accelerator like kvm, xen
or the default
On 22.12.2010, at 00:51, Andreas Färber andreas.faer...@web.de wrote:
Am 21.12.2010 um 01:46 schrieb Alexander Graf:
On 21.12.2010, at 01:33, Andreas Färber wrote:
OpenHack'Ware never worked for me before. Supposedly patched Linux kernels
loaded via -kernel, still searching
On 22.12.2010, at 14:27, Christoph Hellwig wrote:
On Wed, Dec 22, 2010 at 02:54:54PM +0100, Hannes Reinecke wrote:
Most modern HBAs are using separate codepaths for streaming/block I/O
anyway,
That's not true at all. Every normal HBA justs passes normal SCSI
commands to the SCSI targets.
On 22.12.2010, at 22:59, Benjamin Herrenschmidt wrote:
On Wed, 2010-12-22 at 14:54 +0100, Hannes Reinecke wrote:
Well, sort of. 'sg' doesn't have any block queue limits directly as the
block queue is attached to the block device (surprise, surprise :-).
But nevertheless any commands send
On 23.12.2010, at 00:35, Benjamin Herrenschmidt wrote:
On Thu, 2010-12-23 at 00:23 +0100, Alexander Graf wrote:
The non working compat ioctl is one, the fact that sg has
no /sys/class/block (or /sys/block) entries is another, etc... Ie,
we
are faced with a problem with Linux not exposing
On 23.12.2010, at 00:44, Benjamin Herrenschmidt wrote:
On Thu, 2010-12-23 at 00:39 +0100, Alexander Graf wrote:
This all belongs in the block layer. If you create a call back
function or property in the block struct, windows can implement its
own limits when someone sits down to implement
Am 23.12.2010 um 09:23 schrieb Stefan Hajnoczi stefa...@gmail.com:
On Mon, Dec 20, 2010 at 9:13 PM, Alexander Graf ag...@suse.de wrote:
From: Sebastian Herbszt herb...@gmx.de
There are multiple ahci devices out there. The currently implemented ich-9
is only one of the many. So let's split
On 23.12.2010, at 09:53, Stefan Hajnoczi wrote:
The len and is_write arguments to cpu_physical_memory_unmap() were
swapped. This patch changes calls to use the correct argument ordering.
Signed-off-by: Stefan Hajnoczi stefa...@linux.vnet.ibm.com
Ouch :).
Acked-by: Alexander Graf ag
Am 27.12.2010 um 00:28 schrieb Andreas Färber andreas.faer...@web.de:
Am 14.12.2010 um 01:49 schrieb Andreas Färber:
Workaround the following error:
qemu: hardware error: register_ioport_read: invalid opaque
I found out that this is a conflict with i8042 registering I/O port 0x0092 in
, but I like the simplicity of it :).
Acked-by: Alexander Graf ag...@suse.de
Alex
On 04.01.2011, at 15:22, Anthony Liguori wrote:
On 01/04/2011 08:16 AM, Gerd Hoffmann wrote:
On 01/04/11 14:49, Anthony Liguori wrote:
On 01/04/2011 07:43 AM, Gerd Hoffmann wrote:
Hi,
Windows guests needs some registry hackery and Linux guests some
udev rules
to enable remote wakeup
On 04.01.2011, at 16:06, Nadav Har'El wrote:
This patch adds the VMX cpuid feature to the default qemu64 CPU type.
If KVM doesn't support this feature (i.e., nested VMX is not in the code,
or not enabled) it will mask out this bit.
qemu64 defines capabilities that qemu emulates. Qemu does
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 27.12.2010, at 01:25, Andreas Färber wrote:
Am 27.12.2010 um 01:11 schrieb Alexander Graf:
Am 27.12.2010 um 00:28 schrieb Andreas Färber andreas.faer...@web.de:
Am 14.12.2010 um 01:49 schrieb Andreas Färber:
Workaround the following
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 27.12.2010, at 02:01, Rob Landley wrote:
On Monday 20 December 2010 03:04:38 Alexander Graf wrote:
On 19.12.2010, at 20:12, Andreas Färber wrote:
Am 19.12.2010 um 16:34 schrieb Alexander Graf:
On 19.12.2010, at 16:04, Andreas Färber wrote
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 04.01.2011, at 22:36, Andreas Färber wrote:
Am 04.01.2011 um 21:57 schrieb Alexander Graf:
On 27.12.2010, at 01:25, Andreas Färber wrote:
Am 27.12.2010 um 01:11 schrieb Alexander Graf:
Am 27.12.2010 um 00:28 schrieb Andreas Färber
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 04.01.2011, at 22:39, Nadav Har'El wrote:
On Tue, Jan 04, 2011, Alexander Graf wrote about Re: [Qemu-devel] [PATCH]
Add VMX cpuid feature to qemu64:
On 04.01.2011, at 16:06, Nadav Har'El wrote:
This patch adds the VMX cpuid feature
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 04.01.2011, at 22:59, Andreas Färber wrote:
Am 04.01.2011 um 22:43 schrieb Alexander Graf:
On 04.01.2011, at 22:36, Andreas Färber wrote:
Am 04.01.2011 um 21:57 schrieb Alexander Graf:
On 27.12.2010, at 01:25, Andreas Färber wrote
On 05.01.2011, at 13:07, Rob Landley wrote:
On Tuesday 04 January 2011 15:00:12 Alexander Graf wrote:
I have this very issue with s390. The only host to run (and compile)
this on is an s390. And few people have those. So it breaks from time to
time.
I have some pages bookmarked hinting
On 02.01.2011, at 13:06, Aurelien Jarno wrote:
Use the new function float32_is_any_nan() instead of
float32_is_quiet_nan() || float32_is_signaling_nan().
Cc: Alexander Graf ag...@suse.de
Signed-off-by: Aurelien Jarno aurel...@aurel32.net
I frankly have very little knowledge of FP stuff
.
So I guess you're right.
Acked-by: Alexander Graf ag...@suse.de
Alex
-native instead.
Cc: Alexander Graf ag...@suse.de
Signed-off-by: Aurelien Jarno aurel...@aurel32.net
Looks good from a remote view. Again, I'm not an FP expert :)
Acked-by: Alexander Graf ag...@suse.de
Alex
On 05.01.2011, at 18:14, Peter Maydell wrote:
On 5 January 2011 16:59, Alexander Graf ag...@suse.de wrote:
On 02.01.2011, at 13:06, Aurelien Jarno wrote:
Use the new function float32_is_any_nan() instead of
float32_is_quiet_nan() || float32_is_signaling_nan().
Cc: Alexander Graf ag
On 02.01.2011, at 15:39, Aurelien Jarno wrote:
The current FPU code returns 0.0 if one of the operand is a
signaling NaN and the VXSNAN exception is disabled.
fload_invalid_op_excp() doesn't return a qNaN in case of a VXSNAN
exception as the operand should be propagated instead of a new
On 03.01.2011, at 15:34, Aurelien Jarno wrote:
Implement the correct NaN propagation rules for ARM targets by
providing an appropriate pickNaN function.
Also fix the #ifdef tests for default NaN definition, the correct name
is TARGET_PPC instead of TARGET_POWERPC.
Cc: Alexander Graf ag
On 05.01.2011, at 19:02, Michael Roth wrote:
On 01/05/2011 09:10 AM, Andrea Arcangeli wrote:
The bug is still there so I rediffed the old patch against current
code.
On a related topic: could somebody give me advice on how to implement
a command line (command line seems enough, the other
On 05.01.2011, at 20:54, Andrea Arcangeli wrote:
Hello everyone,
On Wed, Jan 05, 2011 at 08:44:38PM +0100, Alexander Graf wrote:
On 05.01.2011, at 19:02, Michael Roth wrote:
On 01/05/2011 09:10 AM, Andrea Arcangeli wrote:
The bug is still there so I rediffed the old patch against
by a few
persons.
Cc: Alexander Graf ag...@suse.de
Cc: Andrzej Zaborowski bal...@zabor.org
Cc: Aurelien Jarno aurel...@aurel32.net
Cc: Blue Swirl blauwir...@gmail.com
Cc: Vassili Karpov (malc) av1...@comtv.ru
Signed-off-by: Aurelien Jarno aurel...@aurel32.net
---
MAINTAINERS | 52
On 07.01.2011, at 02:05, Richard Henderson wrote:
On 01/06/2011 02:45 PM, Alexander Graf wrote:
+HPPA target
+M: qemu-devel@nongnu.org
+S: Orphan
+F: tcg/hppa/
+
+i386 target
+M: qemu-devel@nongnu.org
+S: Orphan
+F: tcg/i386/
...
+S390 target
+M: Alexander Graf ag...@suse.de
+S
On 10.01.2011, at 15:00, Aurelien Jarno wrote:
On Mon, Jan 10, 2011 at 01:13:25PM +0100, Alexander Graf wrote:
On 06.01.2011, at 23:12, Aurelien Jarno wrote:
Hi,
I have just sent a tcg/arm patch concerning code retranslation. You
might want to look at the description (copied below
On 10.01.2011, at 15:15, Aurelien Jarno wrote:
On Mon, Jan 10, 2011 at 03:07:52PM +0100, Alexander Graf wrote:
On 10.01.2011, at 15:00, Aurelien Jarno wrote:
On Mon, Jan 10, 2011 at 01:13:25PM +0100, Alexander Graf wrote:
On 06.01.2011, at 23:12, Aurelien Jarno wrote:
Hi,
I have
On 10.01.2011, at 15:23, Aurelien Jarno wrote:
On Mon, Jan 10, 2011 at 03:20:40PM +0100, Alexander Graf wrote:
On 10.01.2011, at 15:15, Aurelien Jarno wrote:
On Mon, Jan 10, 2011 at 03:07:52PM +0100, Alexander Graf wrote:
On 10.01.2011, at 15:00, Aurelien Jarno wrote:
On Mon, Jan 10
On 10.01.2011, at 15:51, Edgar E. Iglesias wrote:
On Mon, Jan 10, 2011 at 03:20:40PM +0100, Alexander Graf wrote:
On 10.01.2011, at 15:15, Aurelien Jarno wrote:
On Mon, Jan 10, 2011 at 03:07:52PM +0100, Alexander Graf wrote:
On 10.01.2011, at 15:00, Aurelien Jarno wrote:
On Mon, Jan
by a few
persons.
v1 - v2:
- Changed i386 as maintained (community maintenance)
- Add Richard Henderson as the second s390 maintainer
Cc: Alexander Graf ag...@suse.de
Cc: Andrzej Zaborowski bal...@zabor.org
Cc: Aurelien Jarno aurel...@aurel32.net
Cc: Blue Swirl blauwir...@gmail.com
Cc
On 10.01.2011, at 18:34, Aurelien Jarno wrote:
Cc: Andrzej Zaborowski bal...@zabor.org
^- That email address always bounces for me. Are you sure it's still valid?
Alex
On 10.01.2011, at 18:34, Aurelien Jarno wrote:
Add a comment about cache coherency and retranslation, so that people
developping new targets based on existing ones are warned of the issue.
Cc: Alexander Graf ag...@suse.de
Cc: Edgar E. Iglesias edgar.igles...@gmail.com
Signed-off
On 11.01.2011, at 15:00, Anthony Liguori wrote:
On 01/11/2011 03:01 AM, Avi Kivity wrote:
On 01/10/2011 10:23 PM, Anthony Liguori wrote:
I don't see how ioapic, pit, or pic have a system scope.
They are not bound to any CPU like the APIC which you may have in mind.
And none of the above
On 11.01.2011, at 15:09, Anthony Liguori wrote:
On 01/11/2011 08:06 AM, Alexander Graf wrote:
On 11.01.2011, at 15:00, Anthony Liguori wrote:
On 01/11/2011 03:01 AM, Avi Kivity wrote:
On 01/10/2011 10:23 PM, Anthony Liguori wrote:
I don't see how ioapic, pit, or pic have
On 11.01.2011, at 16:12, Anthony Liguori wrote:
On 01/11/2011 08:56 AM, Avi Kivity wrote:
On 01/11/2011 04:36 PM, Anthony Liguori wrote:
They need to use the same device id then. And if they share code, that
indicates that they need to be the same device even more.
No, it really
On 13.01.2011, at 17:39, Anthony Liguori wrote:
On 01/13/2011 10:14 AM, Avi Kivity wrote:
On 01/13/2011 05:52 PM, Anthony Liguori wrote:
/* host-guest, sent before any other events */
typedef struct qemu_pvtablet_init {
uint32_t res_x; /* x axis resolution */
uint32_t res_y; /*
On 14.01.2011, at 12:27, Gerd Hoffmann wrote:
Hi,
* multitouch capabilities would be good to design in a mouse protocol
for 2011, so having say 16 x/y pairs would be better
Point. What do we need here? Finger $n down, finger $n up, finger $n moved
to $x,$y? Does it make sense to
On 14.01.2011, at 16:13, Gerd Hoffmann wrote:
Hi,
So it'd end up being (x,y,pressure) N times (I think 16 is fine for
the foreseeable future).
I'd tend to extend MOVE to (x,y,pressure,index) and send N events with the
same timestamp. Needs to send only as many events as it finds
On 14.01.2011, at 16:28, Alexander Graf wrote:
On 14.01.2011, at 16:13, Gerd Hoffmann wrote:
Hi,
So it'd end up being (x,y,pressure) N times (I think 16 is fine for
the foreseeable future).
I'd tend to extend MOVE to (x,y,pressure,index) and send N events with the
same timestamp
On 14.01.2011, at 17:31, Gerd Hoffmann wrote:
Hi,
For a simple tablet pressure and index would just be 0.
For a simple tablet pressure would be MAX and index would be 0. But yes, I
like the idea :).
0 for non-presses of course :). Sorry
Right ;)
There are three cases:
(1)
Jan Kiszka wrote:
On 2010-12-20 22:13, Alexander Graf wrote:
When not using MSI, receiving an interrupt while the interrupt line is active
pulses the interrupt line. Without this, guests don't realize that a new
interrupt occured.
This doesn't look OK. The device model should look
Jan Kiszka wrote:
On 2011-01-17 17:00, Alexander Graf wrote:
Jan Kiszka wrote:
On 2010-12-20 22:13, Alexander Graf wrote:
When not using MSI, receiving an interrupt while the interrupt line is
active
pulses the interrupt line. Without this, guests don't realize
Jan Kiszka wrote:
On 2011-01-17 17:04, Alexander Graf wrote:
Jan Kiszka wrote:
On 2011-01-17 17:00, Alexander Graf wrote:
Jan Kiszka wrote:
On 2010-12-20 22:13, Alexander Graf wrote:
When not using MSI, receiving an interrupt
Jan Kiszka wrote:
On 2011-01-17 17:33, Alexander Graf wrote:
Jan Kiszka wrote:
On 2011-01-17 17:04, Alexander Graf wrote:
Jan Kiszka wrote:
On 2011-01-17 17:00, Alexander Graf wrote:
Jan Kiszka wrote
On 18.01.2011, at 10:08, Gerd Hoffmann wrote:
Hi,
Worse might also be that unknown issue that force you to inject an IRQ
here. We don't know. That's probably worst.
Well, IIRC the issue was that usually a level high interrupt line would
simply retrigger an interrupt after enabling the
On 18.01.2011, at 13:25, Kevin Wolf wrote:
Am 20.12.2010 22:13, schrieb Alexander Graf:
The drive sends a d2h init fis on initialization. Usually, the guest doesn't
receive fises yet at that point though, so the delivery is deferred.
Let's reflect that by sending the init fis on fis
On 18.01.2011, at 13:40, Kevin Wolf wrote:
Am 20.12.2010 22:13, schrieb Alexander Graf:
Different AHCI controllers have a different number of ports, so the core
shouldn't care about the amount of ports available.
This patch makes the number of ports available to the AHCI core runtime
On 17.01.2011, at 08:48, Gerd Hoffmann wrote:
There are three cases:
(1) no pressure supported (i.e. your mouse moving around in the vnc
window and qemu reporting this as tablet coordinates).
(2) just pen/finger present/not present supported. pressure jumps
between 0 and max (and we can
On 21.01.2011, at 14:23, Hans de Goede wrote:
Hi,
On 01/20/2011 09:11 PM, David Mansfield wrote:
H
i,
On 01/20/2011 12:27 PM, Christoph Hellwig wrote:
On Wed, Jan 19, 2011 at 07:15:47PM +0100, Hans de Goede wrote:
Hi All,
As most of you know I'm working on usb redirection (making
On 21.01.2011, at 14:33, Gerd Hoffmann wrote:
Hi,
Unfortunately there has been little response to this patch set, so
I've no idea when it will get merged.
(this seems to be the story with a lot of qemu patch sets here on
the list, like Gerd's usb descriptor rehandling patches, maybe we
On 21.01.2011, at 15:33, Gerd Hoffmann wrote:
On 01/21/11 14:41, Alexander Graf wrote:
On 21.01.2011, at 14:33, Gerd Hoffmann wrote:
Hi,
Unfortunately there has been little response to this patch set,
so I've no idea when it will get merged.
(this seems to be the story with a lot
reads.
Signed-off-by: Edgar E. Iglesias edgar.igles...@gmail.com
Acked-by: Alexander Graf ag...@suse.de
Alex
On 22.01.2011, at 14:13, Aurelien Jarno wrote:
On Tue, Jan 18, 2011 at 01:58:25PM +0100, Jan Kiszka wrote:
On 2011-01-18 13:05, Alexander Graf wrote:
On 18.01.2011, at 10:08, Gerd Hoffmann wrote:
Hi,
Worse might also be that unknown issue that force you to inject an IRQ
here. We
On 22.01.2011, at 15:14, Edgar E. Iglesias wrote:
On Sat, Jan 22, 2011 at 02:13:03PM +0100, Aurelien Jarno wrote:
On Tue, Jan 18, 2011 at 01:58:25PM +0100, Jan Kiszka wrote:
On 2011-01-18 13:05, Alexander Graf wrote:
On 18.01.2011, at 10:08, Gerd Hoffmann wrote:
Hi,
Worse might also
On 23.01.2011, at 20:52, Andreas Färber wrote:
Am 23.01.2011 um 19:42 schrieb Rob Landley:
On 01/23/2011 06:59 AM, Dushyant Bansal wrote:
When I try to run this command,
# qemu-system-ppcemb -nographic -m 128 -M bamboo -kernel uImage -append
I get the following output and qemu just
On 26.01.2011, at 09:53, Edgar E. Iglesias wrote:
On Tue, Jan 25, 2011 at 02:07:15PM -0800, Richard Henderson wrote:
On 01/25/2011 08:48 AM, Edgar E. Iglesias wrote:
OK, I see. Maybe we should try to emit an insn sequence more similar
to what tcg was emitting (for the non 8 16-bit
Kevin Wolf wrote:
Am 23.12.2010 09:53, schrieb Stefan Hajnoczi:
The len and is_write arguments to cpu_physical_memory_unmap() were
swapped. This patch changes calls to use the correct argument ordering.
Signed-off-by: Stefan Hajnoczi stefa...@linux.vnet.ibm.com
---
This patch applies
Richard Henderson wrote:
On 01/26/2011 01:23 AM, Alexander Graf wrote:
agraf@toonie:/studio/s390/qemu-s390 grep deposit target-s390x/translate.c
tcg_gen_deposit_i64(regs[reg], regs[reg], tmp, 0, 32);
tcg_gen_deposit_i64(regs[reg], regs[reg], v, 0, 32);
tcg_gen_deposit_i64
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