On Wed, Jul 04, 2018 at 02:49:22PM +0200, Andrew Jones wrote:
> The ACPI PPTT table supports topology descriptions for ACPI
> guests. Note, while a DT boot Linux guest with a non-flat CPU
> topology will see socket and core IDs being sequential integers
> starting from zero, e.g.
On Thu, Jul 12, 2018 at 04:22:05PM +0200, Auger Eric wrote:
> Hi Igor,
>
> On 07/11/2018 03:17 PM, Igor Mammedov wrote:
> > On Thu, 5 Jul 2018 16:27:05 +0200
> > Auger Eric wrote:
> >
> >> Hi Shameer,
> >>
> >> On 07/05/2018 03:19 PM, Shameerali Kolothum Thodi wrote:
> >>>
> -Origina
On Thu, Jul 12, 2018 at 04:53:01PM +0200, Auger Eric wrote:
> Hi Drew,
>
> On 07/12/2018 04:45 PM, Andrew Jones wrote:
> > On Thu, Jul 12, 2018 at 04:22:05PM +0200, Auger Eric wrote:
> >> Hi Igor,
> >>
> >> On 07/11/2018 03:17 PM, Igor Mammedov wrot
o program or read relative timeouts.
>
> Add accessors for the TVAL register, to be able to read and write them
> easily later.
>
> Signed-off-by: Andre Przywara
> ---
> arm/timer.c | 26 ++
> 1 file changed, 26 insertions(+)
>
Reviewed-by: Andrew Jones
er tests are run with a 2 second timeout on the host side, so
> that any failure in coming back would be covered.
>
> Signed-off-by: Andre Przywara
> ---
> arm/timer.c | 10 ++
> 1 file changed, 10 insertions(+)
>
Reviewed-by: Andrew Jones
On Mon, Apr 23, 2018 at 02:11:40PM +0100, Peter Maydell wrote:
> On 23 April 2018 at 06:18, Jan Kiszka wrote:
> > From: Jan Kiszka
> >
> > This allows to pin the host controller in the Linux PCI domain space.
> > Linux requires that property to be available consistently or not at all,
> > in whic
On Tue, Apr 24, 2018 at 04:12:58PM +0200, Andrew Jones wrote:
> On Mon, Apr 23, 2018 at 02:11:40PM +0100, Peter Maydell wrote:
> > On 23 April 2018 at 06:18, Jan Kiszka wrote:
> > > From: Jan Kiszka
> > >
> > > This allows to pin the host controller in the
On Thu, Apr 19, 2018 at 09:06:30AM +, Shameerali Kolothum Thodi wrote:
> > From: Andrew Jones [mailto:drjo...@redhat.com]
> > Instead of using memory region aliases, it would be best if each RAM
> > region was modeled with pc-dimms, as that would move us towards supporting
and info. Then we
don't need to make arm_boot_address_space() global, as we'd just call
it from arm_load_dtb(). Actually even 'cpu' is debatable, because it
should probably always be first_cpu, so we could just use that in
arm_load_dtb() as well.
> +exit(1);
> +}
>
> virt_acpi_setup(vms);
> virt_build_smbios(vms);
> @@ -1394,8 +1395,7 @@ static void machvirt_init(MachineState *machine)
> vms->fw_cfg = create_fw_cfg(vms, &address_space_memory);
> rom_set_fw(vms->fw_cfg);
>
> -vms->machine_done.notify = virt_machine_done;
> -qemu_add_machine_init_done_notifier(&vms->machine_done);
> +create_platform_bus(vms, pic);
>
> vms->bootinfo.ram_size = machine->ram_size;
> vms->bootinfo.kernel_filename = machine->kernel_filename;
> @@ -1405,16 +1405,12 @@ static void machvirt_init(MachineState *machine)
> vms->bootinfo.board_id = -1;
> vms->bootinfo.loader_start = vms->memmap[VIRT_MEM].base;
> vms->bootinfo.get_dtb = machvirt_dtb;
> +vms->bootinfo.skip_dtb_autoload = true;
> vms->bootinfo.firmware_loaded = firmware_loaded;
> arm_load_kernel(ARM_CPU(first_cpu), &vms->bootinfo);
>
> -/*
> - * arm_load_kernel machine init done notifier registration must
> - * happen before the platform_bus_create call. In this latter,
> - * another notifier is registered which adds platform bus nodes.
> - * Notifiers are executed in registration reverse order.
> - */
> -create_platform_bus(vms, pic);
> +vms->machine_done.notify = virt_machine_done;
> +qemu_add_machine_init_done_notifier(&vms->machine_done);
> }
>
> static bool virt_get_secure(Object *obj, Error **errp)
> --
> 2.7.4
>
>
Nice cleanup, particularly regarding the platform bus fdt node parameter
passing. The review would be a bit easier if we did the conversion without
deletion in one patch and deletion in a second patch, but then compiling
would complain about unused code and with warnings treated as errors that
would break bisection, so I guess the reviewers just have to work harder.
Besides the nits and ensuring dtb_limit=0 when it should be,
Reviewed-by: Andrew Jones
On Wed, May 16, 2018 at 04:20:22PM +0100, Shameer Kolothum wrote:
> Register ram_memory_region_init notifier to allocate memory region
> from system memory.
>
> Signed-off-by: Zhu Yijun
> Signed-off-by: Shameer Kolothum
> ---
> hw/arm/virt.c | 28 ++--
> include/
On Wed, May 16, 2018 at 04:20:25PM +0100, Shameer Kolothum wrote:
> This is in preparation for the next patch where initial ram is split
> into a non-pluggable chunk and a pc-dimm modeled mem if the vaild
> iova regions are non-contiguous.
>
> Signed-off-by: Shameer Kolothum
> ---
> hw/arm/virt
On Wed, Jul 25, 2018 at 11:20:03AM +0200, Ard Biesheuvel wrote:
> On 25 July 2018 at 11:17, Hongbo Zhang wrote:
> > On 25 July 2018 at 17:13, Ard Biesheuvel wrote:
> >> On 25 July 2018 at 11:09, Hongbo Zhang wrote:
> >>> On 25 July 2018 at 17:01, Ard Biesheuvel
> >>> wrote:
> On 25 July 2
On Wed, Jul 25, 2018 at 01:30:52PM +0800, Hongbo Zhang wrote:
> For the Aarch64, there is one machine 'virt', it is primarily meant to
> run on KVM and execute virtualization workloads, but we need an
> environment as faithful as possible to physical hardware, for supporting
> firmware and OS devel
On Wed, Jul 25, 2018 at 11:47:39AM +0200, Ard Biesheuvel wrote:
> On 25 July 2018 at 11:40, Andrew Jones wrote:
> > On Wed, Jul 25, 2018 at 11:20:03AM +0200, Ard Biesheuvel wrote:
> >> On 25 July 2018 at 11:17, Hongbo Zhang wrote:
> >> > On 25 July 2018 at 17:13,
On Wed, Jul 25, 2018 at 06:33:01PM +0800, Hongbo Zhang wrote:
> On 25 July 2018 at 17:40, Andrew Jones wrote:
> > On Wed, Jul 25, 2018 at 11:20:03AM +0200, Ard Biesheuvel wrote:
> >> On 25 July 2018 at 11:17, Hongbo Zhang wrote:
> >> > On 25 July 2018 at 17:13,
On Wed, Jul 25, 2018 at 06:22:17PM +0800, Hongbo Zhang wrote:
> On 25 July 2018 at 17:54, Andrew Jones wrote:
> > On Wed, Jul 25, 2018 at 01:30:52PM +0800, Hongbo Zhang wrote:
> >> For the Aarch64, there is one machine 'virt', it is primarily meant to
> >>
On Wed, Jul 25, 2018 at 11:50:41AM +0100, Dr. David Alan Gilbert wrote:
> * Andrew Jones (drjo...@redhat.com) wrote:
> > On Wed, Jul 25, 2018 at 01:30:52PM +0800, Hongbo Zhang wrote:
> > > For the Aarch64, there is one machine 'virt', it is primarily meant to
On Wed, Jul 25, 2018 at 06:46:59PM +0800, Hongbo Zhang wrote:
> On 25 July 2018 at 17:54, Andrew Jones wrote:
> > On Wed, Jul 25, 2018 at 01:30:52PM +0800, Hongbo Zhang wrote:
> >> For the Aarch64, there is one machine 'virt', it is primarily meant to
> >>
On Wed, Jul 25, 2018 at 11:40:54AM +0100, Marc Zyngier wrote:
> On 24/07/18 19:35, Maran Wilson wrote:
> > It's been a few months since this email thread died off. Has anyone
> > started working on a potential solution that would allow VCPU hotplug on
> > KVM/ARM ? Or is this a project that is st
On Wed, Jul 25, 2018 at 02:29:09PM +0200, Ard Biesheuvel wrote:
> To prevent spending a disproportionate amount of time on inventing
> ways to parameterize these 'models', which includes interfaces not
> only between UEFI and QEMU but also between ARM-TF and QEMU (and
> potentially between UEFI and
On Wed, Jul 25, 2018 at 01:47:00PM +0100, Daniel P. Berrangé wrote:
> Would iut make any sense to call the machine "refplatform" or "refboard"
> to indicate it is a generic reference platform, not specifically following
> any particular real impl, albeit influence by the sbsa spec.
>
That would
On Wed, Jul 25, 2018 at 03:03:40PM +0200, Ard Biesheuvel wrote:
> On 25 July 2018 at 14:59, Andrew Jones wrote:
> > On Wed, Jul 25, 2018 at 01:47:00PM +0100, Daniel P. Berrangé wrote:
> >> Would iut make any sense to call the machine "refplatform" or "refboard&
On Wed, Jul 25, 2018 at 03:46:01PM +0200, Ard Biesheuvel wrote:
> On 25 July 2018 at 15:38, Andrew Jones wrote:
> > On Wed, Jul 25, 2018 at 03:03:40PM +0200, Ard Biesheuvel wrote:
> >> On 25 July 2018 at 14:59, Andrew Jones wrote:
> >> > On Wed, Jul 25, 2018
On Thu, Jul 26, 2018 at 05:22:14PM +0800, Hongbo Zhang wrote:
> On 25 July 2018 at 19:26, Andrew Jones wrote:
> > On Wed, Jul 25, 2018 at 06:22:17PM +0800, Hongbo Zhang wrote:
> >> On 25 July 2018 at 17:54, Andrew Jones wrote:
> >> > On Wed, Jul 25, 2018 at 01:30:
On Thu, Jul 26, 2018 at 05:46:23PM +0800, Hongbo Zhang wrote:
> On 25 July 2018 at 22:08, Andrew Jones wrote:
> > On Wed, Jul 25, 2018 at 03:46:01PM +0200, Ard Biesheuvel wrote:
> >> On 25 July 2018 at 15:38, Andrew Jones wrote:
> >> > On Wed, Jul 25, 2018 at 03
On Thu, Jul 26, 2018 at 06:17:36PM +0800, Hongbo Zhang wrote:
> On 25 July 2018 at 19:44, Andrew Jones wrote:
> > On Wed, Jul 25, 2018 at 06:46:59PM +0800, Hongbo Zhang wrote:
> >> On 25 July 2018 at 17:54, Andrew Jones wrote:
> >> > On Wed, Jul 25, 2018 at 01:30:
On Thu, Jul 26, 2018 at 05:55:54PM +0800, Hongbo Zhang wrote:
> On 26 July 2018 at 00:15, Igor Mammedov wrote:
> > On Wed, 25 Jul 2018 13:36:45 +0200
> > Andrew Jones wrote:
> >
> >> On Wed, Jul 25, 2018 at 11:50:41AM +0100, Dr. David Alan Gilbert wrote:
> >&g
On Thu, Jul 26, 2018 at 12:35:08PM +0200, Ard Biesheuvel wrote:
> On 26 July 2018 at 12:28, Andrew Jones wrote:
> > On Thu, Jul 26, 2018 at 05:22:14PM +0800, Hongbo Zhang wrote:
> >> On 25 July 2018 at 19:26, Andrew Jones wrote:
> >> > On Wed, Jul 25, 2018 at 06:22:
On Thu, Jul 26, 2018 at 12:56:22PM +0200, Ard Biesheuvel wrote:
> On 26 July 2018 at 12:52, Peter Maydell wrote:
> > On 26 July 2018 at 11:46, Andrew Jones wrote:
> >> i440fx and q35 are specific machine types. 'sbsa' is a generic machine
> >> type that confo
On Thu, Jul 26, 2018 at 01:15:15PM +0200, Ard Biesheuvel wrote:
> That may be true. But we'll still end up with a UEFI build that has
> OVMF virtio bus drivers and device drivers included, blurring the line
> between emulation and virtualization.
The UEFI build can drop the virtio-mmio support, an
On Thu, Jul 26, 2018 at 01:10:34PM +0100, Peter Maydell wrote:
> On 26 July 2018 at 12:41, Andrew Jones wrote:
> > The patch guards the generation. It'll only modify DT and ACPI for the
> > new machine type. But, while modifying the DT makes sense, as that
> > gene
On Fri, Aug 03, 2018 at 11:26:41AM +0200, Ard Biesheuvel wrote:
> On 3 August 2018 at 11:23, Peter Maydell wrote:
> > On 3 August 2018 at 10:21, Hongbo Zhang wrote:
> >> The 'sbsa' machine won't consume QEMU generated ACPI, so it won't
> >> touch or add new ACPI tables.
> >>
> >> UEFI relies on i
>
> Signed-off-by: Andre Przywara
> ---
> lib/arm/io.c | 1 +
> lib/libcflat.h | 7 ---
> lib/powerpc/io.c | 1 +
> lib/x86/io.c | 1 +
> 4 files changed, 7 insertions(+), 3 deletions(-)
>
Reviewed-by: Andrew Jones
chine gic-version=2 -append 'mmio'
> +groups = gic
> +
> +[gicv2-mmio-3p]
> +file = gic.flat
> +smp = $((($MAX_SMP < 3)?$MAX_SMP:3))
If MAX_SMP is less than 3, then we'll still run the test with
whatever it is, possibly 1, which probably isn't want the test
intends
implemented IRQ limit are actually
> read-as-zero/write-ignore.
>
> Signed-off-by: Andre Przywara
> ---
> arm/gic.c | 79
> +++
> 1 file changed, 79 insertions(+)
>
Reviewed-by: Andrew Jones
On Fri, Jul 20, 2018 at 04:39:41PM +0100, Andre Przywara wrote:
> Some tests for the IPRIORITY registers. The significant number of bits
> is IMPLEMENTATION DEFINED, but should be the same for every IRQ.
> Also these registers must be byte-accessible.
> Check that accesses beyond the implemented IR
s-zero/write-ignore.
>
> Signed-off-by: Andre Przywara
> ---
> arm/gic.c | 43 +++
> lib/arm/asm/gic.h | 1 +
> 2 files changed, 44 insertions(+)
>
Reviewed-by: Andrew Jones
On Fri, Aug 03, 2018 at 03:44:21PM +0200, Laszlo Ersek wrote:
> Hi Drew,
>
> On 08/03/18 11:37, Andrew Jones wrote:
> > On Fri, Aug 03, 2018 at 11:26:41AM +0200, Ard Biesheuvel wrote:
> >> On 3 August 2018 at 11:23, Peter Maydell
> >> wrote:
> >>
On Thu, Jun 28, 2018 at 04:11:56PM +0800, Hongbo Zhang wrote:
> On 27 June 2018 at 22:56, Igor Mammedov wrote:
> > On Wed, 27 Jun 2018 18:13:08 +0800
> > Hongbo Zhang wrote:
> >
> >> This patch introduces a new Arm machine type 'SBSA' with features:
> >> - Based on legacy 'virt' machine type.
>
On Thu, Jun 28, 2018 at 06:13:28PM +0800, Hongbo Zhang wrote:
> On 28 June 2018 at 17:04, Andrew Jones wrote:
> > On Thu, Jun 28, 2018 at 04:11:56PM +0800, Hongbo Zhang wrote:
> >> On 27 June 2018 at 22:56, Igor Mammedov wrote:
> >> > On Wed, 27 Jun 2018 18:13:08 +0
On Wed, Jun 20, 2018 at 03:07:32PM +0200, Eric Auger wrote:
> The kvm-type property currently is used to pass
> a user parameter to KVM_CREATE_VM. This matches
> the way KVM/ARM expects to pass the max_vm_phys_shift
> parameter.
>
> This patch adds the support or the kvm-type property in
> machvir
On Tue, Jul 03, 2018 at 02:31:02PM +0200, Auger Eric wrote:
> Hi Drew,
>
> On 07/03/2018 01:55 PM, Andrew Jones wrote:
> > On Wed, Jun 20, 2018 at 03:07:32PM +0200, Eric Auger wrote:
> >> The kvm-type property currently is used to pass
> >> a user parameter to KVM
On Mon, Jul 23, 2018 at 02:42:54PM +0200, Igor Mammedov wrote:
> On Wed, 4 Jul 2018 14:49:19 +0200
> Andrew Jones wrote:
>
> > qemu_fdt_add_path works like qemu_fdt_add_subnode, except it
> > also recursively adds any missing parent nodes.
>
> Probably add here
rdist region index and count */
> +uint64_t addr_ormask =
> +i | ((uint64_t)s->redist_region_count[i] << 52);
> +
> +kvm_arm_register_device(&s->iomem_redist[i], -1,
> +KVM_DEV_ARM_VGIC_GRP_ADDR,
> +KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION,
> +s->dev_fd, addr_ormask);
> +}
> +}
>
> if (kvm_has_gsi_routing()) {
> /* set up irq routing */
> --
> 2.5.5
>
Reviewed-by: Andrew Jones
+-
> hw/intc/arm_gicv3.c| 12 +++-
> hw/intc/arm_gicv3_common.c | 38
> +-
> hw/intc/arm_gicv3_kvm.c| 9 +++--
> include/hw/intc/arm_gicv3_common.h | 8 ++--
> 5 files changed, 67 insertions(+), 11 deletions(-)
>
Reviewed-by: Andrew Jones
On Tue, Jun 05, 2018 at 07:49:44AM +, Shameerali Kolothum Thodi wrote:
> > > On 05/16/2018 05:20 PM, Shameer Kolothum wrote:
> > > > In case valid iova regions are non-contiguous, split the
> > > > RAM mem into a 1GB non-pluggable dimm and remaining as a
> > > > single pc-dimm mem.
> > >
> > >
,
> +VIRT_GIC_REDIST2,
> VIRT_SMMU,
> VIRT_UART,
> VIRT_MMIO,
> @@ -130,4 +133,15 @@ typedef struct {
>
> void virt_acpi_setup(VirtMachineState *vms);
>
> +/* Return the number of used redistributor regions */
> +static inline int virt_gicv3_redist_region_count(VirtMachineState *vms)
> +{
> +uint32_t redist0_capacity =
> +vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST_SIZE;
> +
> +assert(vms->gic_version == 3);
> +
> +return vms->smp_cpus > redist0_capacity ? 2 : 1;
Another place that would need to be patched if we ever add a third region.
> +}
> +
> #endif /* QEMU_ARM_VIRT_H */
> --
> 2.5.5
>
>
Besides feeling like we should write code that supports > 1 region,
vs. exactly 1 or 2 and the ULL nit, looks good to me
Reviewed-by: Andrew Jones
On Wed, Jun 13, 2018 at 10:48:37AM +0200, Eric Auger wrote:
> To prepare for multiple redistributor regions, we introduce
> an array of uint32_t properties that stores the redistributor
> count of each redistributor region.
>
> Non accelerated VGICv3 only supports a single redistributor region.
>
On Wed, Jun 13, 2018 at 10:48:38AM +0200, Eric Auger wrote:
> Let's check if KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION is supported.
> If not, we check the number of redist region is equal to 1 and use the
> legacy KVM_VGIC_V3_ADDR_TYPE_REDIST attribute. Otherwise we use
> the new attribute and allow to
> +gicr->range_length = cpu_to_le32(memmap[VIRT_GIC_REDIST2].size);
> +}
> +
> if (its_class_name() && !vmc->no_its) {
> gic_its = acpi_data_push(table_data, sizeof *gic_its);
> gic_its->type = ACPI_APIC_GENERIC_TRANSLATOR;
> --
> 2.5.5
>
>
Reviewed-by: Andrew Jones
virt_init(MachineState *machine)
> */
> if (vms->gic_version == 3) {
> virt_max_cpus = vms->memmap[VIRT_GIC_REDIST].size /
> GICV3_REDIST_SIZE;
> +virt_max_cpus += vms->memmap[VIRT_GIC_REDIST2].size /
> GICV3_REDIST_SIZE;
> } else {
> virt_max_cpus = GIC_NCPU;
> }
> --
> 2.5.5
>
>
Reviewed-by: Andrew Jones
ecam_alias = g_new0(MemoryRegion, 1);
> ecam_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
> index 308156f..2c18a59 100644
> --- a/include/hw/arm/virt.h
> +++ b/include/hw/arm/virt.h
> @@ -72,6 +72,7 @@ enum {
> VIRT_PCIE_MMIO,
> VIRT_PCIE_PIO,
> VIRT_PCIE_ECAM,
> +VIRT_PCIE_ECAM_HIGH,
> VIRT_PLATFORM_BUS,
> VIRT_PCIE_MMIO_HIGH,
> VIRT_GPIO,
> @@ -106,6 +107,7 @@ typedef struct {
> FWCfgState *fw_cfg;
> bool secure;
> bool highmem;
> +bool highmem_ecam;
> bool its;
> bool virt;
> int32_t gic_version;
> --
> 2.5.5
>
>
Reviewed-by: Andrew Jones
On Thu, Jun 14, 2018 at 03:55:56PM +0200, Auger Eric wrote:
> Hi Drew,
>
> On 06/14/2018 03:32 PM, Andrew Jones wrote:
> > On Wed, Jun 13, 2018 at 10:48:37AM +0200, Eric Auger wrote:
> >> To prepare for multiple redistributor regions, we introduce
> >> an array o
On Thu, Jun 14, 2018 at 03:48:52PM +0200, Auger Eric wrote:
> Hi Drew,
>
> On 06/14/2018 03:39 PM, Andrew Jones wrote:
> > On Wed, Jun 13, 2018 at 10:48:38AM +0200, Eric Auger wrote:
> >> Let's check if KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION is supported.
> >>
ptions(mc);
> SET_MACHINE_COMPAT(mc, VIRT_COMPAT_2_12);
> +vmc->no_highmem_ecam = true;
> +mc->max_cpus = 255;
> }
> -DEFINE_VIRT_MACHINE_AS_LATEST(2, 12)
> +DEFINE_VIRT_MACHINE(2, 12)
>
> #define VIRT_COMPAT_2_11 \
> HW_COMPAT_2_11
> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
> index 2c18a59..8c74d4c 100644
> --- a/include/hw/arm/virt.h
> +++ b/include/hw/arm/virt.h
> @@ -98,6 +98,7 @@ typedef struct {
> bool no_pmu;
> bool claim_edge_triggered_timers;
> bool smbios_old_sys_ver;
> +bool no_highmem_ecam;
> } VirtMachineClass;
>
> typedef struct {
> --
> 2.5.5
>
>
Otherwise
Reviewed-by: Andrew Jones
On Sun, Jul 09, 2017 at 11:02:17PM +0200, Eric Auger wrote:
> From: Pranavkumar Sawargaonkar
>
> To implement INTx to gsi routing we need to pass the gpex host
> bridge the gsi associated to each INTx index. Let's introduce
> irq_num array and gpex_set_irq_num setter function.
>
> Signed-off-by:
+ i]);
> +gpex_set_irq_num(s, i, irq + i);
nit: don't need the 's' variable for the one use, just do
gpex_set_irq_num(GPEX_HOST(dev), ...)
> }
>
> pci = PCI_HOST_BRIDGE(dev);
> --
> 2.5.5
>
>
Otherwise
Reviewed-by: Andrew Jones
ci->bus, gpex_route_intx_pin_to_irq);
> qdev_init_nofail(DEVICE(&s->gpex_root));
> }
>
> --
> 2.5.5
>
>
Wouldn't need the cast if irq_num was an array of ints, but otherwise
Reviewed-by: Andrew Jones
pci-host/gpex.h
> @@ -51,6 +51,9 @@ typedef struct GPEXHost {
> MemoryRegion io_ioport;
> MemoryRegion io_mmio;
> qemu_irq irq[GPEX_NUM_IRQS];
> +int irq_num[GPEX_NUM_IRQS];
> } GPEXHost;
>
> +int gpex_set_irq_num(GPEXHost *s, int index, int gsi);
> +
> #endif /* HW_GPEX_H */
> --
> 2.5.5
>
Reviewed-by: Andrew Jones
On Fri, Dec 09, 2016 at 11:41:06AM +, Andre Przywara wrote:
> Hi,
>
> On 08/12/16 17:50, Andrew Jones wrote:
> > Allow a thread to wait some specified amount of time. Can
> > specify in cycles, usecs, and msecs.
> >
> > Signed-off-by: Andrew Jones
> >
Signed-off-by: Andrew Jones
---
hw/intc/arm_gicv3_common.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c
index 0f8c4b86e023..0aa9b9ca6655 100644
--- a/hw/intc/arm_gicv3_common.c
+++ b/hw/intc/arm_gicv3_common.c
On Fri, Dec 09, 2016 at 04:08:00PM +, Andre Przywara wrote:
> On 08/12/16 17:50, Andrew Jones wrote:
> > +u32 gicv3_iar_irqnr(u32 iar)
> > +{
> > + return iar;
>
> I am probably a bit paranoid here, but the spec says that the interrupt
> ID is in bits[23:0] onl
On Sun, Dec 11, 2016 at 10:52:25PM +, Peter Maydell wrote:
> On 11 December 2016 at 16:35, Christoffer Dall
> wrote:
> > On Fri, Dec 09, 2016 at 04:30:20PM +, Peter Maydell wrote:
> >> + * For backwards-compatibility, virt-2.8 and earlier will continue
> >> + * to say these are edg
On Fri, Dec 09, 2016 at 04:30:17PM +, Peter Maydell wrote:
> Signed-off-by: Peter Maydell
> ---
> include/hw/compat.h | 3 +++
> hw/arm/virt.c | 19 +--
> 2 files changed, 20 insertions(+), 2 deletions(-)
Reviewed-by: Andrew Jones
>
> di
On Fri, Dec 09, 2016 at 04:30:19PM +, Peter Maydell wrote:
> Rename all the variables which used to be VirtBoardInfo*
> and are now VirtMachineState* so their names are in line
> with the type being used.
>
> Apart from the removal of the line 'VirtMachineState *vbi = vms;'
> this commit is pu
+++-----
> 1 file changed, 51 insertions(+), 67 deletions(-)
Reviewed-by: Andrew Jones
>
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index 11c53a5..fd4eed9 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -66,23 +
> 1 file changed, 30 insertions(+), 4 deletions(-)
Reviewed-by: Andrew Jones
I'll submit the ACPI counterpart, which would require we add
claim_edge_triggered_timers to VirtGuestInfo, but I have plans
for VirtGuestInfo - killing it, just like x86 killed PcGuestInfo.
So the need fo
On Mon, Dec 12, 2016 at 12:48:14PM +, Peter Maydell wrote:
> On 2 November 2016 at 13:59, Andrew Jones wrote:
> > On Tue, Nov 01, 2016 at 05:16:59PM +, Peter Maydell wrote:
> >> (2) directly user-set cpu property, or board property ?
> >
> > So this is why
On Tue, Dec 13, 2016 at 10:36:01AM +, Peter Maydell wrote:
> This patchset adds support for the Virtualization extensions to QEMU's
> GICv3 emulation. This was the last missing piece that was stopping
> us from turning on the EL2 support in the CPU model, so the patchset
> also adds support for
-by: Andrew Jones
---
hw/arm/virt.c | 35 +--
1 file changed, 17 insertions(+), 18 deletions(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index d451bc4f6b9b..67c0abb30b5b 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -319,7 +319,7 @@ static void
sed kernel.
Patches available here
https://github.com/rhdrjones/qemu/commits/virt/remove-guest-info
Andrew Jones (11):
hw/arm/virt: parameter passing cleanups
hw/arm/virt: use VirtMachineState.gic_version
hw/arm/virt: use VirtMachineState.smp_cpus
hw/arm/virt: eliminate struct VirtGuestInf
Some simple cleanups made possible by "hw/arm/virt: Merge
VirtBoardInfo and VirtMachineState"
Signed-off-by: Andrew Jones
---
hw/arm/virt.c | 19 +--
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 7eec50a82494..d4
Most places we need smp_cpus we use vms->smp_cpus already. This
cleanup makes sure we do everywhere, preparing for the removal
of the global smp_cpus someday.
Signed-off-by: Andrew Jones
---
hw/arm/virt.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/hw/
Instead of allocating a new struct just for VirtGuestInfo and the
machine_done Notifier, place them inside VirtMachineState. This
is the mach-virt equivalent of "pc: Eliminate struct
PcGuestInfoState"
Suggested-by: Eduardo Habkost
Signed-off-by: Andrew Jones
---
hw/
Only two functions take VirtGuestInfo parameters. Now that guest-info
is part of VirtMachineState, and VirtMachineState is defined in the
virt header, pass that instead.
Signed-off-by: Andrew Jones
---
hw/arm/virt-acpi-build.c | 3 ++-
hw/arm/virt.c| 8
include/hw/arm
In preparation to share more Virt machine state than just guest-info
with other mach-virt source files, move the State and Class structures
to virt.h
Signed-off-by: Andrew Jones
---
hw/arm/virt.c | 51 +++
include/hw/arm/virt.h | 39
include/hw/arm/virt-acpi-build.h is only used for VirtGuestInfo,
which doesn't even necessarily have to be ACPI specific. Move
VirtGuestInfo to include/hw/arm/virt.h, allowing us to remove
include/hw/arm/virt-acpi-build.h, and to prepare for even more
code motion.
Signed-off-by: Andrew
We can get to VirtMachineState without the need for saving a pointer
on AcpiBuildState. This is the mach-virt equivalent to "acpi: Don't save
PcGuestInfo on AcpiBuildState"
Signed-off-by: Andrew Jones
---
hw/arm/virt-acpi-build.c | 7 +++
1 file changed, 3 insertions(
Now that we pass VirtMachineState, and guest-info is just part of
that state, we can remove all the redundant members and access
the VirtMachineState directly.
Signed-off-by: Andrew Jones
---
hw/arm/virt-acpi-build.c | 72 +---
hw/arm/virt.c
This is the ACPI equivalent to "hw/arm/virt: Don't incorrectly claim
architectural timer to be edge-triggered" which fixes the DT for
machine types 2.9 and later.
Signed-off-by: Andrew Jones
---
hw/arm/virt-acpi-build.c | 18 --
1 file changed, 12 insertions(
by moving VirtGuestInfo.fw_cfg to VirtMachineState. This is the
mach-virt equivalent of "pc: Move PcGuestInfo.fw_cfg to
PCMachineState" and "pc: Eliminate PcGuestInfo struct" combined.
Signed-off-by: Andrew Jones
---
hw/arm/virt-acpi-build.c | 7 +++
hw/arm/vi
On Thu, Dec 08, 2016 at 06:50:20PM +0100, Andrew Jones wrote:
>
> v8:
> - Main change is rebasing to Wei's sysreg framework, which is part
>of his PMU series, which I've applied to arm/next. That rebase
>leads to dropping the first two patches of the v7 series,
On Thu, Dec 15, 2016 at 11:37:06AM +0100, Igor Mammedov wrote:
> On Tue, 13 Dec 2016 22:45:14 +0100
> Andrew Jones wrote:
>
> > Most places we need smp_cpus we use vms->smp_cpus already. This
> > cleanup makes sure we do everywhere, preparing for the removal
> >
On Thu, Dec 15, 2016 at 03:45:55PM +0100, Igor Mammedov wrote:
> On Tue, 13 Dec 2016 22:45:18 +0100
> Andrew Jones wrote:
>
> > Only two functions take VirtGuestInfo parameters. Now that guest-info
> > is part of VirtMachineState, and VirtMachineState is defined in the
>
On Thu, Dec 15, 2016 at 03:59:35PM +0100, Igor Mammedov wrote:
> On Tue, 13 Dec 2016 22:45:21 +0100
> Andrew Jones wrote:
>
> > by moving VirtGuestInfo.fw_cfg to VirtMachineState. This is the
> > mach-virt equivalent of "pc: Move PcGuestInfo.fw_cfg to
> > PC
On Thu, Dec 15, 2016 at 04:08:22PM +0100, Igor Mammedov wrote:
> On Tue, 13 Dec 2016 22:45:20 +0100
> Andrew Jones wrote:
>
> > We can get to VirtMachineState without the need for saving a pointer
> > on AcpiBuildState. This is the mach-virt equivalent to "acpi: Don
On Tue, Dec 13, 2016 at 10:36:01AM +, Peter Maydell wrote:
> This patchset adds support for the Virtualization extensions to QEMU's
> GICv3 emulation. This was the last missing piece that was stopping
> us from turning on the EL2 support in the CPU model, so the patchset
> also adds support for
On Tue, Dec 13, 2016 at 10:36:02AM +, Peter Maydell wrote:
> We already log exception entry; add logging of the AArch64 exception
> return path as well.
>
> Signed-off-by: Peter Maydell
> Reviewed-by: Edgar E. Iglesias
> ---
> target-arm/op_helper.c | 9 +
> 1 file changed, 9 insert
s;'
> this commit is purely a search-and-replace of 'vbi' with 'vms'.
>
> Signed-off-by: Peter Maydell
> ---
> hw/arm/virt.c | 489
> +-
> 1 file changed, 244 insertions(+), 245 deletions(-)
>
Reviewed-by: Andrew Jones
Alex,
Are you happy with v8? If so, then, as far as I'm concerned, this
series is ready. I'd like to try driving the edu device from ARM
tests too.
Thanks,
drew
On Mon, Dec 12, 2016 at 11:08:06AM +0800, Peter Xu wrote:
> This is v8 of vt-d unit test series.
>
> (CC qemu-devel list this time.)
On Tue, Dec 27, 2016 at 10:27:25AM -0500, Christopher Covington wrote:
> On 12/09/2016 07:15 AM, Andrew Jones wrote:
> > On Fri, Dec 09, 2016 at 11:41:06AM +, Andre Przywara wrote:
> >> Hi,
> >>
> >> On 08/12/16 17:50, Andrew Jones wrote:
> >>>
get-arm/cpu.h | 2 ++
> hw/arm/virt.c| 4
> hw/arm/xlnx-zynqmp.c | 2 ++
> target-arm/cpu.c | 12
> target-arm/cpu64.c | 2 ++
> 5 files changed, 22 insertions(+)
>
Reviewed-by: Andrew Jones
e of HVC.
>
> Signed-off-by: Peter Maydell
> ---
> hw/arm/virt.c | 29 ++---
> 1 file changed, 22 insertions(+), 7 deletions(-)
>
Reviewed-by: Andrew Jones
d report the
> virtualization support in the GICv3 device tree node.
>
> Signed-off-by: Peter Maydell
> ---
> hw/arm/virt.c | 45 +++--
> 1 file changed, 43 insertions(+), 2 deletions(-)
>
Reviewed-by: Andrew Jones
On Wed, Dec 28, 2016 at 03:24:30PM +0200, Marcel Apfelbaum wrote:
> On 12/27/2016 09:40 AM, Cao jin wrote:
> > Nit picking: Multi-function PCI Express Root Ports should mean that
> > 'addr' property is mandatory, and slot is optional because it is default
> > to 0, and 'chassis' is mandatory for 2n
On Thu, Dec 29, 2016 at 08:02:16AM -, Hansni Bu wrote:
> Public bug reported:
...
> https://bugs.launchpad.net/bugs/1653063
...
> After console prints the message below:
> "Uncompressing
> Linux..
> done, booting the
On Tue, Oct 24, 2017 at 07:57:37PM +0200, Jason A. Donenfeld wrote:
> Hey folks,
>
> In case you're curious, this is the kind of hideous workaround
> required until this is fixed:
>
> https://git.zx2c4.com/WireGuard/commit/?id=2456a56729f7247bf88476317fed0ac822a31e92
>
> Please let me know if yo
RY_POINT_30);
> +mc->name, false, true, SMBIOS_ENTRY_POINT_30);
>
> smbios_get_tables(NULL, 0, &smbios_tables, &smbios_tables_len,
>&smbios_anchor, &smbios_anchor_len);
> --
> 2.7.5
>
>
Reviewed-by: Andrew Jones
On Tue, Sep 26, 2017 at 04:28:03PM +0100, Peter Maydell wrote:
> On 26 September 2017 at 11:54, Andrew Jones wrote:
> > On Fri, Sep 22, 2017 at 08:51:15AM -0500, Wei Huang wrote:
> >> Instead of using "1.0" as the system version of SMBIOS, we should use
> >>
On Thu, Sep 22, 2016 at 02:15:08PM +0800, Peter Xu wrote:
> pci-testdev is used mostly in kvm-unit-test for some eventfd tests.
> However I see it a good framework for other tests as well (e.g., the
> IOMMU unit test in the future). So enhanced it to support more
> testcases.
>
> The original memo
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