On 2/05/2014 1:31 am, Giovanni Macciocu wrote:
I've rolled back the file arm/xilinq-zynq/console/zynq-uart.c to the
version before the commit of 10 Dec. 2013.
There are a number of commits on that day. Do you mean ...
http://git.rtems.org/rtems/commit/?id=6e4255d9a5b32fcf4e665eb908a2091f327ab1
[ The first posting did not appear so I am sending it again. ]
On 2/05/2014 1:31 am, Giovanni Macciocu wrote:
I've rolled back the file arm/xilinq-zynq/console/zynq-uart.c to the
version before the commit of 10 Dec. 2013.
There are a number of commits on that day. Do you mean ...
http://git.
Hi,
This is a status report of the project during last week.
1- newlib: is ported and gcc builds successfully. The only feedback I
got when I posted the newlib patch [1] is about licence of setjmp.S
file. I contacted Damjan Lampret, the author of the file, asking him
to change the licence as Ralf
Hello Chris,
On 2014-05-01 19:53, Chris Nott wrote:
Just reviewing interrupts now. I'm not sure your question fully makes sense.
Unlike smaller embedded arms (eg. Cortex-M3), he interrupts on Cortex-A8 are
two-phase. There is an external (to the ARM core) interrupt controller that
feeds interru
Avoid the SMP_FATAL_SCHEDULER_WITHOUT_PROCESSORS fatal error and make it
a run-time error in rtems_scheduler_ident() and _Scheduler_Get_by_id().
---
cpukit/rtems/include/rtems/rtems/tasks.h |2 +
cpukit/rtems/src/schedulerident.c| 12 +++-
cpukit/score/include/rtems/s
The current implementation of task migration in RTEMS has some
implications with respect to the interrupt latency. It is crucial to
preserve the system invariant that a task can execute on at most one
processor in the system at a time. This is accomplished with a boolean
indicator in the task conte
Hello Chris,
On 2014-05-01 19:53, Chris Nott wrote:
Just reviewing interrupts now. I'm not sure your question fully makes sense.
Unlike smaller embedded arms (eg. Cortex-M3), he interrupts on Cortex-A8 are
two-phase. There is an external (to the ARM core) interrupt controller that
feeds interru
On 2/05/2014 1:17 pm, Hesham Moustafa wrote:
Hi,
This is a status report of the project during last week.
1- newlib: is ported and gcc builds successfully. The only feedback I
got when I posted the newlib patch [1] is about licence of setjmp.S
file. I contacted Damjan Lampret, the author of the
All,
Based on the replies, my question wasn't phrased precisely enough -
possibly by underestimating how different our contexts are that we're
operating in. Wouldn't be the first time!
What I was really asking was: does RTEMS expect from a BSP that interrupts
will nest? Or doesn't it matter to th
On Fri, May 2, 2014 at 10:18 AM, Ben Gras wrote:
> All,
>
> Based on the replies, my question wasn't phrased precisely enough - possibly
> by underestimating how different our contexts are that we're operating in.
> Wouldn't be the first time!
>
> What I was really asking was: does RTEMS expect fr
On 05/02/2014 06:23 PM, Gedare Bloom wrote:
On Fri, May 2, 2014 at 7:39 AM, Sebastian Huber
wrote:
>The current implementation of task migration in RTEMS has some
>implications with respect to the interrupt latency. It is crucial to
>preserve the system invariant that a task can execute on at
Chris,
I can use OpenOCD to load, run, break, resume, etc, but I am not having
luck with GDB yet.
I can connect to the OpenOCD remote target server, send monitor commands,
but I cannot load code through GDB or control the target.
When I try loading through GDB, I end up with load failure messages.
On Fri, May 2, 2014 at 12:56 PM, Sebastian Huber
wrote:
> On 05/02/2014 06:23 PM, Gedare Bloom wrote:
>>
>> On Fri, May 2, 2014 at 7:39 AM, Sebastian Huber
>> wrote:
>>>
>>> >The current implementation of task migration in RTEMS has some
>>> >implications with respect to the interrupt latency. I
On 2/05/2014 3:02 AM, Sebastian Huber wrote:
Hello Chris,
On 2014-05-01 19:53, Chris Nott wrote:
I'm not quite familiar with ARM family yet to be sure how this is
normally
accomplished or if there is an existing supported ARM with the same
interrupt
controller structure. TI provide sample
On 5/1/2014 10:17 PM, Hesham Moustafa wrote:
> Hi,
>
> This is a status report of the project during last week.
>
> 1- newlib: is ported and gcc builds successfully. The only feedback I
> got when I posted the newlib patch [1] is about licence of setjmp.S
> file. I contacted Damjan Lampret, the au
On Fri, May 2, 2014 at 10:41 AM, Chris Johns wrote:
> On 2/05/2014 1:17 pm, Hesham Moustafa wrote:
>>
>> Hi,
>>
>> This is a status report of the project during last week.
>>
>> 1- newlib: is ported and gcc builds successfully. The only feedback I
>> got when I posted the newlib patch [1] is about
On 2/05/2014 9:39 pm, Sebastian Huber wrote:
The current implementation of task migration in RTEMS has some
implications with respect to the interrupt latency. It is crucial to
preserve the system invariant that a task can execute on at most one
processor in the system at a time. This is accompli
On 3/05/2014 3:07 am, Alan Cudmore wrote:
Chris,
I can use OpenOCD to load, run, break, resume, etc, but I am not having
luck with GDB yet.
Excellent.
I can connect to the OpenOCD remote target server, send monitor
commands, but I cannot load code through GDB or control the target.
When I tr
On Fri, May 2, 2014 at 11:40 PM, Joel Sherrill
wrote:
>
> On 5/1/2014 10:17 PM, Hesham Moustafa wrote:
>> Hi,
>>
>> This is a status report of the project during last week.
>>
>> 1- newlib: is ported and gcc builds successfully. The only feedback I
>> got when I posted the newlib patch [1] is abou
On 3/05/2014 8:39 am, Hesham Moustafa wrote:
I can add configuration files to build the whole tool-chain for RTEMS.
The issue is: which repo(s) RSB should reference? Currently, the RSB
patches on my repo [1] reference/download gcc-4.8.2, newlib-2.1.0 and
binutils-2.24 releases. This way, I had to
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