On Thu, May 15, 2014 at 06:36:08PM +0200, Paolo Bonzini wrote:
> A simple way to reconcile the C code with the changes I'm making could be to
> make the relocation code associated to one particular value of APMC.
It's not hard to pass in the %cs segment to the C code - this works
(with some other
Il 15/05/2014 17:05, Kevin O'Connor ha scritto:
On Thu, May 15, 2014 at 01:22:25PM +0200, Paolo Bonzini wrote:
Hi,
these patches provide a small set of improvements and cleanups for the
current SMM code, making it more consistent with the chipset's datasheets.
QEMU does not yet implement most o
On Thu, May 15, 2014 at 01:22:25PM +0200, Paolo Bonzini wrote:
> Hi,
>
> these patches provide a small set of improvements and cleanups for the
> current SMM code, making it more consistent with the chipset's datasheets.
> QEMU does not yet implement most of the new registers used here, but it
> m
Il 15/05/2014 14:56, Don Koch ha scritto:
On Thu, 15 May 2014 13:22:27 +0200
Paolo Bonzini wrote:
This is handled already in QEMU, no need to do it in SMM.
Is it needed by coreboot?
This code doesn't run on coreboot.
Paolo
-d
Signed-off-by: Paolo Bonzini
---
src/fw/smm.c | 25 --
Il 15/05/2014 14:56, Don Koch ha scritto:
On Thu, 15 May 2014 13:22:27 +0200
Paolo Bonzini wrote:
This is handled already in QEMU, no need to do it in SMM.
Is it needed by coreboot?
CoreBoot does not run this code at all.
Paolo
-d
Signed-off-by: Paolo Bonzini
---
src/fw/smm.c | 25 -
On Do, 2014-05-15 at 08:56 -0400, Don Koch wrote:
> > This is handled already in QEMU, no need to do it in SMM.
>
> Is it needed by coreboot?
No. The smm code doesn't run at all with coreboot builds. Beside that
coreboot installs its own smm handler in case it needs one.
cheers,
Gerd
On Do, 2014-05-15 at 14:44 +0200, Paolo Bonzini wrote:
> Il 13/05/2014 17:00, Kevin O'Connor ha scritto:
> > On Tue, May 13, 2014 at 02:58:29PM +0200, Gerd Hoffmann wrote:
> >> Hi,
> >>
> >> Digged out an old patch from the mailing list, to make smm use
> >> acpi_pm1a_cnt. This allows to make th
On Thu, 15 May 2014 13:22:27 +0200
Paolo Bonzini wrote:
> This is handled already in QEMU, no need to do it in SMM.
Is it needed by coreboot?
-d
> Signed-off-by: Paolo Bonzini
> ---
> src/fw/smm.c | 25 -
> 1 file changed, 25 deletions(-)
>
> diff --git a/src/fw/smm.
Il 13/05/2014 17:00, Kevin O'Connor ha scritto:
On Tue, May 13, 2014 at 02:58:29PM +0200, Gerd Hoffmann wrote:
Hi,
Digged out an old patch from the mailing list, to make smm use
acpi_pm1a_cnt. This allows to make the acpi pmbase a variable
and figure where to place the registers at runtime.
The next patch will add shared code between the initial handler for
SMBASE relocation and the actual SMI handler. Combine the code of
the two handlers for simplicity.
Signed-off-by: Paolo Bonzini
---
src/fw/smm.c | 27 +++
1 file changed, 11 insertions(+), 16 deletions(-
SMI generation requires two bits to be set in PIIX4, one for APMC
interrupts specifically and a general one.
For Q35 it is the same, plus it is a good thing to lock SMIs after
enabling them.
Signed-off-by: Paolo Bonzini
---
src/fw/dev-piix.h | 2 ++
src/fw/dev-q35.h | 3 +++
src/fw/smm.c
Both the PIIX and ICH9 require two writes to re-enable SMIs, one for all
SMIs (EOS) and one specific to port 0xb2 SMIs (APM_STS). Configure the
values at setup time, and perform the I/O while in SMM. The variables
reside in SMRAM themselves, and are accessed with a CS segment override.
Signed-of
Move all definitions for PIIX registers to a single header file,
like there is one already for Q35, and make the naming more
consistent.
Signed-off-by: Paolo Bonzini
---
src/fw/acpi.c | 18 ++
src/fw/dev-piix.h | 27 +++
src/fw/pciinit.c | 13 +++-
This is handled already in QEMU, no need to do it in SMM.
Signed-off-by: Paolo Bonzini
---
src/fw/smm.c | 25 -
1 file changed, 25 deletions(-)
diff --git a/src/fw/smm.c b/src/fw/smm.c
index 4176e0c..07f9234 100644
--- a/src/fw/smm.c
+++ b/src/fw/smm.c
@@ -46,34 +46,9 @@
Hi,
these patches provide a small set of improvements and cleanups for the
current SMM code, making it more consistent with the chipset's datasheets.
QEMU does not yet implement most of the new registers used here, but it
might soon...
Paolo Bonzini (5):
piix: add and use dev-piix.h
smm: remo
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