On Thu, Mar 05, 2015 at 04:55:08PM +0200, Marcel Apfelbaum wrote:
> Signed-off-by: Marcel Apfelbaum
some ideas for cleaning this up.
there's more here btw.
> ---
> hw/i386/acpi-build.c | 78
>
> 1 file changed, 78 insertions(+)
>
> diff --g
On 03/08/2015 12:46 PM, Michael S. Tsirkin wrote:
On Thu, Mar 05, 2015 at 04:55:08PM +0200, Marcel Apfelbaum wrote:
Signed-off-by: Marcel Apfelbaum
some ideas for cleaning this up.
there's more here btw.
---
hw/i386/acpi-build.c | 78
Notes:
- Sorry for the late submission, I was waiting for dynamic ACPI series to get
merged
in order to submit - my bad.
- The prev version (v2) was wrongfully tagged by me as RFC, it was actually
ready but not
rebased. V3 only rebases with no actual functionality changed.
- This series
The DefLEqual op does not have a target operand. Remove it.
Signed-off-by: Marcel Apfelbaum
---
hw/acpi/aml-build.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index 876cada..0d14561 100644
--- a/hw/acpi/aml-build.c
+++ b/hw/acpi/aml-build.c
@@ -5
Add encoding for ACPI DefAdd Opcode.
Reviewed-by: Igor Mammedov
Signed-off-by: Marcel Apfelbaum
---
hw/acpi/aml-build.c | 10 ++
include/hw/acpi/aml-build.h | 1 +
2 files changed, 11 insertions(+)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index 603c0c4..be60f4e 1
Add encoding for ACPI DefOr Opcode.
Reviewed-by: Igor Mammedov
Signed-off-by: Marcel Apfelbaum
---
hw/acpi/aml-build.c | 10 ++
include/hw/acpi/aml-build.h | 1 +
2 files changed, 11 insertions(+)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index 0d14561..603c0c4 10
Add encoding for ACPI DefShiftRight Opcode.
Reviewed-by: Igor Mammedov
Signed-off-by: Marcel Apfelbaum
---
hw/acpi/aml-build.c | 10 ++
include/hw/acpi/aml-build.h | 1 +
2 files changed, 11 insertions(+)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index 497713e..09
Add encoding for ACPI DefIndex Opcode.
Signed-off-by: Marcel Apfelbaum
---
hw/acpi/aml-build.c | 13 +
include/hw/acpi/aml-build.h | 1 +
2 files changed, 14 insertions(+)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index 49ba8c1..b3372df 100644
--- a/hw/acpi/aml
Add encoding for ACPI DefLLess Opcode.
Reviewed-by: Igor Mammedov
Signed-off-by: Marcel Apfelbaum
---
hw/acpi/aml-build.c | 9 +
include/hw/acpi/aml-build.h | 1 +
2 files changed, 10 insertions(+)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index be60f4e..49ba8c1 10
From: Marcel Apfelbaum
Signed-off-by: Marcel Apfelbaum
---
hw/pci/pci.c | 8
include/hw/pci/pci_host.h | 4
2 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 53598bd..f0cf752 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@
From: Marcel Apfelbaum
Use the newer pci_bus_num to correctly get the root bus number.
Signed-off-by: Marcel Apfelbaum
---
hw/pci/pci.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index e386f2c..53598bd 100644
--- a/hw/pci/pci.c
+++ b/hw/pc
Save the IO/mem/bus numbers ranges assigned to the extra root busses
to be removed from the root bus 0 range.
Signed-off-by: Marcel Apfelbaum
---
hw/i386/acpi-build.c | 149 +++
1 file changed, 149 insertions(+)
diff --git a/hw/i386/acpi-build.c b
From: Marcel Apfelbaum
Refactoring it as a method of PCIBusClass will allow
different implementations for subclasses.
Signed-off-by: Marcel Apfelbaum
---
hw/i386/kvm/pci-assign.c | 1 +
hw/pci/pci.c | 7 ---
hw/pci/pci_bus.c | 10 ++
hw/scsi/megasas.c|
Add encoding for ACPI DefIncrement Opcode.
Reviewed-by: Igor Mammedov
Signed-off-by: Marcel Apfelbaum
---
hw/acpi/aml-build.c | 8
include/hw/acpi/aml-build.h | 1 +
2 files changed, 9 insertions(+)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index 09a543c..6315ea0
From: Marcel Apfelbaum
Instead of assuming it has only one bus, it
enumerates all the host bridges until it finds
the one with bus number corresponding with the
config register.
Signed-off-by: Marcel Apfelbaum
---
hw/pci-host/piix.c | 57 +-
From: Marcel Apfelbaum
This is a marker interface used to differentiate the
"default" host bridge on a system with multiple host bridges.
This differentiation is required only for pc machines for now
by the ACPI subsystem.
Signed-off-by: Marcel Apfelbaum
---
hw/i386/acpi-build.c | 9 +
If multiple root busses are used, root bus 0 cannot use all the
pci holes ranges. Remove the IO/mem ranges used by the other
primary busses.
Signed-off-by: Marcel Apfelbaum
---
hw/i386/acpi-build.c | 84
1 file changed, 72 insertions(+), 12 de
From: Marcel Apfelbaum
Refactoring it as a method of PCIBusClass will allow
different implementations for subclasses.
Removed the assumption that the root bus does not
have a parent device because is specific only
to the default class implementation.
Signed-off-by: Marcel Apfelbaum
---
hw/pci
Signed-off-by: Marcel Apfelbaum
---
hw/i386/acpi-build.c | 65
1 file changed, 65 insertions(+)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index e5709e8..e7a1a36 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -66
Add encoding for ACPI DefWhile Opcode.
Reviewed-by: Igor Mammedov
Signed-off-by: Marcel Apfelbaum
---
hw/acpi/aml-build.c | 8
include/hw/acpi/aml-build.h | 1 +
2 files changed, 9 insertions(+)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index 6315ea0..f85a0fb 1006
From: Marcel Apfelbaum
The bios looks for 'etc/extra-pci-roots' to decide if
is going to scan further buses after bus 0 tree.
Signed-off-by: Marcel Apfelbaum
---
hw/i386/pc.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index ae3ef0a..71d2f5b 1
The pxb can be attach to and existing numa node by specifying
numa_node option that equals the desired numa nodeid.
Signed-off-by: Marcel Apfelbaum
---
hw/i386/acpi-build.c| 12
hw/pci-bridge/pci_expander_bridge.c | 17 +
2 files changed, 29 insertion
PCI root buses can be attached to a specific NUMA node.
PCI buses are not attached be default to a NUMA node.
Signed-off-by: Marcel Apfelbaum
---
hw/pci/pci_bus.c | 7 +++
include/hw/pci/pci_bus.h | 6 ++
include/sysemu/sysemu.h | 1 +
3 files changed, 14 insertions(+)
diff --g
Add encoding for ACPI DefShiftLeft Opcode.
Reviewed-by: Igor Mammedov
Signed-off-by: Marcel Apfelbaum
---
hw/acpi/aml-build.c | 10 ++
include/hw/acpi/aml-build.h | 1 +
2 files changed, 11 insertions(+)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index b3372df..497
If the machine has several root busses, we need to add them to
acpi in order to be properly detected by guests.
Signed-off-by: Marcel Apfelbaum
---
hw/i386/acpi-build.c | 32
1 file changed, 32 insertions(+)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build
From: Marcel Apfelbaum
PXB is a "light-weight" host bridge whose purpose is to enable
the main host bridge to support multiple PCI root buses.
As oposed to PCI-2-PCI bridge's secondary bus, PXB's bus
is a primary bus and can be associated with a NUMA node
(different from the main host bridge) al
The bios does not index the pxb slot number when
it computes the IRQ because it resides on bus 0
and not on the current bus.
However Qemu routes the irq through bus 0 and adds
the pxb slot to the IRQ computation.
Synchronize between bios and Qemu by canceling
pxb's effect.
Signed-off-by: Marcel A
This refactoring moves all the code needed (recursively)
to register TYPE_PCI_BUS type to a new file hw/pci/pci_bus.c .
This allows to properly add new functionality to the pci bus class.
Signed-off-by: Marcel Apfelbaum
---
arch_init.c | 1 +
hw/alpha/typhoon.c | 1 +
hw/m
On Sun, Mar 08, 2015 at 01:04:07PM +0200, Marcel Apfelbaum wrote:
> On 03/08/2015 12:46 PM, Michael S. Tsirkin wrote:
> >On Thu, Mar 05, 2015 at 04:55:08PM +0200, Marcel Apfelbaum wrote:
> >>Signed-off-by: Marcel Apfelbaum
> >
> >some ideas for cleaning this up.
> >there's more here btw.
> >
> >>-
On 03/08/2015 04:47 PM, Michael S. Tsirkin wrote:
On Sun, Mar 08, 2015 at 01:04:07PM +0200, Marcel Apfelbaum wrote:
On 03/08/2015 12:46 PM, Michael S. Tsirkin wrote:
On Thu, Mar 05, 2015 at 04:55:08PM +0200, Marcel Apfelbaum wrote:
Signed-off-by: Marcel Apfelbaum
some ideas for cleaning thi
On Sun, Mar 08, 2015 at 05:22:43PM +0200, Marcel Apfelbaum wrote:
> On 03/08/2015 04:47 PM, Michael S. Tsirkin wrote:
> >On Sun, Mar 08, 2015 at 01:04:07PM +0200, Marcel Apfelbaum wrote:
> >>On 03/08/2015 12:46 PM, Michael S. Tsirkin wrote:
> >>>On Thu, Mar 05, 2015 at 04:55:08PM +0200, Marcel Apfe
On 03/08/2015 05:27 PM, Michael S. Tsirkin wrote:
On Sun, Mar 08, 2015 at 05:22:43PM +0200, Marcel Apfelbaum wrote:
On 03/08/2015 04:47 PM, Michael S. Tsirkin wrote:
On Sun, Mar 08, 2015 at 01:04:07PM +0200, Marcel Apfelbaum wrote:
On 03/08/2015 12:46 PM, Michael S. Tsirkin wrote:
On Thu, Mar
On Sun, Mar 08, 2015 at 05:37:25PM +0200, Marcel Apfelbaum wrote:
> On 03/08/2015 05:27 PM, Michael S. Tsirkin wrote:
> >On Sun, Mar 08, 2015 at 05:22:43PM +0200, Marcel Apfelbaum wrote:
> >>On 03/08/2015 04:47 PM, Michael S. Tsirkin wrote:
> >>>On Sun, Mar 08, 2015 at 01:04:07PM +0200, Marcel Apfe
On Sun, Mar 08, 2015 at 01:16:12PM +0200, Marcel Apfelbaum wrote:
> If the machine has several root busses, we need to add them to
> acpi in order to be properly detected by guests.
>
> Signed-off-by: Marcel Apfelbaum
> ---
> hw/i386/acpi-build.c | 32
> 1 file c
On Sun, Mar 08, 2015 at 01:16:15PM +0200, Marcel Apfelbaum wrote:
> If multiple root busses are used, root bus 0 cannot use all the
> pci holes ranges. Remove the IO/mem ranges used by the other
> primary busses.
[...]
> -aml_append(crs,
> -aml_word_io(aml_min_fixed, aml_max_fixed,
> -
On Sat, Mar 07, 2015 at 09:46:03PM +0100, Alexander Couzens wrote:
> On Sat, 7 Mar 2015 14:19:11 -0500
> Kevin O'Connor wrote:
>
> > FYI, there was a thread on this just a few weeks ago:
> >
> > http://www.seabios.org/pipermail/seabios/2015-February/008603.html
> >
> > -Kevin
>
> Thanks!
> Wha
On Sun, Mar 08, 2015 at 01:16:14PM +0200, Marcel Apfelbaum wrote:
> Save the IO/mem/bus numbers ranges assigned to the extra root busses
> to be removed from the root bus 0 range.
>
> Signed-off-by: Marcel Apfelbaum
> ---
> hw/i386/acpi-build.c | 149
> ++
On 03/08/2015 06:13 PM, Kevin O'Connor wrote:
On Sun, Mar 08, 2015 at 01:16:15PM +0200, Marcel Apfelbaum wrote:
If multiple root busses are used, root bus 0 cannot use all the
pci holes ranges. Remove the IO/mem ranges used by the other
primary busses.
[...]
-aml_append(crs,
-aml_w
On 03/08/2015 06:03 PM, Michael S. Tsirkin wrote:
On Sun, Mar 08, 2015 at 05:37:25PM +0200, Marcel Apfelbaum wrote:
On 03/08/2015 05:27 PM, Michael S. Tsirkin wrote:
On Sun, Mar 08, 2015 at 05:22:43PM +0200, Marcel Apfelbaum wrote:
On 03/08/2015 04:47 PM, Michael S. Tsirkin wrote:
On Sun, Mar
On 03/08/2015 06:10 PM, Michael S. Tsirkin wrote:
On Sun, Mar 08, 2015 at 01:16:12PM +0200, Marcel Apfelbaum wrote:
If the machine has several root busses, we need to add them to
acpi in order to be properly detected by guests.
Signed-off-by: Marcel Apfelbaum
---
hw/i386/acpi-build.c | 32 ++
On 03/08/2015 06:27 PM, Michael S. Tsirkin wrote:
On Sun, Mar 08, 2015 at 01:16:14PM +0200, Marcel Apfelbaum wrote:
Save the IO/mem/bus numbers ranges assigned to the extra root busses
to be removed from the root bus 0 range.
Signed-off-by: Marcel Apfelbaum
---
hw/i386/acpi-build.c | 149 +++
On Sun, Mar 08, 2015 at 07:51:42PM +0200, Marcel Apfelbaum wrote:
> On 03/08/2015 06:13 PM, Kevin O'Connor wrote:
> >If I read this correctly, it looks like a machine with two root buses
> >and 20 devices, each with one memory range and one io range, would end
> >up with 40 CRS ranges (ie, a CRS ra
On 03/08/2015 08:26 PM, Kevin O'Connor wrote:
On Sun, Mar 08, 2015 at 07:51:42PM +0200, Marcel Apfelbaum wrote:
On 03/08/2015 06:13 PM, Kevin O'Connor wrote:
If I read this correctly, it looks like a machine with two root buses
and 20 devices, each with one memory range and one io range, would
On Sun, Mar 08, 2015 at 12:13:40PM -0400, Kevin O'Connor wrote:
> On Sun, Mar 08, 2015 at 01:16:15PM +0200, Marcel Apfelbaum wrote:
> > If multiple root busses are used, root bus 0 cannot use all the
> > pci holes ranges. Remove the IO/mem ranges used by the other
> > primary busses.
> [...]
> > -
On Sun, Mar 08, 2015 at 07:34:34PM +0100, Michael S. Tsirkin wrote:
> On Sun, Mar 08, 2015 at 12:13:40PM -0400, Kevin O'Connor wrote:
> > If I read this correctly, it looks like a machine with two root buses
> > and 20 devices, each with one memory range and one io range, would end
> > up with 40 C
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