[SeaBIOS] Re: [PATCH] limit address space used for pci devices, part two

2024-06-24 Thread Kevin O'Connor
On Mon, Jun 24, 2024 at 11:01:09AM +0200, Gerd Hoffmann wrote: > This patch changes the logic added by commit a6ed6b701f0a ("limit > address space used for pci devices.") a bit. Further testing showed > that the limit of 46 phys-bits applies to x86_64 kernels only, for i386 > kernels the limit is

[SeaBIOS] Re: [PATCH] limit address space used for pci devices, part two

2024-06-24 Thread Igor Mammedov
On Mon, 24 Jun 2024 11:01:09 +0200 Gerd Hoffmann wrote: > This patch changes the logic added by commit a6ed6b701f0a ("limit > address space used for pci devices.") a bit. Further testing showed > that the limit of 46 phys-bits applies to x86_64 kernels only, for i386 > kernels the limit is 44.

[SeaBIOS] Re: [PATCH] limit address space used for pci devices, part two

2024-06-24 Thread John Levon
On Mon, Jun 24, 2024 at 11:01:09AM +0200, Gerd Hoffmann wrote: > This patch changes the logic added by commit a6ed6b701f0a ("limit > address space used for pci devices.") a bit. Further testing showed > that the limit of 46 phys-bits applies to x86_64 kernels only, for i386 > kernels the limit is

[SeaBIOS] Re: [PATCH 4/4] only enable 64bit pci io window when RAM >60G

2024-06-24 Thread Gerd Hoffmann
On Fri, Jun 21, 2024 at 03:45:43PM GMT, Kevin O'Connor wrote: > On Thu, Jun 20, 2024 at 07:34:28PM +0200, Paul Menzel wrote: > > I know SeaBIOS does not promise anything regarding the version number, but > > maybe reverting the change and releasing 1.16.4, and then applying the > > change and incre

[SeaBIOS] Re: [PATCH v2 4/4] only enable 64bit pci io window when RAM >64G

2024-06-24 Thread Gerd Hoffmann
On Fri, Jun 21, 2024 at 01:37:24PM GMT, John Levon wrote: > On Fri, Jun 21, 2024 at 02:05:17PM +0200, Gerd Hoffmann wrote: > > > On Wed, Jun 19, 2024 at 11:21:14AM GMT, John Levon wrote: > > > Older 32-bit Linux VMs (including Ubuntu 16.10) have issues with the > > > 64-bit pci io window, failing

[SeaBIOS] [PATCH] limit address space used for pci devices, part two

2024-06-24 Thread Gerd Hoffmann
This patch changes the logic added by commit a6ed6b701f0a ("limit address space used for pci devices.") a bit. Further testing showed that the limit of 46 phys-bits applies to x86_64 kernels only, for i386 kernels the limit is 44. So change the limit from 46 to 44 for better compatibility with i3

[SeaBIOS] Re: [PATCH v2 4/4] only enable 64bit pci io window when RAM >64G

2024-06-24 Thread Gerd Hoffmann
On Fri, Jun 21, 2024 at 03:20:19PM GMT, Igor Mammedov wrote: > > > diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c > > index bb44dc296047..a43876a931c9 100644 > > --- a/src/fw/pciinit.c > > +++ b/src/fw/pciinit.c > > @@ -1189,11 +1189,16 @@ pci_setup(void) > > > > if (CPUPhysBits) { > >