Hello,
For a device with such a big 32 bit BAR, it would be a challenge to fit
it inside the 32 bit window, since the RAM region available on <4GB must
be specially tuned with help from the emulator (which, as far as I am
aware, isn't available) to give space for BAR allocations there. Is
th
Hello Daniel,
No, unfortunately this cannot be changed. So there is no possibility to map the
32 bit BAR in a higher memory region (where the 64 bit BAR’s are located)?
Kind regards,
Wannes
From: Daniel Paziyski
Sent: Wednesday, April 12, 2023 9:19 AM
To: Wannes Bouwen (Nokia) ; seabios@seabi
Hello Wannes,
Sorry, I don't think that's possible, because there's no way you can set
up a 32 bit BAR to point to anywhere higher than 4GB. The only thing I
could recommend is to mess with QEMU to see if it has some feature for
leaving such a huge free space on lower memory for BAR allocatio
(note for the previous message: the latter case for the Q35 chipset)
On 4/12/23 09:41, Daniel Paziyski wrote:
Hello Wannes,
Sorry, I don't think that's possible, because there's no way you can
set up a 32 bit BAR to point to anywhere higher than 4GB. The only
thing I could recommend is to
Hi,
> I'm running a x86 QEMU with Ubuntu. On this system we want to emulate
> a PCIe device which contains a large 32-bit BAR (2 GiB). This is not
> working and I get following error:
Why a 32-bit bar, not a 64-bit bar?
A 2G 32-bit bar simply can't be mapped anywhere on x86. It must be
below
Hello,
Thanks for the answers. We'll indeed investigate if we can use a 64-bit BAR.
Kind regards,
Wannes
-Original Message-
From: Gerd Hoffmann
Sent: Wednesday, April 12, 2023 10:04 AM
To: Wannes Bouwen (Nokia)
Cc: seabios@seabios.org
Subject: Re: [SeaBIOS] Large 32 bit BAR's
[U ont
Gerd Hoffmann wrote:
> A 2G 32-bit bar simply can't be mapped anywhere on x86. It must be
> below 4G,
Agree..
> and it must be 2G-aligned.
..but I can't find this requirement. Why do you say?
The one mention of alignment in PCI 3.0 is for the Expansion ROM BAR,
where *the device* can indicate
The way the size is reported by the BAR register by checking if the device
decodes certain bits or not implies that the address must be naturally
aligned, i.e. aligned to the size.
El vie, 14 abr 2023 17:38, Peter Stuge escribió:
> Gerd Hoffmann wrote:
> > A 2G 32-bit bar simply can't be mapped