Module Name:src
Committed By: skrll
Date: Fri Jan 29 14:12:01 UTC 2021
Modified Files:
src/sys/arch/arm/altera: cycv_dwcmmc.c cycv_gmac.c
Log Message:
fdtbus_intr_establish -> fdtbus_intr_establish_xname
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys
Module Name:src
Committed By: thorpej
Date: Wed Jan 27 01:47:40 UTC 2021
Modified Files:
src/sys/arch/arm/altera: cycv_clkmgr.c
Log Message:
Use DEVICE_COMPAT_EOL.
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/altera/cycv_clkmgr.c
Please n
Module Name:src
Committed By: thorpej
Date: Tue Jan 19 03:25:50 UTC 2021
Modified Files:
src/sys/arch/arm/altera: cycv_clkmgr.c
Log Message:
Use device_compatible_entry / of_search_compatible() to match the clock
type rather than calling of_compatible() on different sets o
Module Name:src
Committed By: skrll
Date: Thu Jan 17 12:49:53 UTC 2019
Modified Files:
src/sys/arch/arm/altera: cycv_clkmgr.c
Log Message:
KNF
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/altera/cycv_clkmgr.c
Please note that diffs are no
Module Name:src
Committed By: aymeric
Date: Fri Nov 2 18:13:11 UTC 2018
Modified Files:
src/sys/arch/arm/altera: cycv_platform.c
Log Message:
Adapt secondary CPU bootstrapping to the new generic startup code.
To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.9 s
Module Name:src
Committed By: aymeric
Date: Fri Nov 2 18:09:17 UTC 2018
Modified Files:
src/sys/arch/arm/altera: cycv_platform.c
Log Message:
. fix important typo which prevented enabling the SCU
. invalidate all cache tags of the SCU
To generate a diff of this commit:
Module Name:src
Committed By: aymeric
Date: Sun Oct 28 14:58:20 UTC 2018
Modified Files:
src/sys/arch/arm/altera: cycv_platform.c
Log Message:
Use virtual addresses where virtual addresses are expected.
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/
Module Name:src
Committed By: aymeric
Date: Sun Oct 14 18:53:01 UTC 2018
Modified Files:
src/sys/arch/arm/altera: cycv_rstmgr.c
Log Message:
Fix off-by-one when computing reset register address
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/
