From: Chris Blair chris.bl...@stericsson.com
For interrupt mode transfers, start with only TX interrupts enabled
to reduce the overall number of interrupts received. Once TX is
complete, enable RX interrupts to complete the transfer.
Signed-off-by: Chris Blair chris.bl...@stericsson.com
From: Jonas Aaberg jonas.ab...@stericsson.com
The driver build complains with newer compilers unless you
initialize this struct properly.
Signed-off-by: Jonas Aaberg jonas.ab...@stericsson.com
Signed-off-by: Linus Walleij linus.wall...@linaro.org
---
drivers/spi/spi-pl022.c |2 +-
1 files
From: Virupax Sadashivpetimath virupax.sadashivpetim...@stericsson.com
The loading of the default configuration before suspending has
been in the driver since its inception, but it is not really
needed. Especially so since we take to all the trouble of
enabling and disabling power and clock just
From: Chris Blair chris.bl...@stericsson.com
Moves the disabling of the device and clocks to the same thread in
which the device and clocks are enabled. This avoids SMP issues where
the device can be enabled for a transfer by one thread and then
disabled by the completion of the previous transfer
On 11/9/2011 4:08 PM, Linus WALLEIJ wrote:
+ /* default is to enable all interrupts except RX -
+ * this will be enabled once TX is complete
+ */
Other than fixing this multiline comment, everything other looks fine.
Reviewed-by: Viresh Kumar viresh.ku...@st.com
--
viresh
On 11/9/2011 4:08 PM, Linus WALLEIJ wrote:
From: Jonas Aaberg jonas.ab...@stericsson.com
The driver build complains with newer compilers unless you
initialize this struct properly.
Signed-off-by: Jonas Aaberg jonas.ab...@stericsson.com
Signed-off-by: Linus Walleij linus.wall...@linaro.org
On 11/9/2011 4:09 PM, Linus WALLEIJ wrote:
From: Virupax Sadashivpetimath virupax.sadashivpetim...@stericsson.com
Make sure we clear the enable bit when the block is not used.
This will save some energy in certain hardware versions.
Signed-off-by: Virupax Sadashivpetimath
On 11/9/2011 4:09 PM, Linus WALLEIJ wrote:
From: Virupax Sadashivpetimath virupax.sadashivpetim...@stericsson.com
The loading of the default configuration before suspending has
been in the driver since its inception, but it is not really
needed. Especially so since we take to all the trouble
On 11/9/2011 4:09 PM, Linus WALLEIJ wrote:
From: Chris Blair chris.bl...@stericsson.com
diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c
index bffad2a..2e3522d 100644
--- a/drivers/spi/spi-pl022.c
+++ b/drivers/spi/spi-pl022.c
@@ -512,13 +512,6 @@ static void giveback(struct
On 11/9/2011 4:09 PM, Linus WALLEIJ wrote:
From: Chris Blair chris.bl...@stericsson.com
Adds support for configuring the spi bus to use autosuspend for
runtime power management. This can reduce the latency in starting an
spi transfer by not suspending the device immediately following
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This bus driver supports the QUP SPI hardware controller in the Qualcomm
MSM SOCs. The Qualcomm Universal Peripheral Engine (QUP) is a general
purpose data path engine with input/output FIFOs and an embedded SPI
mini-core. The driver currently supports only FIFO mode.
Signed-off-by: Harini
On 11/09/2011 05:07 PM, Harini Jayaraman wrote:
This bus driver supports the QUP SPI hardware controller in the Qualcomm
MSM SOCs. The Qualcomm Universal Peripheral Engine (QUP) is a general
purpose data path engine with input/output FIFOs and an embedded SPI
mini-core. The driver currently
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