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Contact: cesl...@sin
arble, granite, concrete,
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Contact: cesl...@sin
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Please include your name and country of residence.
Best Regards,
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Contact: asy...@sina.com
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Email: york...@sina.com
If you are located outside the U.S., there may be a
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On Sat, Feb 16, 2013 at 02:34:47PM -0300, Ezequiel Garcia wrote:
> Hi Jason,
>
> On Sat, Feb 16, 2013 at 10:02:28AM -0500, Jason Cooper wrote:
> > On Wed, Feb 06, 2013 at 10:06:24AM -0300, Ezequiel Garcia wrote:
> > > The Armada XP DB-MV784MP-GP board has an SPI flash dev
/dts/armada-xp-db.dts | 12
> 1 file changed, 12 insertions(+)
Both 1 and 2 of this series applied to mvebu/dt, resolved add/add
conflicts in both (usb).
thx,
Jason.
--
The Go Parallel Website,
opment board(DB-MV784MP-GP)"
>
> arch/arm/boot/dts/armada-xp-gp.dts | 12
> 1 files changed, 12 insertions(+), 0 deletions(-)
Applied to mvebu/dt
thx,
Jason.
--
The Go Parallel Website, spo
0x28 instead of 0x50,
>as pointed out by Gregory
>
> arch/arm/boot/dts/armada-370-xp.dtsi | 22 ++
> 1 files changed, 22 insertions(+), 0 deletions(-)
Applied to mvebu/dt, resolved an add/add (i2c, mvsdio, usb) conflict.
thx,
Jason.
-
fconfig"
>
> arch/arm/configs/mvebu_defconfig |3 +++
> 1 files changed, 3 insertions(+), 0 deletions(-)
Applied to mvebu/boards
thx,
Jason.
--
The Go Parallel Website, sponsored by Intel - in partn
(-)
Applied to mvebu/boards
thx,
Jason.
>
> diff --git a/arch/arm/configs/mvebu_defconfig
> b/arch/arm/configs/mvebu_defconfig
> index 43a0dbf..322baca 100644
> --- a/arch/arm/configs/mvebu_defconfig
> +++ b/arch/arm/configs/mvebu_defconfig
> @@ -35,6 +35,8 @@ CO
On Wed, Feb 13, 2013 at 06:24:14AM -0300, Ezequiel Garcia wrote:
> Hi Jason,
>
> On Wed, Feb 6, 2013 at 10:28 AM, Jason Cooper wrote:
> > On Wed, Feb 06, 2013 at 02:16:54PM +0100, Gregory CLEMENT wrote:
> >> On 02/06/2013 02:06 PM, Ezequiel Garcia wrote:
> >> &g
ree to test or provide any feedback!
> >
> Ezequiel,
>
> I reviewed the patches, I have nothing more to say, I can add my:
>
> Acked-by: Gregory Clement
>
> on the patch that didn't have yet.
>
> Jason,
> could you add this series in your incoming pull request
hmmm, so for the new devboard we should set CONFIG_RAM=n? ;-)
thx,
Jason.
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h
On Tue, Feb 05, 2013 at 05:17:01PM +0100, Thomas Petazzoni wrote:
> Dear Jason Cooper,
>
> On Tue, 5 Feb 2013 10:31:35 -0500, Jason Cooper wrote:
>
> > One thing we've been doing a lot of with mvebu is using it for
> > build-testing. For that use case, since
On Tue, Feb 05, 2013 at 11:27:21AM -0300, Ezequiel Garcia wrote:
> On Tue, Feb 05, 2013 at 07:48:33AM -0500, Jason Cooper wrote:
> > Morning-ish Andrew,
> >
> > On Tue, Feb 05, 2013 at 01:38:27PM +0100, Andrew Lunn wrote:
> > > > And don't forget to compile t
l, then reconsidered when he said there was nothing
on it. So it's not really needed to boot. I don't have a strong
opinion on it though, so =y, =m, or =n.
thx,
Jason.
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rmada-xp-gp.dts | 12
> 1 files changed, 12 insertions(+), 0 deletions(-)
Very nice, thanks for listing the dependencies. That makes things a lot
easier on this end.
thx,
Jason.
--
Free Next-Gen Fir
Ezequiel,
On Mon, Feb 04, 2013 at 04:29:15PM -0300, Ezequiel Garcia wrote:
> On Mon, Feb 04, 2013 at 01:37:33PM -0500, Jason Cooper wrote:
> > On Mon, Feb 04, 2013 at 01:51:20PM -0300, Ezequiel Garcia wrote:
> > > The patches are based in Jason Cooper's mvebu/dt branc
Ezequiel,
This series looks good. just a few comments:
On Mon, Feb 04, 2013 at 01:51:20PM -0300, Ezequiel Garcia wrote:
> Hi,
>
> This patchset adds support for the SPI controller
> available in Armada 370 and Armada XP SoC.
>
> The patches are based in Jason Cooper'
On Thu, Dec 06, 2012 at 05:14:33PM -0700, Jason Gunthorpe wrote:
> On Thu, Dec 06, 2012 at 06:53:11PM -0500, Jason Cooper wrote:
> > On Thu, Dec 06, 2012 at 04:49:17PM -0700, Jason Gunthorpe wrote:
> > > Jason: Do you have any of these possibly affected boards with a SPI
> &g
On Thu, Dec 06, 2012 at 06:53:11PM -0500, Jason Cooper wrote:
> On Thu, Dec 06, 2012 at 04:49:17PM -0700, Jason Gunthorpe wrote:
> > Jason: Do you have any of these possibly affected boards with a SPI
> > flash to test linux-next? dove, dreamplug, ts219 and lsxl
>
> Yep,
On Thu, Dec 06, 2012 at 04:49:17PM -0700, Jason Gunthorpe wrote:
> Jason: Do you have any of these possibly affected boards with a SPI
> flash to test linux-next? dove, dreamplug, ts219 and lsxl
Yep, dreamplug ought to do.
thx,
atch against linux-next.
Okay, I think instead of the #ifdef a test for 'dev->ofdev == NULL'
would do the trick for now, then at least people can test the DT vs
the platform boot.
I am hoping to have time to revise patches on Friday, I will see.
Jason: Do you have any of these possibl
On Thu, Dec 06, 2012 at 02:25:21PM +, Grant Likely wrote:
> On Wed, 21 Nov 2012 12:23:35 -0700, Jason Gunthorpe
> wrote:
> > Support these transfer modes from the SPI layer by setting
> > the appropriate register bits before doing the transfer.
> >
> >
On Wed, Nov 21, 2012 at 02:35:52PM -0500, Jason Cooper wrote:
> > /* we support only mode 0, and no options */
> > - master->mode_bits = 0;
> > + master->mode_bits = SPI_CPHA | SPI_CPOL;
>
> The comment no longer seems valid. ;-) Also, you are uncondit
On Wed, Nov 21, 2012 at 12:23:35PM -0700, Jason Gunthorpe wrote:
> Support these transfer modes from the SPI layer by setting
> the appropriate register bits before doing the transfer.
>
> This was tested on the Marvell kirkwood SOC that uses this driver.
>
> Reviewed-b
Support these transfer modes from the SPI layer by setting
the appropriate register bits before doing the transfer.
This was tested on the Marvell kirkwood SOC that uses this driver.
Reviewed-by: Jason Gunthorpe
Signed-off-by: Rolf Manderscheid
---
drivers/spi/spi-orion.c | 25
ver, in this case, i think the
> number actually tells you more. The dtsi file has the number, not some
> symbolic representation. Also, some platforms, e.g. Dove, have more
> than one spi controller. Having the number there makes it easier to
> see the mapping be
On Sun, Jun 10, 2012 at 12:31:58PM +0200, Andrew Lunn wrote:
> From: Michael Walle
>
> Use the device tree for the SPI driver and partition layout.
>
> Signed-off-by: Michael Walle
> Signed-off-by: Andrew Lunn
Acked-by: Jason Cooper
> ---
> arch/arm/boot/dts/kirkw
t.c
> b/arch/arm/mach-kirkwood/board-dt.c
> index 0942139..5aa025d 100644
> --- a/arch/arm/mach-kirkwood/board-dt.c
> +++ b/arch/arm/mach-kirkwood/board-dt.c
> @@ -28,6 +28,8 @@ static struct of_device_id kirkwood_dt_match_table[]
> __initdata = {
>
> struct of_
drew, thanks for the patch series. At first glance, things look good.
I'll let this sit on the mailinglist for a few days and try to test it
early this week.
thx,
Jason.
> The SPI DT patches are from Michael Walle, and have been previously
> posted. I've addressed the iss
label = "U-Boot Config";
> + };
> + partition@000c {
> + reg = <0x000c 0x0014>;
> + label = "NAS Config";
>
xf1010600, "orion_spi.0", NULL),
Isn't this -^^ defined somewhere?
This is done about 1/4 of the time (56 / 187) in the kernel. But
honestly, I'd prefer it to be named.
Other than that,
Acked-by: Jason Cooper
> + {},
> +
+ kirkwood_init_irq();
> + irq_domain_add_legacy(np, 64, 0, 0, &irq_domain_simple_ops, NULL);
> + return 0;
> +}
> +
> +static const struct of_device_id kirkwood_irq_match[] = {
> + { .compatible = "marvell,orion-intc",
> + .data = kirkwood_add_irq_dom
On Sun, Jun 10, 2012 at 12:31:56PM +0200, Andrew Lunn wrote:
> From: Michael Walle
>
> Signed-off-by: Michael Walle
> Signed-off-by: Andrew Lunn
Looks good.
Acked-by: Jason Cooper
> ---
> Documentation/devicetree/bindings/spi/spi-orion.txt |5 +
> dr
O controllers
> are found.
>
> Signed-off-by: Andrew Lunn
Acked-by: Jason Cooper
> ---
> .../devicetree/bindings/gpio/mrvl-gpio.txt | 25 +++
> arch/arm/boot/dts/kirkwood.dtsi| 20 ++
> arch/arm/mach-kirkwood/irq.c
spi_info = spi_info;
>
> spi->clk = clk_get(&pdev->dev, NULL);
It's not relevant to this patch, but later in the patch series, you
initialize this device via devicetree. Did you add the clock node? Is
there a dependency for this series that I missed?
thx,
Jason.
>
On Sun, Jun 03, 2012 at 10:10:14PM +0200, Michael Walle wrote:
> This was formerly used to store the tclk value. Remove it.
>
> Signed-off-by: Michael Walle
Acked-by: Jason Cooper
> ---
> drivers/spi/spi-orion.c |5 -
> 1 files changed, 0 insertions(+), 5 deletions(
It is reasonable, looks fine to me. :-)
Jason.
Uwe Kleine-König wrote:
> there are no machines in-tree that still use the driver
> name as device name. So save a few bytes and remove it.
>
> Signed-off-by: Uwe Kleine-König
> ---
> drivers/sp
first data received in the RX_ONLY transfer will be that
random data instead of something meaningful.
We can avoid this by inserting a Disable/Re-enable toggle of the
channel after the TX_ONLY transfer, since it purges the rx register.
Signed-off-by: Jason Wang
Tested-by: Grazvydas Ignotas
Uwe Kleine-König wrote:
> Hi Jason,
>
>
>> I have performed a git pull for your repository based off 2.6.36-rc4, and
>> built and validated these patches on imx51_3ds board, they worked fine.
>> The spi flash can be read without any problems.
>>
>> A
Hi Uwe,
Uwe Kleine-König wrote:
> Hello,
>
> On Thu, Sep 02, 2010 at 04:39:08PM +0200, Uwe Kleine-König wrote:
>
>> Hello Jason,
>>
>>
>>>> Actually I would prefer our patches, but of course I'm biased :-)
>>>>
>>>>
reg |= (config->cs + 32) << MX31_CSPICTRL_CS_SHIFT;
>>> - }
>>> + if (cs < 0)
>>>
>>>
>> This can never be true, since an 'int' promoted from 'u8' will always
>> be positive!
>>
>
> This i
Uwe Kleine-König wrote:
> Hello Jason,
>
> I currently merge your and our patch set. Will follow up with the
> result hopefully later today.
>
> On Fri, Sep 03, 2010 at 02:22:08PM +0800, Jason Wang wrote:
>
>>>> @@ -52,6 +53,18 @@ static int _clk_ccgr_enable(
Uwe Kleine-König wrote:
> Hi Jason,
>
> On Thu, Sep 02, 2010 at 03:52:03PM +0800, Jason Wang wrote:
>
>> Add platform data for eCSPI2 and register it through spi_imx dynamical
>> register interface.
>>
>> Signed-off-by: Jason Wang
>> ---
>
Uwe Kleine-König wrote:
> Hi Jason,
>
> On Thu, Sep 02, 2010 at 03:52:01PM +0800, Jason Wang wrote:
>
>> Signed-off-by: Jason Wang
>> ---
>> arch/arm/mach-mx5/Kconfig |1 +
>> arch/arm/mach-mx5/devices-imx51.h | 20
>
Uwe Kleine-König wrote:
> On Thu, Sep 02, 2010 at 03:52:00PM +0800, Jason Wang wrote:
>
>> i.MX51 has two eCSPI and one CSPI controllers, now add clock
>> definitions and registrations for these controllers.
>>
>> Signed-off-by: Jason Wang
>> ---
>&
Uwe Kleine-König wrote:
> Hello Jason,
>
> On Thu, Sep 02, 2010 at 03:51:59PM +0800, Jason Wang wrote:
>
>> There are 3 SPI controllers on i.MX51, one is called CSPI and is
>> 100% compatible with the one on i.MX35, the other two are called
>> eCSPI and ar
Uwe Kleine-König wrote:
> From: Sascha Hauer
>
> Signed-off-by: Sascha Hauer
> Signed-off-by: Uwe Kleine-König
> ---
> arch/arm/mach-mx5/clock-mx51.c | 42
> ++
> arch/arm/mach-mx5/devices-imx51.h| 18 +++
> arch/arm/plat-mxc/device
Uwe Kleine-König wrote:
> Hello Jason,
>
>
>>> Actually I would prefer our patches, but of course I'm biased :-)
>>>
>>> I don't know how we should handle this. And Sascha is on vacation this
>>> and next week. I will inves
Uwe Kleine-König wrote:
> Hello Jason,
>
> On Thu, Sep 02, 2010 at 03:51:58PM +0800, Jason Wang wrote:
>
>> Some explanations:
>>
>> This patchset is to add SPI support in the existing spi_imx driver for
>> i.MX51 and add SPI relating stuffs for mx51_3ds boa
Add platform data for eCSPI2 and register it through spi_imx dynamical
register interface.
Signed-off-by: Jason Wang
---
arch/arm/mach-mx5/board-mx51_3ds.c | 20
1 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-mx5/board-mx51_3ds.c
b/arch/arm
Signed-off-by: Jason Wang
---
arch/arm/mach-mx5/Kconfig |1 +
arch/arm/mach-mx5/devices-imx51.h | 20
2 files changed, 21 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-mx5/devices-imx51.h
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach
i.MX51 has two eCSPI and one CSPI controllers, now add clock
definitions and registrations for these controllers.
Signed-off-by: Jason Wang
---
arch/arm/mach-mx5/clock-mx51.c | 79
1 files changed, 79 insertions(+), 0 deletions(-)
diff --git a/arch
A 2M bytes SPI NOR flash(sst25vf016b) is soldered on the mx51_3ds
board, Now add registration for it in the board init stage.
Signed-off-by: Jason Wang
---
arch/arm/mach-mx5/board-mx51_3ds.c | 13 +
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-mx5
On the imx51_3ds board, eCSPI2 is connected to a SPI NOR flash,
now add iomux definitions for those used pins.
Signed-off-by: Jason Wang
---
arch/arm/plat-mxc/include/mach/iomux-mx51.h |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-mxc/include/mach
0001 e040 d000 e1a0 600f e287
0d0 f006 e12f 0001 e040 d000 e1a0 6003 e287
0e0 60c0 e3c6 f006 e12f f004 e49d f003 e320
0f0 ff1e e12f 4001 e92d 0f11 ee11 0001 e380
Thanks,
Jason.
--
This SF.net Dev2Dev email is
: Jason Wang
---
drivers/spi/spi_imx.c | 135 +++--
1 files changed, 131 insertions(+), 4 deletions(-)
diff --git a/drivers/spi/spi_imx.c b/drivers/spi/spi_imx.c
index 7972e90..8d9c9da 100644
--- a/drivers/spi/spi_imx.c
+++ b/drivers/spi/spi_imx.c
ing to vacation and will be silent some time.
>
>
> Regards
> Roman Tereshonkov
>
>
OK, Thanks, If possible, i will ask for help from IC designers to
explain it.
Thanks,
Jason.
>
>> -Original Message-
>> From: ext jason [mailto:jason77.w...@gmail.com]
From 7b310e690fcccff400233a4c3340f42168016c92 Mon Sep 17 00:00:00 2001
From: Jason Wang
Date: Tue, 13 Jul 2010 18:05:59 +0800
Subject: [PATCH] spi/omap2_mcspi: disable channel after TX_ONLY transfer
in PIO mode
In TX_ONLY transfer, the spi controller will receive datas
simultaneously and hold them in the rx reg
roman.tereshon...@nokia.com wrote:
> Hi Jason,
>
> Your logs do not show what I wanted to see.
> But what I can see now at least is the case when TX is full and RX is full at
> the same time.
>
> 1. Put
> dev_dbg(&spi->dev, "status reg: %08x\n", __
roman.tereshon...@nokia.com wrote:
> Hi Jason,
>
> Your logs do not show what I wanted to see.
> But what I can see now at least is the case when TX is full and RX is full at
> the same time.
>
> 1. Put
> dev_dbg(&spi->dev, "status reg: %08x\n", __
roman.tereshon...@nokia.com wrote:
> Hi Jason,
>
> It is a little bit hard to analyze your logs.
> 1. You showed the bytes read in your own way but there is the data reading in
> omap2_mcspi_txrx_pio function also.
> 2. For your third test case. You try to read data aft
roman.tereshon...@nokia.com wrote:
> Hi Jason,
>
> It is a little bit hard to analyze your logs.
> 1. You showed the bytes read in your own way but there is the data reading in
> omap2_mcspi_txrx_pio function also.
>
I add polling RXS bit and read rx register after
roman.tereshon...@nokia.com wrote:
>
>
>
>> -Original Message-
>> From: ext jason [mailto:jason77.w...@gmail.com]
>> Sent: 25 June, 2010 15:31
>> To: Grant Likely
>> Cc: Tereshonkov Roman (Nokia-D/Helsinki); davi...@pacbell.net;
>>
Grant Likely wrote:
> On Fri, Jun 25, 2010 at 6:05 AM, jason wrote:
>
>> roman.tereshon...@nokia.com wrote:
>>
>>>
>>>
>> [snip]
>>
>>>> -Original Message-
>>>>
>>>>
Grant Likely wrote:
> On Thu, Jun 24, 2010 at 6:12 AM, Jason Wang wrote:
>
>> In current design, the SPI channel is always enable during the period
>> of handling a SPI message, it is risky when more than one SPI transfer
>> are included in a message. Current
> the receiving new data to the buffer.
> The channel needs to be disabled before the last word reading.
>
>
>
Yes, you are right. If this patch can be accepted, i will remove those
changes in the V2 patch.
Please see my email replying grant likely's questions.
Thanks,
Jas
river will send a SPI messge which includes,
[
TX_ONLY transfer (1 byte)
RX_ONLY transfer (2 bytes)
TX_ONLY transfer (1 byte)
RX_ONLY transfer (2 bytes)
]
If we don't add disable/reenable channel between TX and RX transfers,
the RX transfer will get wrong datas sent from slave.
Signed-off
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On Wed, Oct 29, 2008 at 10:53 AM, Josh Boyer <[EMAIL PROTECTED]> wrote:
> Also, do you have a patch for a DTS file that gives an example of how to
> instantiate the SPI stuff in the device tree?
I'll second that request. I've updated the device tree for my Kilauea
(405EX) board but am not sure I
en their AT91 SPI to work in slave mode in any fashion?
Thanks.
--
Jason Mcmullan <[EMAIL PROTECTED]>
Evil Labs
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