Re: armv7 Cortex-A7 fix

On 2016-08-11 08:30, Mark Kettenis wrote: Finally found the pmap bug that kept Cortex-A7 from working. Turns out we have to flush the TLB when removing a L1 slot as well. Already committed the diff, but here it is for those that are interested. For the unintroduced but curious, of what

Re: armv7/sxipio ofw_gpio

On Thu, Aug 11, 2016 at 05:41:35AM +0300, Artturi Alm wrote: > Hi, > > what's the plan for solving ordering issues for these devices? > could this be attached 'manually' from sunxi_platform_init_mainbus() or > something? What's acceptable? > I'd like to have this for carddetect before moving

Re: armv7 Cortex-A7 fix

On Thu, Aug 11, 2016 at 05:23:08AM +0300, Artturi Alm wrote: > Did you rememeber to revert the whatever patch you were using before? No. Thank you. -- U-Boot SPL 2016.07 (Aug 05 2016 - 23:44:57) DRAM: 1024 MiB CPU: 91200Hz, AXI/AHB/APB: 3/2/2 Trying to boot from MMC1 U-Boot 2016.07 (Aug

armv7/sxipio ofw_gpio

Hi, what's the plan for solving ordering issues for these devices? could this be attached 'manually' from sunxi_platform_init_mainbus() or something? What's acceptable? I'd like to have this for carddetect before moving forward with that. -Artturi diff --git a/sys/arch/armv7/conf/GENERIC

Re: armv7 Cortex-A7 fix

On Wed, Aug 10, 2016 at 10:53:03PM -0300, Daniel Bolgheroni wrote: > On Thu, Aug 11, 2016 at 02:30:59AM +0200, Mark Kettenis wrote: > > Finally found the pmap bug that kept Cortex-A7 from working. Turns > > out we have to flush the TLB when removing a L1 slot as well. Already > > committed the

armv7 Cortex-A7 fix

Finally found the pmap bug that kept Cortex-A7 from working. Turns out we have to flush the TLB when removing a L1 slot as well. Already committed the diff, but here it is for those that are interested. Index: arch/arm/arm/pmap7.c

Re: fix usermod -Z / -S

On Fri, 05 Aug 2016 13:04:42 -0600, "Todd C. Miller" wrote: > Here is a diff to remove the encrypted password length check. I > don't believe that user(8) has any business mucking about with > either existing encrypted passwords in master.password or with the > password specified by the user. >

Re: Amend history info for some utilities in /bin

Hi Sevan, Sevan Janiyan wrote on Wed, Aug 10, 2016 at 08:18:26PM +0100: > Attached diff corrects the version info utilities first appears > in the man pages of df, ln, ls, Committed, thanks. > ps. No. Please read the existing text carefully: > Index: bin/ps/ps.1 >

Amend history info for some utilities in /bin

Hello, Attached diff corrects the version info utilities first appears in the man pages of df, ln, ls, ps. Version information was obtained from TUHS and cat-v.org which host copies of the man pages. Sevan Index: bin/df/df.1 ===

Shuffle armv7 access permission bits

This diff changes the access permission bits we use in our page tables to something that is compatible with setting the Access Flag Enable bit in the System Control Register. The main thing that changes is that this changes userland read-only pages to be no longer writable from the kernel. And I

Re: Kernel panic pf.c during halting

> Are you using the tor TRANS_PF stuff for transparent proxying? Yes, I am. # grep -v -e ^# -e Password /etc/tor/instancjaDlaFF.conf user _tor_do_FF RunAsDaemon 1 DataDirectory /home/_tor_do_FF/ Log notice file /home/_tor_do_FF/logs/log SocksPort 0 TransListenAddress 172.10.0.2:9040 TransPort

stale prototypes in ntfs_ihash.h

Seems like ntfs_ihash.h has grown some mold; those functions don't exist. Ok? natano Index: ntfs/ntfs_ihash.h === RCS file: /cvs/src/sys/ntfs/ntfs_ihash.h,v retrieving revision 1.5 diff -u -p -r1.5 ntfs_ihash.h ---

Re: RELRO on mips64

> Hmm, doesn' Loongsoon actually have a NX bit? Perhaps in later > generations? In any case I'd keep them separate. Keeps the number of > variations between platfforms down a bit. I doubt a mips cpu will show up with a X or NX bit. MIPS TLB are not really designed to handle such fault

Re: Fix Wacom Intuos S 2 descriptor and make wsmouse work

On 08/10/16 13:46, Frank Groeneveld wrote: > On Mon, Aug 08, 2016 at 02:31:41PM +0200, Martin Pieuchot wrote: >> >> Search for UHIDEV_CLAIM_ALLREPORTID, at least upd(4) uses it. > > I've tried to implement a simple driver using this technique and it > seems this can only be used to claim all

Re: x260 skip_hids

> Date: Wed, 10 Aug 2016 15:51:23 +0300 > From: Paul Irofti > > Hi, > > Here's a list of device HIDs that can be skipped on the x260 models. > > Keyboard and mouse are working fine. The Synaptics soft buttons work > without requiring an sbtn_table entry. > > The ACPI system

x260 skip_hids

Hi, Here's a list of device HIDs that can be skipped on the x260 models. Keyboard and mouse are working fine. The Synaptics soft buttons work without requiring an sbtn_table entry. The ACPI system fan looks like dead AML code to me and acpithinkpad(4) reads the RPMs just fine. Ok? Paul

Re: Fix Wacom Intuos S 2 descriptor and make wsmouse work

On Mon, Aug 08, 2016 at 02:31:41PM +0200, Martin Pieuchot wrote: > > Search for UHIDEV_CLAIM_ALLREPORTID, at least upd(4) uses it. I've tried to implement a simple driver using this technique and it seems this can only be used to claim all report_ids under one uhidev device. The tablet acts as

Re: CVS: cvs.openbsd.org: src

On August 10, 2016 11:52:29 AM GMT+02:00, Sebastien Marie wrote: >On Tue, Aug 09, 2016 at 03:24:32PM -0600, Alexander Hall wrote: >> CVSROOT: /cvs >> Module name: src >> Changes by: ha...@cvs.openbsd.org 2016/08/09 15:24:32 >> >> Modified files: >> etc

[PATCH] [0/11] pf checksum modification / refactoring

Here is the first step in the pf checksum modification / refactoring series. The complete series is available at http://203.79.107.124/. It differs from what I presented at the hackathon only by a small optimisation [0]. Overview The series is broken into two phases. Phase1 is a

Re: CVS: cvs.openbsd.org: src

On Tue, Aug 09, 2016 at 03:24:32PM -0600, Alexander Hall wrote: > CVSROOT: /cvs > Module name: src > Changes by: ha...@cvs.openbsd.org 2016/08/09 15:24:32 > > Modified files: > etc: Makefile > etc/mtree : special > Removed files: > etc:

Re: RELRO on mips64

> Also, since mips64 doesn't have a real hardware NX bit, splitting the > .text and .rodata segments doesn't actually get us anything from a > protection standpoint. So, unset PAD_NO to smoosh them back together. The Loongson processors are supposed to have an NX bit, but it's only mentioned

Re: Kernel panic pf.c during halting

Are you using the tor TRANS_PF stuff for transparent proxying? On 9 August 2016 10:06:11 p.m. Lampshade wrote: > Which daemons do you use on this machine? # rcctl ls on check_quotas cron dnscrypt_proxy_one dnscrypt_proxy_second messagebus pf pflogd relayd sndiod

Re: RELRO on mips64

> Date: Wed, 10 Aug 2016 00:31:06 -0700 > From: Philip Guenther > > So it looks like relro wasn't working for me on mips64...because I > couldn't count zeros correctly: 0x1000 != 0x1, resulting in it > aligning on subpage size and protecting the relro area altered the

RELRO on mips64

So it looks like relro wasn't working for me on mips64...because I couldn't count zeros correctly: 0x1000 != 0x1, resulting in it aligning on subpage size and protecting the relro area altered the .data and .bss segments too. Setting COMMONPAGESIZE to 0x4000 == 16K, the advertised page

Re: smtpd 5.9.1 vs 6.0 & possible corner case / regression

On Tue, 9 Aug 2016, Chris Turner wrote: > However, in OpenSMTPD 6.0, mails are delivered as: > > From: Charlie Root > To: root < > > I've noticed that for mail sent by any user on the local machine to another local user. In addition smtpd does not append