Re: AMD64 buffer cache 4GB cap anything new, multiqueueing plans? ("64bit DMA on amd64" cont)

2018-11-06 Thread Philip Guenther
On Tue, Nov 6, 2018 at 9:51 PM Joseph Mayer wrote: > Previously there was a years-long thread about a 4GB (32bit) buffer > cache constraint on AMD64, ref > https://marc.info/?t=14682443664=1=2 . > > What I gather is, > > * The problematique is that on AMD64, DMA is limited to 32bit >

AMD64 buffer cache 4GB cap anything new, multiqueueing plans? ("64bit DMA on amd64" cont)

2018-11-06 Thread Joseph Mayer
Hi, Previously there was a years-long thread about a 4GB (32bit) buffer cache constraint on AMD64, ref https://marc.info/?t=14682443664=1=2 . What I gather is, * The problematique is that on AMD64, DMA is limited to 32bit addressing, I guess because unlike AMD64 arch CPU:s which all