> Hmm, doesn' Loongsoon actually have a NX bit? Perhaps in later
> generations? In any case I'd keep them separate. Keeps the number of
> variations between platfforms down a bit.
I doubt a mips cpu will show up with a X or NX bit.
MIPS TLB are not really designed to handle such fault conditio
> Also, since mips64 doesn't have a real hardware NX bit, splitting the
> .text and .rodata segments doesn't actually get us anything from a
> protection standpoint. So, unset PAD_NO to smoosh them back together.
The Loongson processors are supposed to have an NX bit, but it's only
mentioned o
> Date: Wed, 10 Aug 2016 00:31:06 -0700
> From: Philip Guenther
>
> So it looks like relro wasn't working for me on mips64...because I
> couldn't count zeros correctly: 0x1000 != 0x1, resulting in it
> aligning on subpage size and protecting the relro area altered the .data
> and .bss segm
So it looks like relro wasn't working for me on mips64...because I
couldn't count zeros correctly: 0x1000 != 0x1, resulting in it
aligning on subpage size and protecting the relro area altered the .data
and .bss segments too. Setting COMMONPAGESIZE to 0x4000 == 16K, the
advertised page si
