Quoting Jim Palfreyman <[EMAIL PROTECTED]>, on Wed 23 Jul 2008
09:11:32 PM PDT:
> In response to Jim Lux's email I checked out the NASA tech brief.
>
> According to them to run a sidereal clock you should set the frequency to
> 32,859.27577 Hz.
>
> Now the length of the sidereal day is 23:56:4.0
Quoting Tom Van Baak <[EMAIL PROTECTED]>, on Wed 23 Jul 2008 06:27:30 PM PDT:
> The result will be a $1, 8-pin, single-chip, 10 MHz to 32 kHz, low
> (not zero) jitter frequency divider, suitable for driving cheap digital
> or analog clock and watch movements from a 10 MHz source.
> Extra credit fo
In response to Jim Lux's email I checked out the NASA tech brief.
According to them to run a sidereal clock you should set the frequency to
32,859.27577 Hz.
Now the length of the sidereal day is 23:56:4.091 seconds. This is
23.934469722 hours. That is, the sidereal clock must cover 24 "hours" on
> At 04:17 PM 7/23/2008, Tom Van Baak wrote...
>>I just prototyped this PIC algorithm and it works perfectly:
>>Exactly 10 MHz in gives exactly 32.768 kHz out.
>
> TPIWWSC.
>
> (This Post Is Worthless Without Source Code)
>
> :-)
Hi Mike,
Yeah, I thought I provided enough information in that
Bruce Griffiths wrote:
> An oscillator can be injection locked to at frequency that is a rational
> number (M/N where M, N are integers ) multiplier of the injection frequency.
> Thus, in principle, a 32768Hz oscillator can be injection locked
> directly to a 10MHz signal (32768Hz = (256/78125)*1
Rick Karlquist wrote:
> A more practical offshoot of this concept is to subsample the
> 32 kHz oscillator at 128 Hz (ie a sampling phase detector) and use a slow
> loop to tune the 32768 kHz oscillator. The biggest problem here is that
> you have to have a tunable oscillator. Attempting to get ar
An oscillator can be injection locked to at frequency that is a rational
number (M/N where M, N are integers ) multiplier of the injection frequency.
Thus, in principle, a 32768Hz oscillator can be injection locked
directly to a 10MHz signal (32768Hz = (256/78125)*10MHz) without
requiring any ex
A more practical offshoot of this concept is to subsample the
32 kHz oscillator at 128 Hz (ie a sampling phase detector) and use a slow
loop to tune the 32768 kHz oscillator. The biggest problem here is that
you have to have a tunable oscillator. Attempting to get around
this by injection locking
Mike S,
I think you missed the point ! One does not ask the question "How does
one get a 32.768KHz signal from our 10MHz reference ?" and not expect
it to cost both in terms of money and effort. There was no statement
of doing it cheap, re-read the original Email.
BillWB6B
At 03:01 PM 7/23/2008, Mike S wrote:
>At 05:42 PM 7/23/2008, Bruce Griffiths wrote...
> >Another approach is to divide the 10MHz by 5^7 (78125) and then use an
> >
> >injection locked multiplier chain to generate 32768 Hz from the
> >resultant 128Hz output.
> >It may even be possible to do the 256x
At 05:42 PM 7/23/2008, Bruce Griffiths wrote...
>Another approach is to divide the 10MHz by 5^7 (78125) and then use an
>
>injection locked multiplier chain to generate 32768 Hz from the
>resultant 128Hz output.
>It may even be possible to do the 256x multiplication using a single
>injection locke
Another approach is to divide the 10MHz by 5^7 (78125) and then use an
injection locked multiplier chain to generate 32768 Hz from the
resultant 128Hz output.
It may even be possible to do the 256x multiplication using a single
injection locked 32768Hz injection locked multiplier.
When designed
Start:
NOP
NOP
NOP
...
NOP
flip_bit
NOP
NOP
NOP
...
flip_bit
JUMP Start
(details omitted for clarity)
:-)
Didier KO4BB
Mike S <[EMAIL PROTECTED]> wrote:
> At 04:17 PM 7/23/2008, Tom Van Baak wrote...
> >I just prototyped this PIC algorithm and it works perfectly:
> >Exactly 10 MHz in giv
At 04:17 PM 7/23/2008, Tom Van Baak wrote...
>I just prototyped this PIC algorithm and it works perfectly:
>Exactly 10 MHz in gives exactly 32.768 kHz out.
TPIWWSC.
(This Post Is Worthless Without Source Code)
:-)
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If you use a DDS then it pays to use the Analog Devices design tool.
It is at this URL
[1]http://designtools.analog.com/dtDDSWeb/dtDDSMain.aspx
You can open multiple instances in different browser windows. Also,
there is an area under the graphs called DISPLAY which allows for s
What Rick says is completely correct.
I took the general approach (so you can generate any frequency) and by
using a binary counting scheme, the number of clock cycles required is
reduced to 9 (for 24-bit) or 10 (for 32-bit), provided you use an AVR
processor.
The advantage then is that you have
> Since synchronization is more important than jitter in this
> application it's easy to generate 32 kHz from 10 MHz.
>
> A 10 MHz clock into a PIC gives a 400 ns/instruction time.
>
> To produce 32.768 kHz you flip an output pin put every 38
> instructions, except that 9632 times per second you
These limitations only apply because you have chosen an
accumulator size that is a binary power (ie 2^N). If
the accumulator is modulo 78,125 (ie 5^7), and you load
the value 256 (ie 2^8) every 100 nsec, the accumulator will overflow
at the rate of 32768 Hz, on the average. And it will be
exact,
There is no easy way to divide directly from 10MHz to 32768Hz.
On my web site at www.qsl.net/zl1bpu/MICRO there are several signal
generator projects which would do the job of generating 32768Hz from
10MHz for you.
With any of these (single chip micro approach, using 24-bit Direct
Digital Synthes
Correction - freq is high (*lead* builds up) for 53msec.
Ed
abt 200usec of lag accumulates
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and follow the instructions ther
Divide 10 MHz by 250 to get 40 kHz, to be within range of the clock's
logic, then use a presettable counter loaded by the 1 PPS to count
off 32768 clocks per second.
David McGaw
At 11:30 AM 7/23/2008, you wrote:
>I was faced with this problem a few years ago, too.
>I essentially followe
I see I'm coming to the party late, on the heels of Mike and Tom, but here's
some additional from playing with the numbers during lunch.
A mix of 30.4 us and 31.2 us periods (76 and 78 pic instr loops) in the
ratio of 1747 to 301 does it -- 32768Hz with a few percent fm-ing. With just
the two oute
Max,
You are a mild case
I also got bitten by the bug: Now I have 4 HP10811, two rubidiums,
two cesiums, T-Bolt and I am seriously considering making my own Cesium.
A visit to Las Vegas could turn to be cheaper fun than this..
Predrag
At 16:09 23.7.2008, you wrote:
>How does
At 11:56 AM 7/23/2008, Didier Juges wrote...
>Problem is one period of 32768 is not a multiple of 100nS (one period
>of 10 MHz) so that won't work.
As long as both periods are rational numbers, it doesn't matter, and it
can work. For this purpose (display for humans), it doesn't matter if
some
Ulrich Bangert wrote:
> just in order to prevent anybody into believing that
>
>> Variation of +/- one count in the last digit is normal for
>> any counter. It
>> is caused by a slight shift between the counter gate and the
>> input signal.
>> The longer the time between digit changes, the m
In a message dated 23/07/2008 17:31:28 GMT Daylight Time,
[EMAIL PROTECTED] writes:
I've had the Thunderbolt and the counter running for over 24 hours now,
and the 5th decimal figure, for a 1 second gate time, seems to have
settled down a bit. Now, that could be the counter , or the
thu
[EMAIL PROTECTED] wrote:
> If your counter will accept an external reference I'd suggest using the
> Thunderbolt for that and just trusting the results.
> However, if the figures you've shown represent the resolution limit of your
> counter then you may want to consider a counter with better
Since synchronization is more important than jitter in this
application it's easy to generate 32 kHz from 10 MHz.
A 10 MHz clock into a PIC gives a 400 ns/instruction time.
To produce 32.768 kHz you flip an output pin put every 38
instructions, except that 9632 times per second you make
it 39 ins
At 07:09 AM 7/23/2008, Max Skop wrote:
>How does one get a 32.768KHz signal from our 10MHz reference.
>There does not appear to be a nice divide ratio to do this.
>With a locked 32.768KHz signal one could lock the oscillator of any
>of the cheap (low cost) LCD clocks that are available with nice
Problem is one period of 32768 is not a multiple of 100nS (one period of 10
MHz) so that won't work. Maybe there is a common denominator and it may be
possible to generate an average 32768 periods over one second, even though all
periods may not be equal.
Didier KO4BB
Mike S <[EMAIL PROTE
I was faced with this problem a few years ago, too.
I essentially followed John's solution, but used the 1pps GPS pulse as
the PLL reference.
I then used the 32.768K vco output to injection-lock the 32.768K
crystal on the LCD clock.
Much to my surprise, it worked quite well. And,
The only thing that comes to mind is to divide the 10 MHz by 250
(5x5x10) and then use a phase locked loop to multiply by 8192. Of
course the PLL would best control a varactor with a clock crystal vice
controlling an RC oscillator. Other divisor multiplier pairs are:
125/4096, 625
At 10:09 AM 7/23/2008, Max Skop wrote...
>How does one get a 32.768KHz signal from our 10MHz reference.
>There does not appear to be a nice divide ratio to do this.
I've thought about this too. It seems the simple way would be to clock
a PIC with the 10 MHz, then use loops to produce the 32768 Hz
At 09:09 AM 7/23/2008 , Max Skop wrote:
>How does one get a 32.768KHz signal from our 10MHz reference.
>There does not appear to be a nice divide ratio to do this.
>With a locked 32.768KHz signal one could lock the oscillator of any of
the cheap (low cost) LCD clocks that are available with nice b
How does one get a 32.768KHz signal from our 10MHz reference.
There does not appear to be a nice divide ratio to do this.
With a locked 32.768KHz signal one could lock the oscillator of any of the
cheap (low cost) LCD clocks that are available with nice big digits,
temperature sensors and calend
In a message dated 23/07/2008 00:42:47 GMT Daylight Time, [EMAIL PROTECTED]
writes:
It turned out that the basic reference as fitted to the 3132A was fine to
demonstrate that the counter was working, but that was it.
--
Please excuse late night brain misfunction.
3132
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