Him Daniel,
the chip all 74HC4046, HC7046 and the HC9046 are well designed and
working fine for the application for which they were designed for, but
of course if you trying to used for something else you may run into
problems. Roland best describes the funtion of the chip in details with
many
Hi... can you share you routine for designing with this chip? I tried
using it sometime ago but the results didn´t agree much with what I
designed, so i gave up (for now... but i´ll return to it :)
Also in the datasheet it says:
13.3 Further information
For an extensive description and appli
I am new to time-nuts and seeking schematics only for the Stanford Research
FS-700 Loran-C frequency standard receiver.
Ground wave frequency references are my current interest. WWVB with its
new modulation method, and the new LORAN if it ever happens.
Thanks
.
Michael Smith
KB0EW
Hi Magnus
if you do not need to use the VCO of the 74CHXX46, just the phase
detector you could find better device at Analog Devices like the AD9901
and many others and you could use higher comparation frequency to, here
is how to do it:
http://www.microwavejournal.com/articles/21968-synthesiz
I seem to have painted myself into a corner with a Z3816 and wonder if
anyone can help. Originally bought from Ebay US over 5 years ago and
used since to drive several items of test gear and an hf receiver. It's
the ac line model and the only mod was to fit a small fan to keep the
insides cool.
Hi Samuel,
I have yet to see where you answered what your reference frequency is
for the PLL ? ? ? ?
If you are locking a 24.576 MHz oscillator to a common house standard
like, for example, 10 MHz then you are going to have a comparison
frequency at 16 KHz. The reason is Phase Detector #2 h
Hi Hans,
See if your plots look like approximately like these:
http://leapsecond.com/pages/53132/2324.gif
http://leapsecond.com/pages/53132/4099.gif
I did this as part of a week-long 51132A TIC resolution and linearity test.
I believe this is evidence of interpolator non-linearity within the 531
i use an Agilent 53132A as a TIC and Uli's "Plotter" to analyze the time
interval data of two oscillators. after removing the cycle wraps and the
drift there often remains a repeating pattern that i have not been able
to explain, e.g. TI increases, then drops a little bit and starts to
increase
I'm not sure what value 20 pieces is - but the LEA-6T still frequently goes
for $150, so wishful thinking is the LEA-8F won't be too far from that.
A Tbolt (new) is much, much more. I'm not too familiar with the prices of
other pre-integrated GPSDOs.
On Tue, Apr 29, 2014 at 7:43 AM, Attila Ki
The problem isn't so much NTP, it's that the kernel can't use the TSC as the
clock source, so it falls back to something like the HPET or ACPI timer which
are orders of magnitude less resolution than the TSC.
Here is the Atom D510 that shows the synchronization problem. Booting with
'nosmp' al
On Tue, 29 Apr 2014 08:02:06 -0400 (EDT)
ewkeh...@aol.com wrote:
> Looks like they are doing exactly what I suggested as one of the
> alternatives for saw tooth correction. They have a VCTCXO in the module, with
> the
> computing power in their chip a no brainer. the question is how much will
Running my PLL design routine again for 48 kHz I realize that this is in fact
very advantageous--it greatly reduces the required capacitor size in the loop
filter. So dividers are clearly the way to go.
Samuel
___
time-nuts mailing list -- time-nuts@fe
I want to thank everyone for their answers. I was sure I had the geometry
right and that the additional latency would make the position "fuzzier"
because I kept thinking that the clock was absolutely correct.
Of course, the clock in the GPS receiver converges on a time that is offset
from absolute
Looks like they are doing exactly what I suggested as one of the
alternatives for saw tooth correction. They have a VCTCXO in the module, with
the
computing power in their chip a no brainer. the question is how much will it
cost and how important will it be for a GPSDO. Final cost at maximum
Wow, 150PPM typical/100PPM guranteed is pretty big pull range for VCXO.
Wonder if they use a special cut to get that much. One trick I've seen is
to parallel crystals to increase pull range.
I have used PS2 from 74HCT9046 up to 1.0-2.5 MHz with no problems so you
will have no difficulty at the wor
Hi
It’s close in noise in the case of the HCT series parts.
Bob
On Apr 29, 2014, at 3:13 AM, Magnus Danielson
wrote:
> Alex,
>
> Sure, but is that close-in phase-noise or wideband white noise?
> It matters greatly how it is distributed in frequency.
>
> Most importantly, is it low enough to
Interesting, I had never read AES11 before, I see they are not just scaling
to the facility but to drop hints of worldwide synchronization in there. I
would like to compare/contrast the evolution of digital timecode
distribution (AES11 spec for 1ppm), with where nationwide conventional TV
distribut
On Sun, 27 Apr 2014 20:43:44 -0700
Hal Murray wrote:
> The uBlox-6 has a free running osc. If it wasn't free running, it would be a
> GPSDO.
Their new LEA-M8F seems to be a GPSDO. The 30.72MHz output frequency
suggests the intended use in cell phone base stations.
Att
Thanks again for the further discussion.
This is not for studio use, I'm designing a one-off AES-to-I2S interface for
evaluation of DA converter chips. The PLL provides a very low jitter master
clock such that the conversion jitter is, for jitter frequencies down to some
Hz, dominated by the VC
Alex,
Sure, but is that close-in phase-noise or wideband white noise?
It matters greatly how it is distributed in frequency.
Most importantly, is it low enough to recover the clock.
If it is too high, then one needs to use another VCO.
In this case, he only wanted to use the 74HCT9046 as a pha
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