On Fri, 10 Feb 2012 18:19:53 -0800, Hal Murray
wrote:
>> Flip-flops hardened against metastability are available.
>
>Do you have a part number in mind?
Here is another one with 125pS of specified metastability if you can
spare 27mA at 5 volts:
http://www.onsemi.com/pub/Collateral/MC10EL31-D.PDF
Hi
The sawtooth correction needs an accurately calibrated time offset measurement
to work against. That's not a requirement for a simple loop. Not impossible to
do, but it adds another constraint.
Bob
On Feb 12, 2012, at 3:05 PM, Chris Albertson wrote:
> On Sat, Feb 11, 2012 at 4:45 AM, Bo
On Sat, Feb 11, 2012 at 4:45 AM, Bob Camp wrote:
> Hi
>
> Another way to build an analog phase detector...
>
> Next layer on the onion is how to get the sawtooth correction out of the GPS
> and into your loop.
>
Assuming you have a uP in the loop the sawtooth is easy the GPS sends
the value out
There are no temperature coefficient effects or calibration drift with
the current sources and ramp circuits in this case. Between 1 PPS
measurements, there is more than enough time to gate a sample waveform
from the convenient 10 MHz source to the time to voltage converter to
calibrate it.
One i
How about using the 10KHz output from one of the Jupiter receivers as per
James Miller's simple GPSDO? There's TU60s available on Ebay from China
right now at reasonable prices.
regards
Nigel
GM8PZR
In a message dated 11/02/2012 18:04:22 GMT Standard Time,
paulsw...@gmail.com writes:
Looks like analog devices makes a pretty nice sample and hold chip. A bit
pricey.
But can't really work at 10 MC so that would complicate things
On Sat, Feb 11, 2012 at 10:54 AM, paul swed wrote:
> Getting very interesting.
> Bob had mentioned just sample the 10 MC sine wave. What I used to do o
Getting very interesting.
Bob had mentioned just sample the 10 MC sine wave. What I used to do on
homebrew Loran C.
Thats easier to do because today its nothing to buffer that 10 MC signal to
drive a fast sample and hold. This eliminates the ramp circuitry and
constant current sources used in the
This is the simplest part if a microprocessor can be used: by the serial
port you get the sawtooth correction in nS to be applied to the sampled
data. The sampled data must be converted to nS or the sawtooth correction
must be converted in a suitable sampled data correction. It is possible
even to
Hi
Another way to build an analog phase detector...
Next layer on the onion is how to get the sawtooth correction out of the GPS
and into your loop.
Bob
On Feb 11, 2012, at 12:05 AM, Chris Albertson wrote:
> All these different suggestions build down to one thing, the precision
> with whic
All these different suggestions build down to one thing, the precision
with which you measure the phase when you sample it each second. The
single flip flop will tell you which half cycle. a simple two bit
counter made with two '74 FFs tells you which half cycle and with
direction.
The "best" may
On Fri, 10 Feb 2012 18:19:53 -0800, Hal Murray
wrote:
>> Flip-flops hardened against metastability are available.
>
>Do you have a part number in mind?
Some logic families are better than others. In general you want
faster ones with shorter setup and hold times.
On Semiconductor has an interes
You don't. That's why the HC4046 has 3 phase comparators. Different strokes for
different folks...
From: Hal Murray
To: Discussion of precise time and frequency measurement
Sent: Fri, February 10, 2012 9:35:01 PM
Subject: Re: [time-nuts] GPS l
paulsw...@gmail.com said:
> Hang on here. If the signal was 10 MHz for ref and RB its easy as suggested
> here XOR gates and such.
Assume I have 2 signals that are (very) close to 10 MHz and I get to read
their XOR. How do I know which one is faster?
--
These are my opinions, not necessaril
paulsw...@gmail.com said:
> Why 24 bits because it was pretty easy using 74hc596 8 bit counters with
> latch and tristate outputs. Unfortunately the schematics are on paper at the
> moment scribbles. But the cntrs are stacked on top each other as a unit and
> soldered together. Only a few pins are
ver a sub-range and add a small micro for
>> noise filtering and averaging and one can achieve measurements result in the
>> 10s
>> of femtoseconds.
>>
>> ____________________
>> From: David
>> To: Discussion of precise time and frequency measurement
&
Hi
If your GPS puts out 1 pps, you get one sample per second out of your phase
detector. If it's digital you get a one or a zero. Dead time between edges is
50 ns. You throw away a lot of the accuracy of GPS by doing it this way. With
an analog detector you would know how early or late you are.
> Flip-flops hardened against metastability are available.
Do you have a part number in mind?
The only data sheet that I remember for a part that looked interesting was
actually 2 FFs inside one package. For something like that, you save the
prop time of the output driver and the input receive
On Fri, 10 Feb 2012 19:54:11 -0600, David
wrote:
>Flip-flops hardened against metastability are available.
>
>I would try a track and hold before a sample and hold but I wonder how
>accurate it would be having to rely on the oscillator waveform. Fast
>sample gates are non-trivial. I believe bet
Good question and the reason for the large counter.
If locked its a hard number and a number above or below that number is how
far its off and in what direction. Yup 24 bits was a bit crazy but it
wasn't anything to do.
That said a single 8 bit counter would have been fine given the stability
the R
On Fri, 10 Feb 2012 17:28:53 -0800, Chris Albertson
wrote:
>On Fri, Feb 10, 2012 at 5:10 PM, David wrote:
>
>> All you need for this is the flip-flop. Clock the flip-flop with the
>> 1 PPS signal and capture whether the oscillator is leading or lagging.
>
>I can see how this can detect lock. I
ging and one can achieve measurements result in the
>10s
>of femtoseconds.
>
>
>From: David
>To: Discussion of precise time and frequency measurement
>Sent: Fri, February 10, 2012 8:10:56 PM
>Subject: Re: [time-nuts] GPS lock of the FE5680. Cu
On Fri, Feb 10, 2012 at 5:10 PM, David wrote:
> All you need for this is the flip-flop. Clock the flip-flop with the
> 1 PPS signal and capture whether the oscillator is leading or lagging.
I can see how this can detect lock. If the FF is the same each second
you are good. But if it changes h
averaging and one can achieve measurements result in the
10s
of femtoseconds.
From: David
To: Discussion of precise time and frequency measurement
Sent: Fri, February 10, 2012 8:10:56 PM
Subject: Re: [time-nuts] GPS lock of the FE5680. Current experiment and
On Fri, 10 Feb 2012 16:35:26 -0800, Chris Albertson
wrote:
>On Fri, Feb 10, 2012 at 3:52 PM, Bob Camp wrote:
>> Hi
>>
>> I think you will need some sort of analog detector to get what you are
>> looking for.
>
>I don't think it needs to be analog. For example you can xor the two
>10MHz signal
On Fri, Feb 10, 2012 at 4:48 PM, paul swed wrote:
> Hang on here. If the signal was 10 MHz for ref and RB its easy as suggested
> here XOR gates and such.
>
> But the GPS is a 1 second interval and the RB is 10 Mhz. So the GPS 1
> second is the reference. Thats much harder then dealing with 100 Hz
Hang on here. If the signal was 10 MHz for ref and RB its easy as suggested
here XOR gates and such.
But the GPS is a 1 second interval and the RB is 10 Mhz. So the GPS 1
second is the reference. Thats much harder then dealing with 100 Hz or up.
So the answer I have seen which seems to fit is Bobs
On Fri, Feb 10, 2012 at 3:52 PM, Bob Camp wrote:
> Hi
>
> I think you will need some sort of analog detector to get what you are
> looking for.
I don't think it needs to be analog. For example you can xor the two
10MHz signals and then sample the digital xor output then deduce its
duty cycle b
Good comments so I am on target in thinking.
Why 24 bits because it was pretty easy using 74hc596 8 bit counters with
latch and tristate outputs.
Unfortunately the schematics are on paper at the moment scribbles.
But the cntrs are stacked on top each other as a unit and soldered
together. Only a fe
Hi
I think you will need some sort of analog detector to get what you are looking
for.
Bob
On Feb 10, 2012, at 6:34 PM, Chris Albertson wrote:
> On Fri, Feb 10, 2012 at 2:53 PM, paul swed wrote:
>> Just for fun have built up a simple multi-chip project to try my hand at
>> locking the FE56
On Fri, Feb 10, 2012 at 2:53 PM, paul swed wrote:
> Just for fun have built up a simple multi-chip project to try my hand at
> locking the FE5680 using the external efc connection mod. mentioned in
> time-nuts. Typical counter micro rs 232 port stuff.
>
> Essentially the system is 2 X 24 bit count
Hi
Without seeing the schematic it's a little hard to be sure this is all
correct...
If it is all based on 10 MHz, then yes you are doing it all modulo 100 ns. To
get 1 part in 1x10^13 you would need 100,000 seconds. If that drives the LSB of
a 16 bit counter for the DAC you would take a very
Just for fun have built up a simple multi-chip project to try my hand at
locking the FE5680 using the external efc connection mod. mentioned in
time-nuts. Typical counter micro rs 232 port stuff.
Essentially the system is 2 X 24 bit counters that toggle back and fourth
every interval selectable fr
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