[time-nuts] Phase noise & Jitter

2008-04-27 Thread Don Collie jnr
Hi Ulrich and Bruce, OK Ulrich, so one way to combat jitter is to use logic with the fastest possible hi/lo, and lo/hi transitions - slow logic [like CMOS] is more prone to jitter than, say, ECL - have I got that right? Or are you referring to the jitter that arises from noise on an anologue

[time-nuts] phase noise/jitter

2008-04-28 Thread Don Collie jnr
Hello Bruce and all, OK, now I think I understand : the more phase noise on the VCO, the more jitter on the output of the divide by "N". This output spectrum comprises *only* the PRF+ close-in noise sidebands [plus harmonics, and their noise sidebands]. Since the lowest frequency [ignori

Re: [time-nuts] Phase noise & Jitter

2008-04-27 Thread John Miles
[EMAIL PROTECTED] > Behalf Of Don Collie jnr > Sent: Sunday, April 27, 2008 11:03 PM > To: time-nuts@febo.com > Subject: [time-nuts] Phase noise & Jitter > > > Hi Ulrich and Bruce, > OK Ulrich, so one way to combat jitter is to use logic with... _

Re: [time-nuts] Phase noise & Jitter

2008-04-27 Thread Didier Juges
1:15 AM > To: Discussion of precise time and frequency measurement > Subject: Re: [time-nuts] Phase noise & Jitter > > If you haven't seen this yet: > http://www.ke5fx.com/HP_PN_seminar.pdf (7 MB) > > ... I'd strongly encourage you to check it out. The early > pa

Re: [time-nuts] Phase noise & Jitter

2008-04-28 Thread Bruce Griffiths
Don Collie jnr wrote: > I`m sorry, but I don`t understand what you mean in your second sentence > Bruce. > Thankyou for your comments, both!Don C. > Don Rephrasing: A VCO with a higher phase noise floor will have after division a higher close in phase noise than a

Re: [time-nuts] Phase noise & Jitter

2008-04-28 Thread Pete
Don, One effect I have observed on uP clock generators is that fully differential circuits which utilize the crossover of complementary signals are capable of lower jitter performance than single ended circuits. At least 2 performance gains are obvious; 1) the effective p-p swings are doubled 2) g

Re: [time-nuts] Phase noise & Jitter

2008-04-28 Thread Henk ten Pierick
Hi Don, Any comparator or slicer has a noise density and a noise bandwidth. The noise value of this slicer is the integral of the noise density over the noise bandwidth. The noise bandwidth is the slicer bandwidth, not the slicer frequency. Due to the slope, thus the slew rate, of the inpu

Re: [time-nuts] phase noise/jitter

2008-04-28 Thread Bruce Griffiths
Don Don Collie jnr wrote: > Hello Bruce and all, > OK, now I think I understand : the more phase noise on the VCO, the more > jitter on the output of the divide by "N". > This output spectrum comprises *only* the PRF+ close-in noise sidebands > [plus harmonics, and their noise sidebands].

Re: [time-nuts] Phase noise & Jitter

2008-04-28 Thread Bruce Griffiths
Henk ten Pierick wrote: > Hi Don, > > Any comparator or slicer has a noise density and a noise bandwidth. > The noise value of this slicer is the integral of the noise density > over the noise bandwidth. The noise bandwidth is the slicer > bandwidth, not the slicer frequency. Due to the slope

Re: [time-nuts] phase noise/jitter

2008-04-28 Thread Bruce Griffiths
Don Collie jnr wrote: > Hello Bruce and all, > OK, now I think I understand : the more phase noise on the VCO, the more > jitter on the output of the divide by "N". > This output spectrum comprises *only* the PRF+ close-in noise sidebands > [plus harmonics, and their noise sidebands]. Sin

Re: [time-nuts] Phase noise & Jitter

2008-04-29 Thread Hal Murray
> For digital circuits, it would seem that the potential for > metastability & threshold uncertainty, is reduced when the > slope-to-noise ratio is optimized. I wonder if this concept is, or can > be quantified? I don't think noise hurts or helps metastability. For every case where it might hur

Re: [time-nuts] Phase noise & Jitter

2008-04-29 Thread Bruce Griffiths
Hal Murray wrote: >> For digital circuits, it would seem that the potential for >> metastability & threshold uncertainty, is reduced when the >> slope-to-noise ratio is optimized. I wonder if this concept is, or can >> be quantified? >> > > I don't think noise hurts or helps metastability. Fo

Re: [time-nuts] Phase noise & Jitter

2008-04-29 Thread Pete
Hal, The HP 8160/61A boxes appear on *Bay fairly often. The HP8130/31A are there infrequently, but worth having. Pete Rawson ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts

[time-nuts] Phase Noise/Jitter/SNR/N to Slope ratio etc

2008-04-28 Thread Don Collie jnr
So to summarise : To make a synthesiser`s phase noise low : - Apply the KIS principle [Keep It Simple] - Use high speed [non-saturating?] logic rather than low - The logic supplies should be well regulated, distributed and decoupled. - Make the PRF to the P/F detector as high as p

Re: [time-nuts] Phase Noise/Jitter/SNR/N to Slope ratio etc

2008-04-28 Thread John Miles
> So to summarise : To make a synthesiser`s phase noise low : > > - Apply the KIS principle [Keep It Simple] > - Use high speed [non-saturating?] logic rather than low CMOS is actually among the cleanest logic families for digital PLLs these days. ECL has always been among the worst. It was u