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Gentlemen,
I would like to pose a theory question and see if my thinking is
faulty. My original design used a 50 MHz TIC clock and the TMR0
prescaler as the phase counter giving 20ns single sample resolution
in the prototype system. A
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Richard H McCorkle wrote:
> Gentlemen,
> I would like to pose a theory question and see if my thinking is
> faulty. My original design used a 50 MHz TIC clock and the TMR0
> prescaler as the phase counter giving 20ns single sample res
); SAEximRunCond expanded to false
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> My original design used a 50 MHz TIC clock and the TMR0
> prescaler as the phase counter giving 20ns single sample resolution
> in the prototype system.
In this case how about making a super-simple GPSDO
and just put the uncorrecte
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Tom,
That version was done a few years back when I was big on recycling
parts, so let me dig through my junkbox and see if I still have one
around.
Richard
> ); SAEximRunCond expanded to false
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>
> I a
