On 7/6/07, Zhifeng Lai [EMAIL PROTECTED] wrote:
Dear David,
Thanks for your reply!
With regard to the second question, if we disallow programmers to use
assembly code and assume ncc can perform global and inter-procedural alias
analysis, can we safely conclude my aforementioned claim
On 7/9/07, David Gay [EMAIL PROTECTED] wrote:
On 7/6/07, Zhifeng Lai [EMAIL PROTECTED] wrote:
Dear David,
Thanks for your reply!
With regard to the second question, if we disallow programmers to use
assembly code and assume ncc can perform global and inter-procedural alias
analysis, can
: Tuesday, July 10, 2007 12:29 AM
To: Zhifeng Lai
Cc: tinyos help; Philip Levis; Zhifeng Lai
Subject: Re: [Tinyos-help] Some confusion on the classic nesC paper.
On 7/9/07, David Gay [EMAIL PROTECTED] wrote:
On 7/6/07, Zhifeng Lai [EMAIL PROTECTED] wrote:
Dear David,
Thanks for your reply
On 7/9/07, Zhifeng Lai [EMAIL PROTECTED] wrote:
Dear David,
I do not have the background on developing embedded systems; I started to
learn nesC half a year ago for research purpose.
Do you mean that some commands in avr library that manipulate memory-mapped
I/O will enable interrupts as a
]
Sent: Tuesday, July 10, 2007 1:23 AM
To: Zhifeng Lai
Cc: tinyos help; Philip Levis; Zhifeng Lai
Subject: Re: [Tinyos-help] Some confusion on the classic nesC paper.
On 7/9/07, Zhifeng Lai [EMAIL PROTECTED] wrote:
Dear David,
I do not have the background on developing embedded systems; I
; Zhifeng Lai
Subject: Re: [Tinyos-help] Some confusion on the classic nesC paper.
On 7/4/07, Zhifeng Lai [EMAIL PROTECTED] wrote:
Dear Philip,
(1) Yes, I see. Another question relates to this: you said that the call
graph of nesC code is fully known at compile-time. I conjecture that the
component
On 7/4/07, Zhifeng Lai [EMAIL PROTECTED] wrote:
Dear Philip,
(1) Yes, I see. Another question relates to this: you said that the call
graph of nesC code is fully known at compile-time. I conjecture that the
component diagrams can be treated as call graphs in programming literature,
and since
Dear all,
I have some confusion on David and Philip's PLDI paper, The nesC Language:
A Holistic Approach to Networked Embedded Systems:
(1) What is the exact meaning of whole program analysis? Does it mean
the compiler can take all the interleavings into account?
(2) Could some data race
On Jul 4, 2007, at 8:18 AM, Zhifeng Lai wrote:
Dear all,
I have some confusion on David and Philip’s PLDI paper, “The nesC
Language: A Holistic Approach to Networked Embedded Systems”:
(1) What is the exact meaning of “whole program analysis”? Does
it mean the compiler can take all
data races if they obey the
race-free invariant?
Best regards,
Yours,
Zhifeng Lai
-Original Message-
From: Philip Levis [mailto:[EMAIL PROTECTED]
Sent: Thursday, July 05, 2007 12:11 AM
To: Zhifeng Lai
Cc: 'tinyos help'; 'Zhifeng Lai'
Subject: Re: [Tinyos-help] Some confusion on the classic
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