From: Roy Zang tie-fei.z...@freescale.com
Enable usb ehci support for p2020ds board
Signed-off-by: Roy Zang tie-fei.z...@freescale.com
---
include/configs/P2020DS.h |9 +
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/include/configs/P2020DS.h
From: James Clough ja...@rtetc.com
On 405EZ the RX-/TX-interrupts are coalesced into one IRQ bit in the
UIC. We need to acknowledge the RX-/TX-interrupts in the
SDR0_ICINTSTAT reg as well.
This problem was introduced with commit
d1631fe1 [ppc4xx: Consolidate PPC4xx UIC defines]
Signed-off-by:
This patch adds support for the Samsung s5pc100 and s5pc110
SoCs. The s5pc1xx SoC is an ARM Cortex A8 processor.
Signed-off-by: Minkyu Kang mk7.k...@samsung.com
Signed-off-by: HeungJun, Kim riverful@samsung.com
---
cpu/arm_cortexa8/s5pc1xx/Makefile| 53 ++
This patch includes the onenand driver for s5pc100
Signed-off-by: Minkyu Kang mk7.k...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/mtd/onenand/Makefile|2 +
drivers/mtd/onenand/samsung.c | 626 +++
This patch includes the serial driver for s5pc1xx
Signed-off-by: Minkyu Kang mk7.k...@samsung.com
---
common/serial.c | 18 +++
drivers/serial/Makefile |1 +
drivers/serial/serial_s5pc1xx.c | 308 +++
include/serial.h
Add new board SMDKC100 that uses s5pc100 SoC
Signed-off-by: Minkyu Kang mk7.k...@samsung.com
Signed-off-by: HeungJun, Kim riverful@samsung.com
---
MAINTAINERS|4 +
MAKEALL|1 +
Makefile |3 +
Dear Kumar Gala,
In message 83723583-5e4b-4a14-bf3a-2cdd4478e...@kernel.crashing.org you wrote:
Did this build ok w/o any warnings on TQM8540?
No, I'm getting the section overlaps warnings.
I'm seeing:
...
Which effective says to me we've run out of space in the image.
I see this, too.
Hi,
for this howto you need nash as a tool for parsing the linuxrc
http://www.denx.de/wiki/view/DULG/RootFileSystemInAReadOnlyFile
Where can I find this tool. I need it for a at91sam9g20.
bye
Konrad
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U-Boot@lists.denx.de
timur.t...@gmail.com wrote on 09/09/2009 16:24:15:
On Wed, Sep 9, 2009 at 4:19 AM, Joakim
Tjernlundjoakim.tjernl...@transmode.se wrote:
I wonder if this hides another problem too.
if the timeout hits, -1 is returned.
Then in i2c_read()/i2c_write() you have:
if
Dear Konrad Mattheis,
In message f32e8c2599f37641bb4e3f3ac4a3c412014625ac5...@ws you wrote:
for this howto you need nash as a tool for parsing the linuxrc
http://www.denx.de/wiki/view/DULG/RootFileSystemInAReadOnlyFile
Where can I find this tool. I need it for a at91sam9g20.
This
Dear Prafulla Wadaskar,
In message 1252315750-17914-1-git-send-email-prafu...@marvell.com you wrote:
This makes sure it gets rebuilt if any of the headers it includes are modified
Signed-off-by: Prafulla Wadaskar prafu...@marvell.com
Acked-by: Ron Lee r...@debian.org
---
tools/Makefile |
Dear Prafulla Wadaskar,
In message 1252315750-17914-2-git-send-email-prafu...@marvell.com you wrote:
Currently it is used by image.c only
This API can be used by additional mkimage types supports
for ex. kwbimage, to use it the API is made global
Signed-off-by: Prafulla Wadaskar
The following changes since commit 21170c80a83f1e60ce7f6f83005e06a5c2d15a8e:
Poonam Aggrwal (1):
ppc/85xx/86xx: Bug fix: call to puts in probecpu() moved to checkcpu().
are available in the git repository at:
git://git.denx.de/u-boot-mpc85xx.git master
Kumar Gala (2):
On Sep 10, 2009, at 2:56 AM, Wolfgang Denk wrote:
Dear Kumar Gala,
In message 83723583-5E4B-4A14-
bf3a-2cdd4478e...@kernel.crashing.org you wrote:
Did this build ok w/o any warnings on TQM8540?
No, I'm getting the section overlaps warnings.
I'm seeing:
...
Which effective says to me
In message 1250675656-12022-1-git-send-email...@denx.de you wrote:
This fixes some compiler warnings:
tools/default_image.c:141: warning: initialization from incompatible pointer
type
tools/fit_image.c:202: warning: initialization from incompatible pointer type
and changes to code to use
Hello,
2009/9/2 ratbert.chu...@gmail.com:
From: Po-Yu Chuang ratb...@faraday-tech.com
This patch adds support for A320 evaluation board from Faraday. This board
uses FA526 processor by default and has 512kB and 32MB NOR flash, 64M RAM.
FA526 is an ARMv4 processor and uses the ARM920T source
From: Scott Wood scottw...@freescale.com
We cannot handle any exceptions while running in AS1, as the exceptions
will transition back to AS0 without a valid mapping.
Signed-off-by: Scott Wood scottw...@freescale.com
---
cpu/mpc85xx/start.S |4 ++--
1 files changed, 2 insertions(+), 2
Dear Minkyu Kang,
In message 4aa8ac30.2070...@samsung.com you wrote:
This patch adds support for the Samsung s5pc100 and s5pc110
SoCs. The s5pc1xx SoC is an ARM Cortex A8 processor.
Signed-off-by: Minkyu Kang mk7.k...@samsung.com
Signed-off-by: HeungJun, Kim riverful@samsung.com
When
Dear Prafulla Wadaskar,
In message 1252315750-17914-4-git-send-email-prafu...@marvell.com you wrote:
Signed-off-by: Prafulla Wadaskar prafu...@marvell.com
---
board/Marvell/sheevaplug/config.mk|3 +
board/Marvell/sheevaplug/kwbimage.cfg | 162
+
2
Dear Prafulla Wadaskar,
In message 1252316102-17977-1-git-send-email-prafu...@marvell.com you wrote:
This patch adds type kwbimage support for new mkimage core
For more details refer docs/README.kwbimage
This patch is tested with Sheevaplug board
Signed-off-by: Prafulla Wadaskar
Dear Minkyu Kang,
In message 4aa8ac3b.5000...@samsung.com you wrote:
This patch includes the onenand driver for s5pc100
Signed-off-by: Minkyu Kang mk7.k...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
...
+struct s3c_onenand {
+ struct mtd_info *mtd;
+
+
Dear Minkyu Kang,
In message 4aa8ac42.50...@samsung.com you wrote:
This patch includes the serial driver for s5pc1xx
Signed-off-by: Minkyu Kang mk7.k...@samsung.com
...
+static inline struct s5pc1xx_uart *s5pc1xx_get_base_uart(int dev_index)
+{
+ u32 offset = dev_index * 0x400;
+
+
Dear Minkyu Kang,
In message 4aa8ac52.4010...@samsung.com you wrote:
Add new board SMDKC100 that uses s5pc100 SoC
Signed-off-by: Minkyu Kang mk7.k...@samsung.com
Signed-off-by: HeungJun, Kim riverful@samsung.com
...
+#ifndef __CONFIG_H
+#define __CONFIG_H
+#include asm/sizes.h
Please
Dear Kumar Gala,
In message pine.lnx.4.64.0909100356030.19...@localhost.localdomain you wrote:
The following changes since commit 21170c80a83f1e60ce7f6f83005e06a5c2d15a8e:
Poonam Aggrwal (1):
ppc/85xx/86xx: Bug fix: call to puts in probecpu() moved to
checkcpu().
are available
Dear Kumar Gala,
In message d09e46d6-37c0-44e4-a7e9-4042bcf63...@kernel.crashing.org you wrote:
It's a problem that exists independent of this patch, you get the same
errors before. The problems are caused by your commit ec79d33 (85xx:
Move to a common linker script).
I reported this
-Original Message-
From: Wolfgang Denk [mailto:w...@denx.de]
Sent: Thursday, September 10, 2009 4:09 PM
To: Prafulla Wadaskar
Cc: u-boot@lists.denx.de; Ron Lee; Ashish Karkare; Prabhanjan Sarnaik
Subject: Re: [U-Boot] [PATCH v4 5/5][repost] tools: mkimage:
Add: Kirkwood Boot
Hello Heiko,
- as this boards are similiar, collect common config option
in manroland-common.h and manroland-mpc52xx-common.h
for mpc52xx specific common options for this manufacturer.
- add OF support
- update default environment
Argh, sorry for interrupting again, but I think I
Hello Detlev,
Detlev Zundel wrote:
- as this boards are similiar, collect common config option
in manroland-common.h and manroland-mpc52xx-common.h
for mpc52xx specific common options for this manufacturer.
- add OF support
- update default environment
Argh, sorry for interrupting
The following changes since commit 6c97a20d0b2f56cb4f3745d94b1f96986e8cced5:
Kumar Gala (1):
ppc/85xx: Introduce RESET_VECTOR_ADDRESS to handle non-standard link
address
are available in the git repository at:
git://www.denx.de/git/u-boot-ppc4xx.git master
Detlev Zundel (1):
Dear Prafulla Wadaskar,
In message 73173d32e9439e4abb5151606c3e19e202ed2fe...@sc-vexch1.marvell.com
you wrote:
One single thanks for entire patch series :-)
Thanks for all your effort.
mkimage and kwbimage support which is working perfectly for Sheevaplug on
mkimage branch
There is one
Support for the OpenRD base board
The implementation is borrowed from the sheevaplug board and the Marvell
1.1.4 code and likely to be a bit incomplete.
Signed-off-by: Simon Kagstrom simon.kagst...@netinsight.net
---
The configuration does not include UBIFS support, which still needs
he
[Ccing Haavard, as he's the maintainer for the atmel_mci driver]
Hi Sami,
On Sat, 29 Aug 2009 20:18 +0300, Sami Kantoluoto wrote :
Fixed to parse CSD correctly on little endian processors as gcc orders
bitfields differently between big and little endian ones.
Signed-off-by: Sami Kantoluoto
Joakim Tjernlund wrote:
BTW, the fdr and dfsr calculations appears totally bogus. It seems
like the table is taken from some examples in AN2919 and it is pure luck
that it works most of the time. For me it does not work 100%, instead I get
random errors which hangs both the controller and the
Timur Tabi ti...@freescale.com wrote on 10/09/2009 15:07:36:
Joakim Tjernlund wrote:
BTW, the fdr and dfsr calculations appears totally bogus. It seems
like the table is taken from some examples in AN2919 and it is pure luck
that it works most of the time. For me it does not work 100%,
Joakim Tjernlund wrote:
A while back, someone posted a version of this code that computed the values
of fdr/dfsr. I nack'd that patch because I thought the algorithm was too
Not so sure about that, but I haven't tried to calc it generally.
A quick way to check this is to figure out which
On some Freescale SoC Internal DMA of eSDHC controller has bug.
So PIO Mode has introduced to do data transfer using CPU.
In PIO mode data transfer performance will be degraded by a large extent.
Note:
In PIO mode multiple block read/write requires delay to complete the transfer.
Timur Tabi ti...@freescale.com wrote on 10/09/2009 15:29:35:
Joakim Tjernlund wrote:
A while back, someone posted a version of this code that computed the
values
of fdr/dfsr. I nack'd that patch because I thought the algorithm was too
Not so sure about that, but I haven't tried to
Dear Wolfgang Denk,
Wolfgang Denk wrote:
Dear Daniel Gorsulowski,
In message 12524805241911-git-send-email-daniel.gorsulow...@esd.eu you
wrote:
This patch implements several updates:
-Disable CONFIG_ENV_OVERWRITE
-Add new hardware style variants and set the arch numbers appropriate
This patch implements several updates:
-disable CONFIG_ENV_OVERWRITE
-add new hardware style variants and set the arch numbers appropriate (autodet.)
-pass the serial# and hardware revision to the kernel
-removed unused macros from include/configs/meesc.h
Signed-off-by: Daniel Gorsulowski
Hi there:
Recently I'm playing with u-boot and want it be able to boot from nand.
When I config u-boot to smdk6400, I found I can't get nand_spl with proper
size. It need to be pad to 4k to fit into the steping stone.
The final size of nand_spl is depend on the variable PAD_TO:
#
On Sep 10, 2009, at 6:55 AM, Wolfgang Denk wrote:
Dear Kumar Gala,
In message D09E46D6-37C0-44E4-
a7e9-4042bcf63...@kernel.crashing.org you wrote:
It's a problem that exists independent of this patch, you get the
same
errors before. The problems are caused by your commit ec79d33
Hi Konrad,
On Thu, 10 Sep 2009 08:58 +0200, Konrad Mattheis wrote :
I will try this later on the day. What is the Base for this patch? Again
2009.08 or do I have
to apply other patches?
2009.08 is fine.
You wrote in this message that this is a port to the new generic mmc api.
Do I also
Timur Tabi ti...@freescale.com wrote on 10/09/2009 15:29:35:
Joakim Tjernlund wrote:
A while back, someone posted a version of this code that computed the
values
of fdr/dfsr. I nack'd that patch because I thought the algorithm was too
Not so sure about that, but I haven't tried to
From: Martha Marx mm...@silicontkx.com
Signed-off-by: Martha Marx Stan mm...@silicontkx.com
---
cpu/mpc512x/fixed_sdram.c| 104
include/configs/aria.h | 190 +-
include/configs/mecp5123.h | 78 +-
Joakim Tjernlund wrote:
Come on, just because my board is somewhat broken, it doesn't mean the
driver is correct. If I define my speed to 100KHz I get
a DFSR of 22, way over what is allowed for my board.
Why is a value of 22 over what is allowed on the board? I was under the
impression that
Joakim Tjernlund wrote:
Looking a bit harder at the table I don't understand some entries, where does
the entries with dfsr != 1 come from? They don't look like any table in AN2919
They're all calculated. I entered the algorithm into a spreadsheet and
determined every possible combination of
Timur Tabi ti...@freescale.com wrote on 10/09/2009 17:22:38:
Joakim Tjernlund wrote:
Come on, just because my board is somewhat broken, it doesn't mean the
driver is correct. If I define my speed to 100KHz I get
a DFSR of 22, way over what is allowed for my board.
Why is a value of 22
Joakim Tjernlund wrote:
From AN2919, chap. 4.1:
C = 50*T, C is dfsr and T is i2c_period in nano seconds.
Argh, my copy of AN2919 is old! Mine doesn't have any of this stuff in it.
--
Timur Tabi
Linux kernel developer at Freescale
___
U-Boot mailing
Timur Tabi ti...@freescale.com wrote on 10/09/2009 17:26:29:
Joakim Tjernlund wrote:
Looking a bit harder at the table I don't understand some entries, where
does
the entries with dfsr != 1 come from? They don't look like any table in
AN2919
They're all calculated. I entered the
From: Martha Marx mm...@silicontkx.com
Rev 3 and earlier stay with Micron settings. Rev 4 boards manufactured
before Nov-2008 Serial Number #1180 also stay with Micron settings.
All new boards use a slightly slower Elpida setting.
CONFIG_SYS_ELPIDA_MICRON_MIX sets up this detection and use.
Timur Tabi ti...@freescale.com wrote on 10/09/2009 18:13:03:
Joakim Tjernlund wrote:
This calculation does not seem to match AN2919.
When I wrote the code, AN2919 was much smaller than what you have today.
Suppose one used only Table 7(almost what we have if you exclude dfsr!= 1)
Table
Timur Tabi ti...@freescale.com wrote on 10/09/2009 18:13:03:
Joakim Tjernlund wrote:
This calculation does not seem to match AN2919.
When I wrote the code, AN2919 was much smaller than what you have today.
Suppose one used only Table 7(almost what we have if you exclude dfsr!= 1)
Table
- as this boards are similiar, collect common config option
in manroland/common.h and manroland/mpc52xx-common.h
for mpc5200 specific common options for this manufacturer.
- add OF support
- update default environment
Signed-off-by: Heiko Schocher h...@denx.de
---
- changes since v1:
added
U-Boot can detect, if a ide device is present or not.
If not and this new config option is activated, u-boot
removes the ata node from the DTS before booting Linux,
so the Linux IDE driver didn;t crashs, when probing the
device. This is needed for buggy hardware (uc101) where
no pull down resistor
Dear Daniel Gorsulowski,
In message 4aa90821.1060...@esd.eu you wrote:
- /* arch number of MEESC-Board */
- gd-bd-bi_arch_number = MACH_TYPE_MEESC;
+ /* initialize ET1100 Controller */
+ meesc_ethercat_hw_init();
I thought we had agreed not to initialize the Ethernet hardware
Dear Martha M Stan,
In message 12525956202930-git-send-email-mm...@silicontkx.com you wrote:
From: Martha Marx mm...@silicontkx.com
May I ask what the purpose of such a rename is? I mean, which problem
are you tryin to fix, and in which way is the new code supposed to be
better than the old
Dear Martha M Stan,
In message 12525956963103-git-send-email-mm...@silicontkx.com you wrote:
From: Martha Marx mm...@silicontkx.com
Rev 3 and earlier stay with Micron settings. Rev 4 boards manufactured
before Nov-2008 Serial Number #1180 also stay with Micron settings.
All new boards use a
I'm trying to get my ppc440spe (Katmai) board to initialize in PCI adapter
mode. I was hoping that someone could give me some pointers on what changes
I need in the katmai config file, i.e. do I need to define
CONFIG_SYS_PCI_MASTER_INIT. Also I noticed that some ppc4xx have
PCI_HOST_ADAPTER
Sandeep,
Can you push this change to uboot-ti ?
Tom
1) From the previous discussion I think we should apply
http://lists.denx.de/pipermail/u-boot/2009-August/058492.html
Tom wrote:
Dirk Behme wrote:
Tom wrote:
Minkyu Kang wrote:
Dear Dirk,
snip
I have lost track of this thread.
From: Scott Wood scottw...@freescale.com
Its reset value is random, and we sometimes read uninitialized TLB
arrays. Make sure that we don't retain MAS8 from reading such an entry
if the VF bit in MAS8 is set, attempts to use the mapping will trap.
Signed-off-by: Scott Wood
From: Scott Wood scottw...@freescale.com
Skipping the interrupted instruction will accomplish nothing other
than turning a spurious interrupt into a crash.
External interrupts are not machine checks, so don't count them as such.
Signed-off-by: Scott Wood scottw...@freescale.com
---
Hello Wolfgang,
I know this was a while ago ... but when I first posted the Elpida patch you
asked me to FIX the my memory constant changes. At that time you said the
following
While performing such a global rename, please let's get rid of the
CONFIG_SYS_ names. These are NOT options that
OK.
Will do
-Original Message-
From: Tom [mailto:tom@windriver.com]
Sent: Thursday, September 10, 2009 3:02 PM
To: Paulraj, Sandeep
Cc: Dirk Behme; u-boot@lists.denx.de; Minkyu Kang
Subject: Re: [U-Boot] [PATCH] arm_cortexa8: support cache flush to other
soc
Sandeep,
Can
Dear Martha J Marx,
In message 200909101515289.sm07...@cw4mb41 you wrote:
I know this was a while ago ... but when I first posted the Elpida patch you
asked me to FIX the my memory constant changes. At that time you said the
following
While performing such a global rename, please
Very Elegant Wolfgang - I like it ... I'll take a stab and I'll try not to
tarnish it!
-M
Looking at the code it seems we have just a list of constants that
need to get written all to the same mddrc.ddr_command register. To
make this configurable, we should probably not try to add more
* Fix setting of ESDMODE (MR1) register - the bit shifting was wrong
* Fix the format string to match size in a debug print
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
cpu/mpc8xxx/ddr/ctrl_regs.c| 10 +-
cpu/mpc8xxx/ddr/ddr3_dimm_params.c |4 ++--
2 files
Dear Stefan Roese,
In message 200909101441.04049...@denx.de you wrote:
The following changes since commit 6c97a20d0b2f56cb4f3745d94b1f96986e8cced5:
Kumar Gala (1):
ppc/85xx: Introduce RESET_VECTOR_ADDRESS to handle non-standard link
address
are available in the git repository
In message 1252360351-22806-1-git-send-email...@denx.de you wrote:
Commit 65f6f07b added support for the atmel_df_pow2 standalone program
but missed to add a rule to remove it to the clean make target.
Signed-off-by: Wolfgang Denk w...@denx.de
---
Makefile |1 +
1 files changed, 1
Dear Mingkai Hu,
In message 1252393633-14949-1-git-send-email-mingkai...@freescale.com you
wrote:
then we can handle the different config target in the board file,
which simplify the top makefile for board that have multiple config
targets.
Signed-off-by: Mingkai Hu
Dear Marcel Ziswiler,
In message 1252523600.3643.6.ca...@com-21 you wrote:
Signed-off-by: Marcel Ziswiler marcel.ziswi...@noser.com
Tested-by: Heiko Schocher h...@denx.de
---
Changes since v1:
- Added Heiko's tested-by
board/keymile/mgcoge/mgcoge.c |5 -
Dear Marcel Ziswiler,
In message 1252524034.3643.10.ca...@com-21 you wrote:
Signed-off-by: Marcel Ziswiler marcel.ziswi...@noser.com
Tested-by: Heiko Schocher h...@denx.de
---
Changes since v1:
- Added previously missed mgcoge board as pointed out by Peter Tyser and Heiko
- Moved the
Dear Marcel Ziswiler,
In message 1252524128.3643.12.ca...@com-21 you wrote:
Signed-off-by: Marcel Ziswiler marcel.ziswi...@noser.com
---
Changes since v1:
- Removed redundant commit message as pointed out by Peter Tyser
- Separate patch to move FDT memory node fixup into common CPU code as
Dear Marcel Ziswiler,
In message 1252523340.3643.2.ca...@com-21 you wrote:
Signed-off-by: Marcel Ziswiler marcel.ziswi...@noser.com
---
Changes since v1:
- CC R7780MP maintainer Nobuhiro Iwamatsu
include/configs/r7780mp.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
Dear Marcel Ziswiler,
In message 1252523478.3643.4.ca...@com-21 you wrote:
Signed-off-by: Marcel Ziswiler marcel.ziswi...@noser.com
Acked-by: Heiko Schocher h...@denx.de
---
Changes since v1:
- Added Heiko's ack
board/muas3001/muas3001.c | 16
1 files changed, 0
On Sep 10, 2009, at 1:44 AM, Roy Zang wrote:
From: Roy Zang tie-fei.z...@freescale.com
Enable usb ehci support for p2020ds board
Signed-off-by: Roy Zang tie-fei.z...@freescale.com
---
include/configs/P2020DS.h |9 +
1 files changed, 9 insertions(+), 0 deletions(-)
applied to
On Sep 8, 2009, at 2:07 AM, Mingkai Hu wrote:
Signed-off-by: Mingkai Hu mingkai...@freescale.com
---
Makefile|4 +---
include/configs/MPC8536DS.h |2 +-
2 files changed, 2 insertions(+), 4 deletions(-)
applied to 85xx.
- k
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
Makefile| 22 --
include/configs/P1_P2_RDB.h | 13 +
2 files changed, 17 insertions(+), 18 deletions(-)
diff --git a/Makefile b/Makefile
index a3d6734..508defe 100644
--- a/Makefile
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
Makefile|7 +--
include/configs/MPC8572DS.h |4
2 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/Makefile b/Makefile
index 0c134f3..ae72553 100644
--- a/Makefile
+++ b/Makefile
@@ -2514,12
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
Makefile |7 +--
include/configs/P2020DS.h |4
2 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/Makefile b/Makefile
index ae72553..a3d6734 100644
--- a/Makefile
+++ b/Makefile
@@ -2518,12
On Sep 8, 2009, at 1:49 PM, Kumar Gala wrote:
There is no reason to do a run time check for e500 v1 based cores to
determine if we have the GUTs RSTCR facility. Only the first
generation
of PQ3 parts (MPC8540/41/55/60) do not have it. So checking to see if
we are e500 v2 would miss
Commit 4abd844d8e extended the fdt command parser to handle property
strings which are split across multiple arguments but it was broken for
byte streams and strings. This patch fixes those.
Signed-off-by: Ken MacLeod k...@bitsko.slc.ut.us
---
common/cmd_fdt.c | 11 +--
1 files
Kumar Gala wrote:
diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h
index 2a2b9ac..f987f7a 100644
--- a/include/configs/P2020DS.h
+++ b/include/configs/P2020DS.h
@@ -27,6 +27,10 @@
#ifndef __CONFIG_H
#define __CONFIG_H
+#ifdef CONFIG_MK_P2020DS_36BIT
+#define
Mike Frysinger wrote:
the attached patch incorporates my changes and has been tested on actual
hardware with 2009.08
-mike
Thanks a lot. I'm applying it to the net tree.
regards,
Ben
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Mike Frysinger wrote:
The random_port() is meant to be used by other net code, but without a
prototype, we get fun warnings like:
dns.c: In function 'DnsSend':
dns.c:89: warning: implicit declaration of function 'random_port'
Signed-off-by: Mike Frysinger vap...@gentoo.org
---
Stefan Roese wrote:
From: James Clough ja...@rtetc.com
On 405EZ the RX-/TX-interrupts are coalesced into one IRQ bit in the
UIC. We need to acknowledge the RX-/TX-interrupts in the
SDR0_ICINTSTAT reg as well.
This problem was introduced with commit
d1631fe1 [ppc4xx: Consolidate PPC4xx UIC
From: Sandeep Paulraj s-paul...@ti.com
The Default mode that is built for the Davinci DVEVM happens
to be the NOR mode.
When we want to build for the NAND mode, we get a compilation
error. This is overcome by defining the CONFIG_MTD_DEVICE
flag in the NAND mode.
The image built for NAND
v7_flush_dcache_all, because it depends on omap ROM code is not
generic. Rename the function to 'invalidate_dcache' and move it
to the omap cpu directory.
Collect the other omap cache routines l2_cache_enable and
l2_cache_disable with invalide_dcache into cache.S. This
means removing
Hi Ken,
Ken MacLeod wrote:
Commit 4abd844d8e extended the fdt command parser to handle property
strings which are split across multiple arguments but it was broken for
byte streams and strings. This patch fixes those.
Signed-off-by: Ken MacLeod k...@bitsko.slc.ut.us
Thanks for the patch.
Paulraj, Sandeep wrote:
v7_flush_dcache_all, because it depends on omap ROM code is not
generic. Rename the function to 'invalidate_dcache' and move it
to the omap cpu directory.
Collect the other omap cache routines l2_cache_enable and
l2_cache_disable with invalide_dcache into cache.S.
These patches implement boot from NAND/eSDHC/eSPI in a unified way - all of
these use the general file cpu/mpc85xx/start.S and load the image into L2SRAM.
Modification over v1:
- Align to the latest tree: http://git.denx.de/u-boot-mpc85xx.git
- Align the NAND board make config to the latest
The MPC8536E is capable of booting form NAND/eSDHC/eSPI, this patch
implements these three bootup methods in a unified way - all of these
use the general cpu/mpc85xx/start.S, and load the main image to L2SRAM
which lets us use the SPD to initialize the SDRAM.
For all three bootup methods, the
So that we can set the NAND loader's relocate stack pointer
to the value other than the relocate address + 0x1.
Signed-off-by: Mingkai Hu mingkai...@freescale.com
---
board/freescale/mpc8313erdb/mpc8313erdb.c |2 +-
board/sheldon/simpc8313/simpc8313.c |2 +-
The MPC8536E is capable of booting from the on-chip ROM - boot from
eSDHC and boot from eSPI. When power on, the porcessor excutes the
ROM code to initialize the eSPI/eSDHC controller, and loads the mian
U-Boot image from the memory device that interfaced to the controller,
such as the SDCard or
MPC8536E can support booting from NAND flash which uses the
image u-boot-nand.bin. This image contains two parts: a 4K
NAND loader and a main U-Boot image. The former is appended
to the latter to produce u-boot-nand.bin. The 4K NAND loader
includes the corresponding nand_spl directory, along with
Add boot from NAND/eSDHC/eSPI description
Signed-off-by: Mingkai Hu mingkai...@freescale.com
---
doc/README.mpc8536ds | 127 ++
1 files changed, 127 insertions(+), 0 deletions(-)
create mode 100644 doc/README.mpc8536ds
diff --git
On Sep 10, 2009, at 9:53 PM, Mingkai Hu wrote:
diff --git a/cpu/mpc85xx/tlb.c b/cpu/mpc85xx/tlb.c
index 0497a29..9c7c928 100644
--- a/cpu/mpc85xx/tlb.c
+++ b/cpu/mpc85xx/tlb.c
@@ -59,6 +59,7 @@ void set_tlb(u8 tlb, u32 epn, u64 rpn,
#endif
}
+#ifndef CONFIG_NAND_SPL
void disable_tlb(u8
-Original Message-
From: Gala Kumar-B11780
Sent: Friday, September 11, 2009 11:13 AM
To: Hu Mingkai-B21284
Cc: u-boot@lists.denx.de; Wood Scott-B07421
Subject: Re: [PATCH v2 1/5] 85xx: add boot from
NAND/eSDHC/eSPI support
On Sep 10, 2009, at 9:53 PM, Mingkai Hu wrote:
The MPC8536E is capable of booting form NAND/eSDHC/eSPI, this patch
implements these three bootup methods in a unified way - all of these
use the general cpu/mpc85xx/start.S, and load the main image to L2SRAM
which lets us use the SPD to initialize the SDRAM.
For all three bootup methods, the
Both the save env and load env operation will call this function
to get the address of env on the SDCard, so the user can control
where to put the env freely.
Also enable the functionlity of saving env variable to SDCard on
mpc8536
Signed-off-by: Mingkai Hu mingkai...@freescale.com
---
[PATCH v1 1/3] Make mmc init come before env_relocate
[PATCH v1 2/3] Add support for save environment variable to MMC/SD card
[PATCH v1 3/3] mpc8536: Get the address of env on the SDCard
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