Dear Alexander Holler,
In message 1292711230-3234-1-git-send-email-hol...@ahsoftware.de you wrote:
gcc 4.5.1 seems to ignore (at least some) volatile definitions,
avoid that as done in the kernel.
...
+#define writeb(v,c) ({ __iowmb(); __arch_putb(v,c); })
+#define
On Tuesday 21 December 2010 18:52:30 Kumar Gala wrote:
On Dec 17, 2010, at 5:17 PM, Becky Bruce wrote:
Also, change this code to use phys_size_t instead of long int.
Using common naming for this function will enable us to use the common
initdram() for 85xx going forward. Other than the
Dear Wolfgang Denk,
Can you please try and investigate the issue?
I have parsed the code again and again. In result I found the problem in
generated code.
By an Examble:
Source:
/* Setup Smart Media, first enable the address range of CS3 */
writel(readl(mc-ebi.csa) | AT91_EBI_CSA_CS3A,
Am 22.12.2010 10:29, schrieb Jens Scharsig:
In fact, the 4.2.2 code does access byte wise to soc (AT91) control
registers, but should write data as an single word.
Addendum:
The results: We receive an access violation. The cause is a faulty initialized
chip select.
regards
Jens
Sorry I'm on fault thread
I meam V2010.12-rc3
regards Jens Scharsig
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Am 22.12.2010 08:02, schrieb Albert ARIBAUD:
Le 22/12/2010 01:11, Alexander Holler a écrit :
Am 21.12.2010 21:04, schrieb Dirk Behme:
On 21.12.2010 20:52, Wolfgang Denk wrote:
Dear Albert friends,
what is your opinion? Should we include the memory barrier patch into
the upcoming
Dear Jens Scharsig,
I have parsed the code again and again. In result I found the problem in
generated code.
In fact, the 4.2.2 code does access byte wise to soc (AT91) control
registers, but should write data as an single word.
But I have no idea to prevent this.
By chance, the
Hello,
Am a new member and this is my first post.
With Version: Uboot -2010.09
I am currently using the AT91SAM9G20EK board and want to use networking
interface for tftp, tftpboot etc with the MII Interface.
As the first test, I tried 'ping' command to connected PC and also to the board
Dear Reinhard Meyer
By chance, the structure declaration has a packed attribute? Or other
quirks which might
make the compiler think the field _might be_ unaligned?
You are right, there are some __attribute__ ((packed)) statements. I don't
remember why.
I've remove this statments and the
gcc 4.5.1 seems to ignore (at least some) volatile definitions,
avoid that as done in the kernel.
Reading C99 6.7.3 8 and the comment 114) there, I think it is a bug of that
gcc version to ignore the volatile type qualifier used e.g. in __arch_getl().
Anyway, using a definition as in the kernel
* remove __attribute__ ((packed)) to prevent byte access
to soc registers in some gcc version
Signed-off-by: Jens Scharsig js_at...@scharsoft.de
---
see http://lists.denx.de/pipermail/u-boot/2010-December/084076.html
arch/arm/include/asm/arch-at91/at91_mc.h | 10 +-
Hello,
Am 22.12.2010 09:02, schrieb Wolfgang Denk:
In message1292711230-3234-1-git-send-email-hol...@ahsoftware.de you wrote:
gcc 4.5.1 seems to ignore (at least some) volatile definitions,
avoid that as done in the kernel.
...
+#define writeb(v,c) ({ __iowmb();
Hello.
On 21-12-2010 21:12, Michal Simek wrote:
Clear coding style issues.
Signed-off-by: Michal Simekmon...@monstr.eu
[...]
diff --git a/lib/asm-offsets.c b/lib/asm-offsets.c
index 2209561..f1af7e2 100644
--- a/lib/asm-offsets.c
+++ b/lib/asm-offsets.c
@@ -19,11 +19,11 @@
make default implementation of cache_flush() weakly linked so that
sub-architectures can override it
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/lib/cache.c |9 +++--
1 files changed, 3 insertions(+), 6 deletions(-)
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index
With D-cache and MMU enabled for ARM in u-boot it becomes imperative to
support a minimal set of cache maintenance operations and necessary
initializations before enabling MMU.
This series of patches attempt to do the following for armv7:
* Necessary initialization sequence before enabling MMU
adapt s5pc1xx to the new layered cache maintenance framework
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/s5pc1xx/cache.S| 86 +---
arch/arm/cpu/armv7/s5pc1xx/clock.c| 12
arch/arm/include/asm/arch-s5pc1xx/sys_proto.h |4 +-
- Add a framework for layered cache maintenance
- separate out SOC specific outer cache maintenance from
maintenance of caches known to CPU
- Add generic ARMv7 cache maintenance operations that affect all
caches known to ARMv7 CPUs. For instance in Cortex-A8 these
opertions
1. make sure that page table setup is not done multiple times
2. flush_dcache_all() is more appropriate while disabling cache
than a range flush on the entire memory(flush_cache())
Provide a default implementation for flush_dcache_all()
for backward compatibility and to avoid build
adapt omap3 to the new layered cache maintenance framework
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/omap3/Makefile |1 -
arch/arm/cpu/armv7/omap3/board.c| 151 ++--
arch/arm/cpu/armv7/omap3/cache.S| 263
Add support for some of the key maintenance operations
- Invalidate all
- Invalidate range
- Flush(clean invalidate) all
- Flush range
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/include/asm/pl310.h | 49 ++
arch/arm/lib/Makefile|
- Enable I-cache on bootup
- Enable MMU and D-cache immediately after relocation
- Do necessary initialization before enabling d-cache and MMU
- Changes to cleanup_before_linux()
- Make changes according to the new framework
Signed-off-by: Aneesh V ane...@ti.com
---
adapt omap4 to the new layered cache maintenance framework
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/omap4/board.c| 25 -
arch/arm/cpu/armv7/omap4/lowlevel_init.S| 17 +
arch/arm/include/asm/arch-omap4/omap4.h |
Add initial support for MX53EVK board support.
FEC, SD/MMC, UART, I2C, have been support.
Signed-off-by: Jason Liu r64...@freescale.com
---
Changes for v2:
-Address the comments from Stefano, Albert and Wolfgang,
-remove the ivt.S file and use imximage.cfg instead,
-remove the
Add initial support for Freescale MX53 processor,
- Add the iomux support and the pin definition,
- Add the regs definition, clean up some unused def from mx51,
- Add the low level init support, make use the freq input of setup_pll macro
---
Changes for v2:
-address some comments of Stefano
This patch add mxc_gpio support for Freescale MX53 processor
Signed-off-by: Jason Liu r64...@freescale.com
---
drivers/gpio/mxc_gpio.c |9 +++--
1 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c
index 663141f..53a0673 100644
This patch add the MX53 boot image support
This patch has been tested on Freescale MX53EVK board.
Signed-off-by: Jason Liu r64...@freescale.com
---
board/freescale/mx53evk/config.mk| 25
board/freescale/mx53evk/imximage.cfg | 108 ++
This patch add I2C interface for fsl_pmic driver support
Signed-off-by: Jason Liu r64...@freescale.com
---
drivers/misc/fsl_pmic.c | 39 ++-
1 files changed, 38 insertions(+), 1 deletions(-)
diff --git a/drivers/misc/fsl_pmic.c b/drivers/misc/fsl_pmic.c
Hi, Stefano, Wolfgang, Albert, John
2010/12/20 John Rigby john.ri...@linaro.org:
On Sun, Dec 19, 2010 at 10:19 PM, Jason Liu liu.h.ja...@gmail.com wrote:
Jason:
No one is arguing about the use the plugin feature. The objection is
to how you are getting the plugin bits into the u-boot image.
This patch add I2C support for Freescale MX53 processor
Signed-off-by: Jason Liu r64...@freescale.com
---
Changes for v2:
-address the comments of Heiko, add #if defined(CONFIG_MX31)
to avoid break MX31 build. Move CONFIG_HARD_I2C to the top
of the file and fix the error message from:
On Tuesday, December 21, 2010 00:37:24 Wolfgang Denk wrote:
Mike Frysinger wrote:
I have nothing to add. Please get rid of this unnecessary config.mk
file.
so you agree with my statement, or you're going to prevent any new
Blackfin boards from being merged until something you
These last variables aren't used outside of this file, so add static.
Signed-off-by: Mike Frysinger vap...@gentoo.org
---
common/cmd_mem.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/common/cmd_mem.c b/common/cmd_mem.c
index f7a442a..f03233c 100644
---
These strings are only read, so no need to have them be writable.
Signed-off-by: Mike Frysinger vap...@gentoo.org
---
common/main.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/main.c b/common/main.c
index d97ccd7..fa7c49d 100644
--- a/common/main.c
+++
The flash_verbose logic is only used by the CFI MTD layer, so if we aren't
using that, disable the logic completely.
Signed-off-by: Mike Frysinger vap...@gentoo.org
---
drivers/mtd/cfi_flash.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/mtd/cfi_flash.c
Signed-off-by: Mike Frysinger vap...@gentoo.org
---
arch/blackfin/lib/board.c |7 +--
1 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/blackfin/lib/board.c b/arch/blackfin/lib/board.c
index 12d618d..96407a2 100644
--- a/arch/blackfin/lib/board.c
+++
On 22.12.2010 12:04, Alexander Holler wrote:
gcc 4.5.1 seems to ignore (at least some) volatile definitions,
avoid that as done in the kernel.
Reading C99 6.7.3 8 and the comment 114) there, I think it is a bug of that
gcc version to ignore the volatile type qualifier used e.g. in
Hello,
Am 22.12.2010 15:50, schrieb Dirk Behme:
This patch seems to be the same as the proposal from Wolfgang
http://lists.denx.de/pipermail/u-boot/2010-December/084122.html
Exactly.
So we shouldn't drop his
Signed-off-by: Wolfgang Denk w...@denx.de
Sorry, I haven't seen that
Hello,
Happy hacking in U-Boot, let's start quickly!
Here' s porting information below:
1. Porting arm926ejs SoC to our new SoC call AVT2210
2. Sdram base address: 0x4000, size: 0x200(32M)
3. No flash now.
4. UART: Common 16550
5. U-Boot version: u-boot-2010.12-rc2
6. Linux OS
7.
Le 22/12/2010 14:23, Jason Liu a écrit :
This patch add I2C support for Freescale MX53 processor
Signed-off-by: Jason Liur64...@freescale.com
---
Changes for v2:
-address the comments of Heiko, add #if defined(CONFIG_MX31)
to avoid break MX31 build. Move CONFIG_HARD_I2C to the top
of
Le 22/12/2010 16:08, a ??crit :
Help! Help! Thanks a lot.
Abraham Yu.
Hi Abraham,
Without knowing the source code that you compile, it is hard to tell
exactly what goes on. You say code modified, but which board did you
modify, and how exactly do you build it? A patch would be
Hello all,
U-Boot v2010.12 has been released and is available from the git
repository and the FTP server.
The next branch has been pulled into mainline (master branch) and
has been removed afterward.
**
Thanks Albert!
Without knowing the source code that you compile, it is hard to tell
exactly what goes on. You say code modified, but which board did you
modify, and how exactly do you build it? A patch would be welcome to at
least reproduce your build.
Also, can you explain how exactly you
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Hello Wolfegang,
We are trying to debug an intermittent issue on our
system board that after writing 0xff to Boot Release Register (BRR) in a 8
core p4080 system
all the CPUs do not get started.We see the following output on the console:
CPU up timeout. CPU up mask is 7f
Hi, Albert,
2010/12/23 Albert ARIBAUD albert.arib...@free.fr:
Le 22/12/2010 14:23, Jason Liu a écrit :
This patch add I2C support for Freescale MX53 processor
Signed-off-by: Jason Liur64...@freescale.com
---
Changes for v2:
-address the comments of Heiko, add #if defined(CONFIG_MX31)
This patch add I2C support for Freescale MX53 processor
Signed-off-by: Jason Liu r64...@freescale.com
---
Changes for v2:
-address the comments of Heiko, add #if defined(CONFIG_MX31)
to avoid break MX31 build. Move CONFIG_HARD_I2C to the top
of the file and fix the error message from:
Fixes a build error due to new partial linking logic.
Signed-off-by: Mike Frysinger vap...@gentoo.org
---
include/configs/bf537-minotaur.h |1 +
include/configs/bf537-srv1.h |1 +
2 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/include/configs/bf537-minotaur.h
Remove the useless code from start.S
Signed-off-by: Jason Liu r64...@freescale.com
---
Changes for v2:
-Address the comments from Albert to make changes to all
ARM cpus with one single patch
---
arch/arm/cpu/arm1136/start.S |2 --
arch/arm/cpu/arm1176/start.S |2 --
On Wed, Dec 22, 2010 at 3:54 AM, Aneesh V ane...@ti.com wrote:
With D-cache and MMU enabled for ARM in u-boot it becomes imperative to
support a minimal set of cache maintenance operations and necessary
initializations before enabling MMU.
This series of patches attempt to do the following
and define CONFIG_SYS_TEXT_BASE in the board config files
Signed-off-by: John Rigby john.ri...@linaro.org
---
board/isee/igep0020/config.mk | 33 -
board/isee/igep0030/config.mk | 33 -
board/logicpd/am3517evm/config.mk
and define CONFIG_SYS_TEXT_BASE in the board config files
Signed-off-by: John Rigby john.ri...@linaro.org
---
Changes for v2:
Remove bogus tab character in define in v1.
---
board/isee/igep0020/config.mk | 33 -
board/isee/igep0030/config.mk | 33
Le 23/12/2010 00:08, a ??crit :
Thanks Albert!
Without knowing the source code that you compile, it is hard to tell
exactly what goes on. You say code modified, but which board did you
modify, and how exactly do you build it? A patch would be welcome to at
least reproduce your build.
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