On 21/11/2011 22:22, Mike Frysinger wrote:
Of course ... considering there's always one correct setting for
the pin to be in GPIO mode, which I suspect might not be
completely true today anymore.
i find it hard to envision a pinmux system where individual pins
would have different pinmux
-Original Message-
From: Heiko Schocher [mailto:h...@denx.de]
Sent: Monday, November 21, 2011 7:40 PM
To: Holger Brunck
Cc: u-boot@lists.denx.de; Longchamp, Valentin; Falauto,
Gerlando
Subject: Re: [PATCH] arm, post: add missing post_time_ms for
arm
Hello Holger,
added
This patch avoids build breakage for SPLs that do not support printf.
Signed-off-by: Christian Riesch christian.rie...@omicron.at
Cc: Wolfgang Denk w...@denx.de
Cc: Tom Rini tr...@ti.com
Acked-by: Tom Rini tr...@ti.com
---
Changes for v3:
- Removed extra white space
- Separated patch from
On 22/11/2011 06:04, Simon Glass wrote:
This fixes a few printf() strings for size_t which are missing the 'z'
modifier.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: Mike Frysinger vap...@gentoo.org
---
Applied to u-boot-staging, sba...@denx.de, thanks.
Best regards,
Stefano
On 15/11/2011 10:19, Wolfgang Grandegger wrote:
Commit 79ad54400932d6484178a372fb3b659e3437473b broke MAC address
programming in the SMSC95xx register set.
Cc: Marek Vasut marek.va...@gmail.com
Cc: Wolfgang Denk w...@denx.de
Cc: Simon Glass s...@chromium.org
Cc: Mike Frysinger
On 15/11/2011 10:19, Wolfgang Grandegger wrote:
Cc: Simon Glass s...@chromium.org
Cc: Mike Frysinger vap...@gentoo.org
Signed-off-by: Wolfgang Grandegger w...@denx.de
---
Applied to u-boot-staging, sba...@denx.de, thanks.
Best regards,
Stefano Babic
--
On 14/10/2011 19:16, David Wagner wrote:
This tool takes a key=value configuration file (same as would a `printenv'
show)
and generates the corresponding environment image, ready to be flashed.
use case: flash the environment with an external tool
Signed-off-by: David Wagner
On 04/11/2011 17:42, Simon Glass wrote:
If uintptr_t can be either an unsigned int or an unsigned long int, it is
tricky to use it in a printf() format string. This changes it to
unsigned long int consistently. This should do the right thing on both
32-bit and 64-bit architectures.
Dear Christian,
sorry I haven't followed the discussion so far. I have a little pointer too.
Am 22.11.2011 09:26, schrieb Christian Riesch:
This patch avoids build breakage for SPLs that do not support printf.
Signed-off-by: Christian Riesch christian.rie...@omicron.at
Cc: Wolfgang Denk
On 04/11/2011 17:42, Simon Glass wrote:
This printf() string should be %ld now that uintptr_t is defined
as long. Also fix a size_t error.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: Mike Frysinger vap...@gentoo.org
---
Applied to u-boot-staging, sba...@denx.de, thanks.
Best
On 26/10/2011 12:17, Mike Frysinger wrote:
No one uses this driver, and it isn't converted to the NET_MULTI
framework (which we dropped recently), so drop this driver too.
Signed-off-by: Mike Frysinger vap...@gentoo.org
---
Applied to u-boot-staging, sba...@denx.de, thanks.
Best regards,
On 07/11/2011 12:13, Igor Grinberg wrote:
This patch series cleans up environment related files
in terms of checkpatch and other coding style issues.
It is based on Mon, 7 Nov 2011 Wolfgang's master.
There are several warnings/errors left, mostly because
I don't think we need those solved
On 15/11/2011 14:40, Bertrand Cachet wrote:
From datasheet, when READY bit is set inside PM_CTRL register, it means that
device is already in *normal* (D0) mode = it doesn't need to be wake-up.
With this patch, we only wake-up (writing on TEST_BYTE register) if PM_MODE
bits of PM_CTRL
On 18/10/2011 10:11, Andreas Bießmann wrote:
Instead of linking the file into $(obj) tree use directly the source file.
This also prevents littered source tree if building not out-of-tree.
Signed-off-by: Andreas Bießmann biessm...@corscience.de
Acked-by: Mike Frysinger vap...@gentoo.org
---
On 21/11/2011 22:10, Wolfgang Denk wrote:
I forgot this in my initial summary of the idea: yes, please send such
information to the submitter and the list.
Ok, done.
I just want to pull the branch, I won't go though it and send e-mails.
Rebased and tested on current u-boot master.
The
Hi Andreas,
Thank you for your comments!
On Tue, Nov 22, 2011 at 9:49 AM, Andreas Bießmann
andreas.de...@googlemail.com wrote:
Dear Christian,
sorry I haven't followed the discussion so far. I have a little pointer too.
Am 22.11.2011 09:26, schrieb Christian Riesch:
This patch avoids build
Add NAND chip ID 0x38 in ids table to support Micron 4K pagesize NAND chip.
Signed-off-by: Shengzhou Liu shengzhou@freescale.com
---
based on 'master' branch of Wolfgang's tree.
drivers/mtd/nand/nand_ids.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git
Aneesh V (4):
armv7: disable L2 cache in cleanup_before_linux()
armv7: include armv7/cpu.c in SPL build
armv7: setup vector
start.S: remove omap3 specific code from start.S
arch/arm/cpu/armv7/Makefile |4 +-
arch/arm/cpu/armv7/cpu.c |1 +
We were not disabling external caches before jumping
to kernel. We were flushing all caches including
external caches and disabling caches globally in
CP15 System Control register. Apparently this is not
enough.
The bootstrap loader in Linux kernel that does decompression
enables data-caches
This allows SPL to have default implementation of
save_boot_params(), useful for SoCs that do
not intend to override this default implementation
Cc: Albert Aribaud albert.u.b...@aribaud.net
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/Makefile |4 ++--
1 files changed, 2
The vector is not correctly setup in armv7 except for OMAP3.
Correcting this.
Cc: Albert Aribaud albert.u.b...@aribaud.net
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/start.S | 17 +
1 files changed, 17 insertions(+), 0 deletions(-)
diff --git
Cc: Tom Rini tr...@ti.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/omap3/lowlevel_init.S |8
arch/arm/cpu/armv7/start.S | 23 ---
arch/arm/include/asm/arch-omap3/omap3.h |1 +
3
Aneesh V (9):
omap: Improve PLL parameter calculation tool
omap4: ttyO2 instead of ttyS2 in default bootargs
omap: fix cache line size for omap3/omap4 boards
omap4460: fix TPS initialization
omap: remove I2C from SPL
omap4: emif: fix error in driver
omap4460: add ES1.1 identification
Improve the tool that finds multiplier and divider for PLLs:
The previous algorithm could get stuck on local maxima
and required the user to specify the tolerance. Improve
the algorithm to go through the entire search space and find
the optimal solution.
Signed-off-by: Aneesh V ane...@ti.com
---
Set console=ttyO2 instead of ttyS2 in default bootargs
according to latest kernel config
Signed-off-by: Aneesh V ane...@ti.com
---
include/configs/omap4_common.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include/configs/omap4_common.h
Cc: Tom Rini tr...@ti.com
Signed-off-by: Aneesh V ane...@ti.com
---
include/configs/omap3_beagle.h |2 ++
include/configs/omap3_evm.h|1 +
include/configs/omap3_evm_common.h |2 ++
include/configs/omap3_mvblx.h |2 ++
include/configs/omap3_overo.h |2 ++
TPS power IC is controlled using a GPIO (gpio_wk7).
This GPIO should be maintained at logic 1 always. As
such an internal pull-up on this pin will do the job,
driving the GPIO outuput is not needed. This will avoid
the need of using GPIO library in SPL and also may
save some power.
Signed-off-by:
Due to some recent changes I2C is no longer required in SPL.
Remove the i2c_init() call to save some space
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/omap-common/spl.c |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/spl.c
There was a typo in the EMIF driver. It went un-noticed
because it affected only when automatic detection is enabled
and even then half the memory was configured and identified
properly.
Reported-by: Rockefeller rockefeller@innocomm.com
Signed-off-by: Aneesh V ane...@ti.com
---
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/omap4/hwinit.c | 10 +-
arch/arm/include/asm/arch-omap4/omap.h |2 ++
arch/arm/include/asm/omap_common.h |1 +
3 files changed, 12 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap4/hwinit.c
Change the CONFIG_SYS_TEXT_BASE and the addresses of SDRAM
buffers used by SPL(heap and BSS) keeping in mind the
following requirements:
1. Make sure that SPL's heap and BSS doesn't come in the way
of Linux kernel, which is typically loaded at 0x80008000. This
will be important when SPL directly
The value from TRIM is not working for some 4430 silicons.
So, override with hw team recommended value. However, for
4460 TRIM value shall be used as long as the part is trimmed
This fixes boot problem on some OMAP4430 ES2.0 Panda boards
out there.
Cc: Steve Sakoman sako...@gmail.com
In some NAND controllers there is a size limitation of RAM buffer(2K bytes).
To support large-page NAND chips with greater than 2K pagesize, we need a large
buffer, but we don't know pagesize before calling nand_scan_ident(), for more
flexible and to identify different cases of large-page greater
Freescale FCM controller has a 2K size limitation of buffer RAM. In order
to support the Nand flash chip whose page size is larger than 2K bytes,
we read/write 2k data repeatedly by issuing FIR_OP_RB/FIR_OP_WB and save
them to a large buffer.
Signed-off-by: Shengzhou Liu
NDS32 and SANDBOX architecture were sharing the same IH_ARCH number
Signed-off-by: Stefan Kristiansson stefan.kristians...@saunalahti.fi
---
include/image.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include/image.h b/include/image.h
index c56a18d..6a41c2e 100644
Dear Marek Vasut,
In message 1321914883-6515-2-git-send-email-marek.va...@gmail.com you wrote:
The board is unmaintained and maintainer doesn't respond.
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Simon Glass s...@chromium.org
Cc: Anatolij Gustschin ag...@denx.de
---
MAINTAINERS
On 21/11/2011 19:23, Tom Rini wrote:
On Mon, Nov 21, 2011 at 1:37 AM, Tapani Utriainen tap...@technexion.com
wrote:
All,
these patches add support for TechNexion TAM3517, TAO3530 and TDM3730 SoMs.
One more global comment. It looks like you're using x-loader or
similar for these boards
Dear Stephen Warren,
In message 4ecae8db.5070...@nvidia.com you wrote:
I thought there was going to be a u-boot-tegra.git that a Tegra U-boot
maintainer would put the patches into once reviewed/approved, and then
send pull requests to Albert, like the other ARM SoCs? That's what I was
Yes,
repost, in case my mail from last week was lost somewhere...
Am Mi, 16.11.2011, 13:37 schrieb Mathias Adam:
Hello,
I'm currently using u-boot on a TI DM816x evaluation board (u-boot as
included in TI's EZSDK 5.02). I manually enabled CONFIG_CMD_DNS. However,
running dhcp followed by dns
Hello, WITH UTMOST CONFIDENCE This is a confidential
business proposition and I need a reliable foreign partner that will assist my
family for investment. My name is Mrs.Hajia harshin the wife of Engr Mohammed
Alih harshin of Libya Africa. May I quickly inform you
* Wolfgang Denk | 2011-11-21 21:19:07 [+0100]:
Dear Sebastian Andrzej Siewior,
Hi Wolfgang,
Please provide _exact_ reference where this code has been copied from,
see bullet 4 etc. at
http://www.denx.de/wiki/view/U-Boot/Patches#Attributing_Code_Copyrights_Sign
Also please provide exact
On Nov 8, 2011, at 5:40 PM, Timur Tabi wrote:
Several macros are used to identify and locate the microcode binary image
that U-boot needs to upload to the QE or Fman. Both the QE and the Fman
use the QE Firmware binary format to package their respective microcode data,
which is why the same
On Mon, Nov 21, 2011 at 10:44 PM, Stefano Babic sba...@denx.de wrote:
On 18/11/2011 08:11, Jason Liu wrote:
i.MX6Q is freescale quad core processors with ARM cortex_a9 complex.
This patch is to add the initial support for this processor.
Signed-off-by: Jason Liu jason@linaro.org
On Mon, Nov 21, 2011 at 10:51 PM, Stefano Babic sba...@denx.de wrote:
On 18/11/2011 08:11, Jason Liu wrote:
Signed-off-by: Jason Liu jason@linaro.org
Cc: Stefano Babic sba...@denx.de
---
v2: Cc Stefano
---
drivers/serial/serial_mxc.c | 10 +++---
1 files changed, 7
On Tue, Nov 22, 2011 at 05:46:41AM +0100, Marek Vasut wrote:
On Mon, Nov 21, 2011 at 11:50:17PM +0100, Marek Vasut wrote:
+ printf(CPU: OpenRISC-%x00 (rev %d) @ %d MHz\n,
+ ver, rev, (CONFIG_SYS_CLK_FREQ / 100));
The CPU won't tell you it's speed ?
On Tue, Nov 22, 2011 at 05:48:53AM +0100, Marek Vasut wrote:
+ asm(l.nop 0x1); /* Kill any simulation */
Simulation? Oh, it's an FPGA based CPU or what?
Well, yes, FPGAs are probably the most common case, but also ASIC
implementations exists.
The extra argument to
Hi Stefan,
主旨: [PATCH] Fix clash between IH_ARCH_NDS32 and IH_ARCH_SANDBOX
NDS32 and SANDBOX architecture were sharing the same IH_ARCH number
Signed-off-by: Stefan Kristiansson stefan.kristians...@saunalahti.fi
[snip]
architecture (test only) */
-#define IH_ARCH_NDS32
Kumar Gala wrote:
Can your respin against current upstream HEAD. For some reason this doesn't
apply cleanly there.
This patch broke it:
drivers/net/fm/fm.c: Fix GCC 4.6 build warning
I'll post a v2 in just a few minutes.
--
Timur Tabi
Linux kernel developer at Freescale
This patch fixes a small off-by-one bug in the GPIO driver for the mxs
platform that allowed the selection gpio pins of one bank more than the
SoC actually has.
Signed-off-by: Robert Deliën robert at delien.nl
diff --git a/drivers/gpio/mxs_gpio.c b/drivers/gpio/mxs_gpio.c
index
On 11/22/2011 04:23 AM, Thomas Weber wrote:
This patch removes the CONFIG_OMAP3430, because it is unused.
Acked-by: Igor Grinberg grinb...@compulab.co.il
Signed-off-by: Thomas Weber we...@corscience.de
Acked-by: Tom Rini tr...@ti.com
--
Tom
___
Dear Marek Vasut,
In message 1321914883-6515-2-git-send-email-marek.va...@gmail.com you wrote:
The board is unmaintained and maintainer doesn't respond.
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Simon Glass s...@chromium.org
Cc: Anatolij Gustschin ag...@denx.de
---
On 11/21/11 17:33, Tom Rini wrote:
On 11/21/2011 07:41 AM, Igor Grinberg wrote:
On 11/21/11 16:12, Tom Rini wrote:
On Mon, Nov 21, 2011 at 12:04 AM, Igor Grinberg grinb...@compulab.co.il
wrote:
On 11/20/11 16:26, Tom Rini wrote:
On Sun, Nov 20, 2011 at 12:36 AM, Igor Grinberg
This patch removes the definition of stack sizes for
irq and fiq if the CONFIG_USE_IRQ is undefined before.
Acked-by: Igor Grinberg grinb...@compulab.co.il
Signed-off-by: Thomas Weber we...@corscience.de
---
Changelog v1-v2
Add maintainers of boards as suggested by Igor.
Add
On 11/22/2011 04:23 AM, Thomas Weber wrote:
This patch removes the unused definition of SDRC_R_C_B
from the config files.
Acked-by: Igor Grinberg grinb...@compulab.co.il
Signed-off-by: Thomas Weber we...@corscience.de
[snip]
/* SDRAM Bank Allocation method */
-#define SDRC_R_B_C
On 11/22/2011 04:23 AM, Thomas Weber wrote:
This patch removes the definition of stack sizes for
irq and fiq if the CONFIG_USE_IRQ is undefined before.
Acked-by: Igor Grinberg grinb...@compulab.co.il
Signed-off-by: Thomas Weber we...@corscience.de
Acked-by: Tom Rini tr...@ti.com
--
Tom
This patch fixes a small off-by-one bug in the GPIO driver for the mxs platform
that allowed the selection gpio pins of one bank more than the SoC actually has.
Signed-off-by: Robert Deliën robert at delien.nl
diff --git a/drivers/gpio/mxs_gpio.c b/drivers/gpio/mxs_gpio.c
index b7e9591..539738b
This patch fixes a small bug that allowed unintended manipulation of
non-existing GPIO pins within a pin bank, clobbering reserved bits.
Signed-off-by: Robert Deliën robert at delien.nl
diff --git a/arch/arm/include/asm/arch-mx28/iomux.h
b/arch/arm/include/asm/arch-mx28/iomux.h
index
This patch fixes a small bug that allowed unintended manipulation of
non-existing GPIO pins within a pin bank, clobbering reserved bits.
Signed-off-by: Robert Deliën robert at delien.nl
diff --git a/arch/arm/include/asm/arch-mx28/iomux.h
b/arch/arm/include/asm/arch-mx28/iomux.h index
On 11/22/2011 07:33 AM, Igor Grinberg wrote:
On 11/21/11 17:33, Tom Rini wrote:
On 11/21/2011 07:41 AM, Igor Grinberg wrote:
On 11/21/11 16:12, Tom Rini wrote:
On Mon, Nov 21, 2011 at 12:04 AM, Igor Grinberg grinb...@compulab.co.il
wrote:
On 11/20/11 16:26, Tom Rini wrote:
On Sun, Nov 20,
Several macros are used to identify and locate the microcode binary image
that U-boot needs to upload to the QE or Fman. Both the QE and the Fman
use the QE Firmware binary format to package their respective microcode data,
which is why the same macros are used for both. A given SOC will only
Hi Marek,
Hey, this looks reasonable. Did you send similar patch to Linux too ?
No, I'm not at that yet. I'm just starting to explore the New U-Boot: It's
been since version 1.1.2 that I have actually contributed something.
My current project requires a mechanism to manipulate GPIO
On 11/22/2011 07:51 AM, Tom Rini wrote:
On 11/22/2011 07:33 AM, Igor Grinberg wrote:
On 11/21/11 17:33, Tom Rini wrote:
On 11/21/2011 07:41 AM, Igor Grinberg wrote:
On 11/21/11 16:12, Tom Rini wrote:
On Mon, Nov 21, 2011 at 12:04 AM, Igor Grinberg grinb...@compulab.co.il
wrote:
On 11/20/11
This patch adds adds pin name support in the GPIO driver. With this patch
applied, the gpio command supports pins to be addressed with friendly names.
The user's manual refers to pins by the bank number they're in and their number
within that bank. With this patch the friendly naming convention
The serial driver for iMX SOCs is continuosly changed if a
new SOC or not yet used port is used. CONFIG_SYS_SOC_UART Port
defines were used only to find the base address for the selected UART.
Instead of that, move the base address to the board configuration
file and drop all #ifdef from driver.
On Tue, Nov 22, 2011 at 2:39 AM, Aneesh V ane...@ti.com wrote:
Due to some recent changes I2C is no longer required in SPL.
Remove the i2c_init() call to save some space
Which changes? We might need to bring this back for am335x stuff,
once we have i2c support ready to post to mainline (on
On 11/22/2011 02:38 AM, Aneesh V wrote:
Cc: Tom Rini tr...@ti.com
Signed-off-by: Aneesh V ane...@ti.com
Except for adding whitespace to include/configs/omap3_evm.h,
Acked-by: Tom Rini tr...@ti.com
--
Tom
___
U-Boot mailing list
U-Boot@lists.denx.de
On 11/22/2011 02:34 AM, Aneesh V wrote:
Cc: Tom Rini tr...@ti.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
Signed-off-by: Aneesh V ane...@ti.com
Acked-by: Tom Rini tr...@ti.com
--
Tom
___
U-Boot mailing list
U-Boot@lists.denx.de
2011/11/22 Tom Rini tr...@ti.com
On 11/22/2011 04:23 AM, Thomas Weber wrote:
This patch removes the CONFIG_OMAP3430, because it is unused.
Acked-by: Igor Grinberg grinb...@compulab.co.il
Signed-off-by: Thomas Weber we...@corscience.de
Acked-by: Tom Rini tr...@ti.com
--
Tom
To make things simple for users, there's standard layout. It's actually at
sector 2048 btw.
Got that.
That's what happens internally, it's just that some pieces (like sector
offset
of the partition!) need to be filled into the bootstream header by the
mxsboot
utility -- see mxsboot
This patchset removes some unused definitions from the config files.
It is mostly omap3 centred.
Changelog v1-v2
Add maintainers of boards as suggested by Igor.
Add Acked-by from Igor
Thomas Weber (3):
ARM: OMAP3: Remove unused define CONFIG_OMAP3430
ARM: OMAP3: Remove unused
This patch removes the CONFIG_OMAP3430, because it is unused.
Acked-by: Igor Grinberg grinb...@compulab.co.il
Signed-off-by: Thomas Weber we...@corscience.de
---
Changelog v1-v2
Add maintainers of boards as suggested by Igor.
Add Acked-by from Igor
include/configs/cm_t35.h
2011/11/22 Tom Rini tr...@ti.com
On 11/22/2011 04:23 AM, Thomas Weber wrote:
This patch removes the unused definition of SDRC_R_C_B
from the config files.
Acked-by: Igor Grinberg grinb...@compulab.co.il
Signed-off-by: Thomas Weber we...@corscience.de
[snip]
/* SDRAM Bank Allocation
2011/11/22 Tom Rini tr...@ti.com:
On 11/22/2011 04:23 AM, Thomas Weber wrote:
This patch removes the definition of stack sizes for
irq and fiq if the CONFIG_USE_IRQ is undefined before.
Acked-by: Igor Grinberg grinb...@compulab.co.il
Signed-off-by: Thomas Weber we...@corscience.de
This patch removes the unused definition of SDRC_R_C_B
from the config files.
Acked-by: Igor Grinberg grinb...@compulab.co.il
Signed-off-by: Thomas Weber we...@corscience.de
---
Changelog v1-v2
Add maintainers of boards as suggested by Igor.
Add Acked-by from Igor
The serial driver for iMX SOCs is continuosly changed if a
new SOC or not yet used port is used. CONFIG_SYS_SOC_UART Port
defines were used only to find the base address for the selected UART.
Instead of that, move the base address to the board configuration
file and drop all #ifdef from
To make things simple for users, there's standard layout. It's actually
at sector 2048 btw.
Got that.
That's what happens internally, it's just that some pieces (like sector
offset of the partition!) need to be filled into the bootstream header
by the mxsboot utility -- see mxsboot
* Stephen Warren wrote:
On 11/21/2011 01:35 AM, Thierry Reding wrote:
This commit drops the interface check for card-detection and leaves it
up to the board whether or not a card-detect GPIO is connected. Also,
the version field of struct mmc is only valid after the slot has been
probed
This patch fixes a small off-by-one bug in the GPIO driver for the mxs
platform that allowed the selection gpio pins of one bank more than the
SoC actually has.
Signed-off-by: Robert Deliën robert at delien.nl
diff --git a/drivers/gpio/mxs_gpio.c b/drivers/gpio/mxs_gpio.c
index
This patch adds adds pin name support in the GPIO driver. With this patch
applied, the gpio command supports pins to be addressed with friendly
names.
The user's manual refers to pins by the bank number they're in and their
number within that bank. With this patch the friendly naming
This patch fixes a small bug that allowed unintended manipulation of
non-existing GPIO pins within a pin bank, clobbering reserved bits.
Signed-off-by: Robert Deliën robert at delien.nl
diff --git a/arch/arm/include/asm/arch-mx28/iomux.h
b/arch/arm/include/asm/arch-mx28/iomux.h index
Some functions were internal to the apbh dma driver, so annotate them static.
Some of the functions weren't used at all so drop them. This makes the U-Boot
binary smaller by about 1500 bytes.
Signed-off-by: Marek Vasut marek.va...@gmail.com
Cc: Stefano Babic sba...@denx.de
Cc: Wolfgang Denk
* Thierry Reding wrote:
Check for board-specific card detect each time an MMC/SD device is
initialized. If card detection is not implemented, this code behaves as
before and continues assuming a card is present. If no card is detected,
has_init is reset for the MMC/SD device (to force
Dear Stefano Babic,
In message 4ecb7f09.7060...@denx.de you wrote:
Tapani, is it ok for you if I post my patches, too ? It looks like I
already did some work and makes no sense you rework your patches when
maybe a part of the whole job is done...
Please go ahead and post your patches, so we
Dear Mathias Adam,
In message c231e6b8530fa0acb9b1389d049cf359.squir...@www.inft.de you wrote:
repost, in case my mail from last week was lost somewhere...
It would help if you submitted this as proper patch, with a good
Subject:, a usable commit message and most of all with your
Signed-off-by:
Dear Sebastian Andrzej Siewior,
In message 2022123007.ga5...@linutronix.de you wrote:
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must
No, move this to mxs_gpio.c and simply make the function not static.
I too find the construction a little strange, but I copied it from the Blackfin
implementation.
But after taking a second look at it, it made sense: It makes the file pulling
including it, define it statically locally. The
Careful here !!
The driver _should_ work for MX233 too! What I'd like to see is you
introducing
a function like:
int mxs_gpio_is_valid(gpio)
{
char mxs_banks[PINCTRL_BANKS] = PINCTRL_BANK_COUNTS;
if (PAD_PIN(gpio) mxs_bank[PAD_BANK(gpio)])
return -EINVAL;
return 0;
}
No, move this to mxs_gpio.c and simply make the function not static.
I too find the construction a little strange, but I copied it from the
Blackfin implementation.
But after taking a second look at it, it made sense: It makes the file
pulling including it, define it statically locally.
On 11/22/2011 02:49 AM, Andreas Bießmann wrote:
Well, you can do it that way but I guess there are several places where
printf() will be needed by some drivers in SPL. Therefore I think it is
better to provide printf() for SPL than to ifdef out all the printf's.
So how about providing an
On 11/22/2011 08:07 AM, Marek Vasut wrote:
On Tue, Nov 22, 2011 at 05:46:41AM +0100, Marek Vasut wrote:
On Mon, Nov 21, 2011 at 11:50:17PM +0100, Marek Vasut wrote:
+printf(CPU: OpenRISC-%x00 (rev %d) @ %d MHz\n,
+ver, rev, (CONFIG_SYS_CLK_FREQ / 100));
The CPU
I don't think I follow ... don't you only have to define the function and
that's
it?
No, it's a bit more complicated than that. It wouldn't be my choice either, but
now I'm familiar with it, I find it quite charming. Let me see if I can explain:
Check out common/cmd_gpio.c.
The first part
On Monday 21 November 2011 23:46:41 Marek Vasut wrote:
On Mon, Nov 21, 2011 at 11:50:17PM +0100, Marek Vasut wrote:
+ l.addi r3,r3,4
+ l.sfltu r4,r5
+ l.bf.L_reloc
+l.addi r4,r4,4 /* delay slot */
The formating here doesn't
On Tuesday 22 November 2011 02:30:59 Christian Riesch wrote:
Hello Mike,
Thank you for your comments.
On Mon, Nov 21, 2011 at 8:09 PM, Mike Frysinger vap...@gentoo.org wrote:
On Monday 21 November 2011 11:33:47 Christian Riesch wrote:
--- a/Makefile
+++ b/Makefile
On Thursday 15 September 2011 01:34:33 Heiko Schocher wrote:
Signed-off-by: Heiko Schocher h...@denx.de
Cc: Albert ARIBAUD albert.u.b...@aribaud.net
---
post/post.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/post/post.c b/post/post.c
index 6c59f91..0bfca75
On Tuesday 22 November 2011 03:54:14 Shengzhou Liu wrote:
In some NAND controllers there is a size limitation of RAM buffer(2K
bytes). To support large-page NAND chips with greater than 2K pagesize, we
need a large buffer, but we don't know pagesize before calling
nand_scan_ident(), for more
On Monday 21 November 2011 17:34:41 Marek Vasut wrote:
The board is unmaintained and maintainer doesn't respond.
The board fails to build now and maintainer doesn't respond.
-mike
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On Tuesday 22 November 2011 03:15:47 Stefano Babic wrote:
On 21/11/2011 22:22, Mike Frysinger wrote:
Of course ... considering there's always one correct setting for
the pin to be in GPIO mode, which I suspect might not be
completely true today anymore.
i find it hard to envision a
On Tuesday 22 November 2011 09:41:48 Robert Deliën wrote:
+ switch(PAD_BANK(gp)) {
needs a space after that switch
+ case 0:
+ bank_pins = MXS_BANK0_PINS;
+ break;
+ case 1:
+ bank_pins = MXS_BANK1_PINS;
+ break;
+
please fix your client to properly wrap long lines in the non-patch area
-mike
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On 11/22/2011 03:03 PM, Mike Frysinger wrote:
On Tuesday 22 November 2011 03:54:14 Shengzhou Liu wrote:
In some NAND controllers there is a size limitation of RAM buffer(2K
bytes). To support large-page NAND chips with greater than 2K pagesize, we
need a large buffer, but we don't know
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